2026-04-19 03:30:49.401 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.173.20:5700'
2026-04-19 03:30:49.401 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.173.20:5802)
2026-04-19 03:30:49.401 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.173.20:5801)
2026-04-19 03:30:49.401 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.173.22:6700'
2026-04-19 03:30:49.401 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.173.22:6802)
2026-04-19 03:30:49.401 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.173.22:6801)
2026-04-19 03:30:49.401 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.173.20:5700/1'
2026-04-19 03:30:49.401 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.173.20:5804)
2026-04-19 03:30:49.401 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.173.20:5803)
2026-04-19 03:30:49.401 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.173.20:5700/2'
2026-04-19 03:30:49.401 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.173.20:5806)
2026-04-19 03:30:49.401 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.173.20:5805)
2026-04-19 03:30:49.401 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.173.20:5700/3'
2026-04-19 03:30:49.401 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.173.20:5808)
2026-04-19 03:30:49.401 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.173.20:5807)
2026-04-19 03:30:49.401 [INFO] fake_trx.py:429 Init complete
2026-04-19 03:30:49.401 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-04-19 03:30:50.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:30:50.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:30:50.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:50.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:50.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:50.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:53.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:30:53.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:53.558 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:53.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:30:53.559 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 0 -> 1
2026-04-19 03:30:53.559 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:30:53.560 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:30:53.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:53.560 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:53.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:30:53.560 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:30:53.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:30:53.560 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 0 -> 1
2026-04-19 03:30:53.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:53.561 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:30:53.561 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:30:53.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:53.561 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:53.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:30:53.561 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:30:53.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:30:53.561 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 0 -> 1
2026-04-19 03:30:53.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:53.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:30:53.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:30:53.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:53.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:30:53.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:30:53.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:30:53.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:30:53.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 0 -> 1
2026-04-19 03:30:53.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:53.563 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:30:53.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:30:53.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:30:53.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:53.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:30:53.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:30:54.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:30:54.081 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:30:54.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:54.082 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:30:54.082 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:30:54.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:54.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:54.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:30:54.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:54.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:54.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:54.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:30:54.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:30:54.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:54.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:54.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:54.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:54.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:54.494 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:30:54.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:54.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:54.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:54.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:54.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:54.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:54.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:54.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:54.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:54.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:54.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:30:54.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:54.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:54.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:54.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:30:54.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:30:54.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:54.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:54.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:54.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:54.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:54.957 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:30:55.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:55.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:55.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:55.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:55.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:55.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:30:55.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:55.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:55.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:30:55.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:30:55.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:55.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:55.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:55.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:55.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:55.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:55.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:55.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:55.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:30:55.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:55.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:55.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:30:55.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:30:55.420 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:30:55.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:55.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:55.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:55.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:55.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:55.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:55.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:55.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:55.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:55.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:55.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:55.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:55.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:30:55.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:55.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:55.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:30:55.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:30:55.882 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:30:55.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:55.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:55.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:55.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:55.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:56.345 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:30:56.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:56.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:56.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:56.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:56.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:56.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:56.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:30:56.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:56.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:56.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:56.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:30:56.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:30:56.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:56.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:56.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:56.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:56.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:56.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:56.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:56.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:56.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:56.808 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:30:57.271 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:30:57.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:57.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:57.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:57.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:57.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:57.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:57.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:30:57.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:57.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:57.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:57.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:30:57.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:30:57.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:57.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:57.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:57.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:57.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:57.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:30:57.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:30:57.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:30:57.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:30:57.734 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:30:57.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:57.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:57.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:57.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:57.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:57.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:57.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:30:57.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:57.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:57.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:57.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:30:57.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:30:57.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:57.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:58.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:58.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:58.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:58.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:58.196 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:30:58.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:58.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:58.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:58.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:58.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:58.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:58.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:30:58.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:58.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:58.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:58.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:30:58.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:30:58.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:58.659 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:30:58.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:58.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:58.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:58.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:59.121 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:30:59.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:59.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:59.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:59.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:59.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:30:59.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:30:59.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:30:59.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:59.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:59.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:59.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:30:59.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:30:59.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:30:59.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:30:59.584 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:30:59.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:30:59.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:30:59.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:30:59.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:00.047 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:31:00.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:00.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:00.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:00.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:00.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:00.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:00.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:00.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:00.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:00.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:00.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:00.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:00.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:00.509 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:31:00.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:00.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:00.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:00.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:00.972 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:31:01.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:01.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:01.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:01.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:01.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:01.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:01.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:01.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:01.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:01.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:01.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:01.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:01.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:01.434 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:31:01.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:01.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:01.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:01.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:01.896 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:31:02.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:02.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:02.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:02.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:02.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:02.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:02.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:02.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:02.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:02.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:02.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:02.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:02.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:02.359 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:31:02.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:02.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:02.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:02.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:02.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:02.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:02.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:02.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:02.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:02.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:02.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:02.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:02.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:02.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:02.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:02.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:02.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:02.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:02.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:02.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:02.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:02.822 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:31:02.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:02.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:02.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:02.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:02.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:02.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:02.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:02.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:02.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:02.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:02.999 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:02.999 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:03.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:03.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:03.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:03.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:03.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:03.285 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:31:03.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:03.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:03.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:03.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:03.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:03.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:03.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:03.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:03.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:03.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:03.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:03.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:03.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:03.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:03.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:03.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:03.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:03.747 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:31:03.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:03.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:03.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:03.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:03.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:03.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:03.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:03.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:03.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:03.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:03.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:03.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:03.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:04.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:04.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:04.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:04.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:04.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:04.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:04.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:04.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:04.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:04.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:04.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:04.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:04.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:04.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:04.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:04.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:04.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:04.210 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:31:04.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:04.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:04.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:04.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:04.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:04.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:04.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:04.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:04.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:04.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:04.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:04.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:04.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:04.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:04.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:04.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:04.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:04.672 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:31:04.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:04.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:04.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:04.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:05.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:05.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:05.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:05.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:05.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:05.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:05.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:05.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:05.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:05.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:05.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:05.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:05.134 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:31:05.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:05.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:05.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:05.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:05.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:05.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:05.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:05.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:05.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:05.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:05.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:05.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:05.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:05.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:05.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:05.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:05.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:05.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:05.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:31:05.580 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:10.582 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:10.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:31:10.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:10.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:10.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:10.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:10.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:10.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:10.586 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:10.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:10.586 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:31:10.588 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:31:10.588 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:31:10.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:10.588 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:10.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:10.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:31:10.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:10.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:31:10.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:10.590 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:31:10.590 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:31:10.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:10.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:10.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:10.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:31:10.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:10.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:31:10.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:10.592 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:31:10.592 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:31:10.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:10.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:10.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:10.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:31:10.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:10.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:31:10.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:31:10.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:31:10.596 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:31:10.596 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:10.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:10.600 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:31:11.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:31:11.111 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:31:11.111 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:31:11.112 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:31:11.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:11.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:11.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:11.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 03:31:11.526 [DEBUG] clck_gen.py:113 IND CLOCK 204
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2026-04-19 03:31:11.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 03:31:11.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:11.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:11.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:11.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 03:31:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 03:31:11.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 03:31:11.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 03:31:11.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 03:31:11.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 03:31:11.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:11.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:11.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:11.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:11.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:11.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:11.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:11.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:11.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:11.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:11.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:31:11.754 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:16.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:16.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:31:16.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:16.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:16.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:16.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:16.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:16.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:16.759 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:16.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:16.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:31:16.760 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:31:16.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:31:16.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:16.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:16.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:16.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:31:16.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:16.761 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:31:16.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:16.762 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:31:16.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:31:16.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:16.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:16.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:31:16.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:16.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:16.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:31:16.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:16.763 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:31:16.763 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:31:16.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:16.763 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:16.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:16.763 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:31:16.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:16.764 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:31:16.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:16.765 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:31:16.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:31:16.765 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:31:16.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:31:16.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:31:16.766 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:31:16.766 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:31:16.766 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:16.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:16.771 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:31:17.233 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:31:17.281 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:31:17.281 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:31:17.281 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:31:17.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:17.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:17.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:17.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:17.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:17.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:17.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:17.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:17.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:17.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:17.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:17.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:17.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:31:17.298 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:17.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:17.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:17.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:17.298 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:17.298 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:17.298 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:17.298 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:17.298 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:17.298 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:31:22.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:22.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:31:22.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:22.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:22.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:22.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:22.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:22.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:22.306 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:22.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:22.306 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:31:22.307 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:31:22.308 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:31:22.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:22.308 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:22.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:22.308 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:31:22.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:22.308 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:31:22.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:22.309 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:31:22.309 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:31:22.309 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:22.309 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:22.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:22.309 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:31:22.309 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:22.309 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:31:22.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:22.310 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:31:22.310 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:31:22.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:22.310 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:22.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:22.310 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:31:22.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:22.310 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:31:22.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:22.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:31:22.313 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:31:22.313 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:31:22.313 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:22.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:22.317 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:31:22.780 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:31:22.825 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:31:22.826 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:31:22.826 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:31:22.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:22.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:22.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:22.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:22.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:22.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:22.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:22.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:22.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:22.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:22.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:22.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:22.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:22.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:31:22.838 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:27.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:27.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:31:27.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:27.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:27.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:27.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:27.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:27.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:27.844 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:27.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:27.844 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:31:27.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:31:27.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:31:27.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:27.845 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:27.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:27.845 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:31:27.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:27.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:31:27.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:27.846 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:31:27.846 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:31:27.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:27.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:27.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:27.847 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:31:27.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:27.847 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:31:27.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:27.848 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:31:27.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:31:27.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:27.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:27.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:27.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:31:27.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:27.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:31:27.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:27.849 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:31:27.850 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:31:27.850 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:31:27.850 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:27.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:27.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:27.855 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:31:28.317 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:31:28.365 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:31:28.366 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:31:28.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:28.367 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:31:28.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:28.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:28.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:28.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:28.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:28.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:28.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:28.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:28.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:28.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:28.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:31:28.495 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:31:28.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:28.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:33.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:31:33.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:31:33.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:33.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:33.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:33.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:33.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:31:33.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:33.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:33.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:31:33.504 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:31:33.506 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:31:33.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:31:33.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:33.506 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:33.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:31:33.506 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:31:33.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:31:33.506 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:31:33.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:33.507 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:31:33.507 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:31:33.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:33.508 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:33.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:31:33.508 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:31:33.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:31:33.508 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:31:33.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:33.509 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:31:33.509 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:31:33.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:33.509 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:31:33.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:31:33.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:31:33.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:31:33.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:31:33.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:31:33.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:31:33.511 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:31:33.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:31:33.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:31:33.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:31:34.023 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:31:34.024 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:31:34.024 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:31:34.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:34.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:34.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:34.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:34.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:34.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:34.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:34.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:34.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:34.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:34.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:34.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:34.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:34.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:34.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:34.440 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:31:34.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:34.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:34.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:34.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:34.903 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:31:35.365 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:31:35.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:35.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:35.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:35.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:35.828 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:31:36.290 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:31:36.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:36.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:36.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:36.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:36.753 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:31:37.215 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:31:37.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:37.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:37.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:37.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:37.677 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:31:38.140 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:31:38.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:38.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:38.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:38.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:38.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:38.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:38.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:38.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:38.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:38.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:38.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:38.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:38.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:38.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:38.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:38.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:38.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:38.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:38.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:31:38.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:31:38.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:31:38.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:31:38.603 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:31:39.065 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:31:39.528 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:31:39.990 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:31:40.454 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:31:40.917 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:31:41.380 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:31:41.843 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:31:42.306 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:31:42.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:42.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:42.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:42.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:42.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:42.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:42.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:42.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:42.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:42.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:42.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:42.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:42.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:42.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:42.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:42.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:42.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:42.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:42.769 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:31:43.232 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:31:43.694 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:31:44.157 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:31:44.620 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:31:45.083 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:31:45.547 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:31:46.010 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:31:46.472 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:31:46.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:46.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:46.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:46.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:46.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:46.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:46.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:46.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:46.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:46.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:46.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:46.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:46.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:46.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:46.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:46.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:46.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:46.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:46.934 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:31:47.397 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:31:47.859 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:31:48.322 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:31:48.785 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:31:49.248 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:31:49.711 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:31:50.174 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:31:50.637 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:31:50.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:50.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:50.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:50.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:50.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:50.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:50.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:50.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:50.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:50.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:50.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:50.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:50.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:50.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:50.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:50.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:50.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:51.099 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:31:51.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:51.562 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:31:52.024 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:31:52.487 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:31:52.951 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:31:53.423 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:31:53.886 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:31:54.348 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:31:54.811 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:31:55.274 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:31:55.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:55.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:55.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:55.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:55.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:31:55.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:31:55.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:31:55.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:55.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:55.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:55.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:31:55.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:31:55.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:55.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:31:55.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:31:55.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:55.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:31:55.737 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:31:56.199 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:31:56.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:31:56.662 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:31:57.124 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:31:57.587 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:31:58.049 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:31:58.511 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:31:59.077 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:31:59.541 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:32:00.010 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:32:00.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:00.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:00.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:00.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:00.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:00.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:00.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:00.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:00.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:00.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:00.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:00.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:00.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:00.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:00.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:00.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:00.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:00.477 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:32:00.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:00.946 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:32:01.419 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:32:01.889 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:32:02.353 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:32:02.989 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:32:03.451 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:32:03.913 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:32:04.376 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:32:04.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:04.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:04.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:04.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:04.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:04.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:04.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:04.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:04.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:04.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:04.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:04.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:04.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:04.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:04.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:04.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:04.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:04.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:04.838 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:32:05.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:05.302 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:32:05.765 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:32:06.228 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:32:06.690 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:32:07.152 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:32:07.615 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:32:08.077 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:32:08.539 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:32:09.002 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:32:09.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:09.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:09.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:09.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:09.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:09.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:09.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:09.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:09.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:09.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:09.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:09.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:09.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:09.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:09.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:09.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:09.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:09.464 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:32:09.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:09.926 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:32:10.389 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:32:10.851 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:32:11.314 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:32:11.777 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:32:12.239 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:32:12.702 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:32:13.165 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:32:13.627 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:32:13.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:13.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:13.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:13.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:13.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:13.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:13.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:13.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:13.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:13.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:13.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:13.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:13.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:32:13.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:13.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:13.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:13.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:13.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:14.089 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:32:14.552 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:32:14.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:15.015 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:32:15.477 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 03:32:15.942 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 03:32:16.411 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 03:32:16.877 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 03:32:17.344 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 03:32:17.810 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 03:32:18.280 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 03:32:18.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:18.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:18.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:18.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:18.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:18.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:18.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:18.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:18.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:18.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:18.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:18.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:18.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:18.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:18.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:18.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:18.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:18.751 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 03:32:19.221 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 03:32:19.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:19.687 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 03:32:20.154 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 03:32:20.620 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 03:32:21.090 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 03:32:21.555 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 03:32:22.022 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 03:32:22.488 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 03:32:22.953 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 03:32:23.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:23.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:23.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:23.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:23.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:23.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:23.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:23.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:23.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:23.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:23.343 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:23.343 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:23.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:23.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:23.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:23.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:23.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:23.420 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 03:32:23.888 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 03:32:24.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:24.355 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 03:32:24.821 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 03:32:25.287 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 03:32:25.758 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 03:32:26.224 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 03:32:26.694 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 03:32:27.163 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 03:32:27.627 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 03:32:28.093 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 03:32:28.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:28.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:28.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:28.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:28.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:28.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:28.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:28.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:28.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:28.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:28.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:28.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:28.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:28.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:28.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:28.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:28.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:28.559 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 03:32:28.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:29.025 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 03:32:29.491 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 03:32:29.957 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 03:32:30.424 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 03:32:30.891 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 03:32:31.357 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 03:32:31.822 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 03:32:32.291 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 03:32:32.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:32.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:32.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:32.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:32.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:32.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:32.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:32.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:32.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:32.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:32.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:32.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:32.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:32.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:32.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:32.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:32.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:32.758 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 03:32:32.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:33.225 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 03:32:33.696 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 03:32:34.163 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 03:32:34.632 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 03:32:35.101 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 03:32:35.565 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 03:32:36.034 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 03:32:36.500 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 03:32:36.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:36.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:36.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:36.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:36.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:36.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:36.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:36.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:36.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:36.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:36.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:36.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:36.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:36.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:36.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:36.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:36.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:36.967 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 03:32:37.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:37.435 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 03:32:37.899 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 03:32:38.366 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 03:32:38.831 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 03:32:39.295 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 03:32:39.761 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 03:32:40.226 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 03:32:40.689 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 03:32:41.152 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 03:32:41.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:41.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:41.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:41.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:41.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:41.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:41.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:41.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:41.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:41.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:41.163 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:41.163 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:41.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:41.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:41.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:41.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:41.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:41.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:41.615 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 03:32:42.078 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 03:32:42.541 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 03:32:43.003 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 03:32:43.465 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 03:32:43.927 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 03:32:44.390 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 03:32:44.852 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 03:32:45.316 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 03:32:45.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:45.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:45.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:45.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:45.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:45.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:45.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:45.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:45.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:45.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:45.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:45.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:45.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:45.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:45.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:45.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:45.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:45.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:45.778 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 03:32:46.241 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 03:32:46.703 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 03:32:47.168 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 03:32:47.631 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 03:32:48.093 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 03:32:48.556 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 03:32:49.018 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 03:32:49.482 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 03:32:49.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:49.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:49.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:49.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:49.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:49.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:49.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:49.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:49.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:49.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:49.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:49.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:49.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:49.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:49.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:49.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:49.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:49.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:49.945 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 03:32:50.409 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 03:32:50.872 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 03:32:51.335 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 03:32:51.797 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 03:32:52.260 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 03:32:52.723 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 03:32:53.186 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 03:32:53.649 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 03:32:53.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:53.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:53.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:53.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:53.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:53.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:53.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:53.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:53.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:53.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:53.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:53.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:53.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:53.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:53.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:53.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:53.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:54.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:54.111 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 03:32:54.574 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 03:32:55.038 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 03:32:55.501 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 03:32:55.964 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 03:32:56.427 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 03:32:56.890 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 03:32:57.352 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 03:32:57.816 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 03:32:58.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:58.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:58.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:58.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:58.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:32:58.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:32:58.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:32:58.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:58.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:58.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:58.082 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:32:58.082 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:32:58.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:58.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:32:58.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:32:58.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:58.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:32:58.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:32:58.279 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 03:32:58.742 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 03:32:59.204 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 03:32:59.667 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 03:33:00.131 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 03:33:00.594 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 03:33:01.057 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 03:33:01.519 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 03:33:01.982 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 03:33:02.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:02.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:02.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:02.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:02.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:02.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:02.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:02.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:02.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:02.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:02.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:33:02.265 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:33:02.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:02.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:02.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:02.266 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19444 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:02.266 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19444 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:02.266 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19444 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:02.266 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19444 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:02.266 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19444 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:02.266 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19444 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:07.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:07.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:33:07.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:07.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:07.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:07.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:07.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:07.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:07.270 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:07.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:07.270 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:33:07.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:33:07.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:33:07.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:07.271 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:07.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:07.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:33:07.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:07.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:33:07.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:07.272 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:33:07.272 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:33:07.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:07.272 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:07.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:07.272 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:33:07.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:07.272 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:33:07.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:07.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:33:07.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:33:07.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:07.273 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:07.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:07.274 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:33:07.274 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:07.274 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:33:07.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:07.275 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:33:07.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:33:07.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:33:07.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:33:07.275 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:33:07.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:33:07.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:33:07.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:07.276 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:33:07.276 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:33:07.276 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:33:07.276 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:33:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:07.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:07.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:07.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:33:07.277 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:33:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:07.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:12.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:12.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:33:12.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:12.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:12.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:12.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:12.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:12.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:12.284 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:12.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:12.284 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:33:12.286 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:33:12.286 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:33:12.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:12.286 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:12.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:12.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:33:12.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:12.286 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:33:12.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:12.289 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:33:12.289 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:33:12.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:12.289 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:12.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:12.290 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:33:12.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:12.290 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:33:12.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:12.291 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:33:12.291 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:33:12.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:12.291 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:12.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:12.291 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:33:12.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:12.291 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:33:12.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:12.294 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:33:12.294 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:33:12.294 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:33:12.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:12.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:12.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:12.299 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:33:12.767 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:33:12.824 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:33:12.825 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:33:12.825 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:33:12.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:12.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:12.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:12.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:12.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:12.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:12.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:12.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:12.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:12.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:12.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:12.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:12.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:12.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:12.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:12.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:12.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:12.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:12.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:12.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:12.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:12.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:12.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:12.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:12.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:12.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:13.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:13.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:13.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:13.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:13.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:13.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:33:13.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:13.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:13.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:13.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:13.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:13.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:13.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:13.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:13.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:13.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:13.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:13.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:13.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:13.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:13.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:13.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:13.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:13.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:13.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:13.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:13.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:13.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:13.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:13.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:13.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:13.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:13.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:13.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:13.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:13.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:13.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:13.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:13.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:13.699 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:33:13.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:13.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:13.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:13.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:13.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:14.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:14.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:14.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:14.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:14.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:14.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:14.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:14.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:14.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:14.164 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:33:14.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:14.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:14.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:14.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:14.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:14.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:14.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:14.629 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:33:14.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:14.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:14.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:14.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:14.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:14.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:14.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:14.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:14.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:14.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:14.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:14.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:14.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:14.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:14.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:15.092 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:33:15.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:15.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:15.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:15.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:15.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:15.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:15.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:15.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:15.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:15.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:15.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:15.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:15.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:15.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:15.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:15.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:15.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:15.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:15.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:15.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:15.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:15.555 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:33:15.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:15.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:15.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:15.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:15.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:15.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:15.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:15.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:15.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:15.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:15.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:15.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:15.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:15.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:15.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:15.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:16.018 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:33:16.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:16.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:16.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:16.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:16.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:16.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:16.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:16.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:16.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:16.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:16.269 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:16.269 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:16.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:16.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:16.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:16.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:16.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:16.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:16.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:16.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:16.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:16.482 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:33:16.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:16.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:16.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:16.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:16.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:16.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:16.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:16.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:16.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:16.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:16.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:16.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:16.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:16.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:16.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:16.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:16.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:16.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:16.945 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:33:17.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:17.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:17.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:17.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:17.408 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:33:17.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:17.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:17.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:17.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:17.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:17.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:17.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:17.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:17.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:17.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:17.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:17.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:17.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:17.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:17.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:17.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:17.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:17.871 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:33:18.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:18.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:18.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:18.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:18.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:18.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:18.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:18.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:18.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:18.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:18.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:18.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:18.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:18.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:18.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:18.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:18.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:18.334 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:33:18.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:18.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:18.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:18.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:18.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:18.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:18.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:18.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:18.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:18.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:18.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:18.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:18.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:18.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:18.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:18.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:18.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:18.797 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:33:18.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:18.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:18.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:18.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:18.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:18.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:18.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:18.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:18.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:18.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:18.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:18.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:19.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:19.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:19.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:19.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.260 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:33:19.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:19.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:19.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:19.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:19.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:19.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:19.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:19.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:19.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:19.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:19.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:19.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:19.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:19.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.724 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:33:19.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:19.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:19.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:19.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:19.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:19.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:19.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:19.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:19.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:19.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:19.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:19.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:19.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:19.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:19.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:20.187 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:33:20.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:20.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:20.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:20.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:20.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:20.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:20.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:20.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:20.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:20.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:20.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:20.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:20.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:20.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:20.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:20.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:20.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:20.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:20.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:20.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:20.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:20.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:20.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:20.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:20.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:20.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:20.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:20.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:20.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:20.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:20.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:20.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:20.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:20.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:20.650 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:33:21.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:21.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:21.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:21.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:21.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:21.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:21.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:21.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:21.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:21.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:21.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:21.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:21.113 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:33:21.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:21.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:21.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:21.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:21.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:21.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:21.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:21.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:21.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:21.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:21.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:21.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:21.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:21.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:21.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:21.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:21.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:21.576 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:33:21.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:21.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:21.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:21.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:21.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:22.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:22.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:22.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:22.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:22.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:22.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:22.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:22.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:22.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:22.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:22.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:33:22.021 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:33:22.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:22.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:22.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:22.022 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:22.022 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:22.022 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:22.022 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:22.022 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:22.022 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:33:27.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:27.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:33:27.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:27.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:27.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:27.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:27.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:27.027 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:27.027 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:27.027 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:33:27.027 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:33:27.028 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:33:27.028 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:33:27.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:27.028 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:27.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:27.028 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:33:27.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:33:27.028 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:33:27.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:27.029 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:33:27.029 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:33:27.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:27.029 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:27.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:27.030 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:33:27.030 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:33:27.030 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:33:27.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:27.031 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:33:27.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:33:27.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:27.031 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:33:27.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:27.031 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:33:27.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:33:27.031 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:33:27.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:33:27.033 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:33:27.033 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:33:27.033 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:27.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:33:27.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:27.038 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:33:27.501 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:33:27.546 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:33:27.547 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:33:27.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:27.547 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:33:27.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:27.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:27.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:27.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:27.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:27.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:27.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:27.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:27.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:27.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:27.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:27.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:27.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:27.965 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:33:28.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:28.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:28.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:28.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:28.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:28.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:28.428 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:33:28.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:28.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:28.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:28.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:28.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:28.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:28.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:28.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:28.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:28.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:28.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:28.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:28.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:28.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:28.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:28.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:28.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:28.891 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:33:29.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:29.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:29.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:29.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:29.354 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:33:29.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:29.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:29.817 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:33:30.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:30.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:30.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:30.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:30.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:30.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:30.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:30.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:30.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:30.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:30.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:30.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:30.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:30.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:30.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:30.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:30.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:30.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:30.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:30.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:30.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:30.281 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:33:30.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:30.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:30.744 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:33:31.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:31.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:31.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:31.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:31.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:31.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:31.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:31.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:31.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:31.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:31.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:31.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:31.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:31.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:31.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:31.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:31.206 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:33:31.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:31.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:31.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:31.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:31.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:31.669 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:33:32.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:32.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:32.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:32.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:32.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:32.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:32.132 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:33:32.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:32.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:32.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:32.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:32.594 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:33:32.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:32.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:32.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:32.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:32.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:32.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:32.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:32.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:32.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:32.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:32.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:32.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:32.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:33.060 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:33:33.524 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:33:33.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:33.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:33.988 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:33:34.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:34.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:34.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:34.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:34.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:34.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:34.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:34.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:34.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:34.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:34.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:34.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:34.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:34.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:34.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:34.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:34.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:34.451 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:33:34.915 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:33:35.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:35.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:35.380 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:33:35.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:35.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:35.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:35.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:35.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:35.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:35.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:35.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:35.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:35.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:35.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:35.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:35.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:35.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:35.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:35.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:35.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:35.847 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:33:36.313 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:33:36.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:36.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:36.777 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:33:37.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:37.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:37.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:37.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:37.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:37.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:37.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:37.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:37.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:37.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:37.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:37.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:37.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:37.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:37.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:37.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:37.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:37.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:37.240 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:33:37.704 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:33:38.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:38.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:38.168 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:33:38.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:38.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:38.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:38.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:38.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:38.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:38.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:38.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:38.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:38.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:38.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:38.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:38.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:38.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:38.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:38.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:38.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:38.634 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:33:39.100 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:33:39.565 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:33:39.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:39.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:40.032 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:33:40.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:40.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:40.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:40.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:40.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:40.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:40.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:40.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:40.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:40.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:40.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:40.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:40.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:33:40.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:40.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:40.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:40.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:40.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:40.498 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:33:40.965 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:33:41.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:41.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:41.430 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:33:41.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:41.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:41.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:41.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:41.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:41.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:41.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:41.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:41.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:41.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:41.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:41.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:41.893 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:33:41.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:41.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:41.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:41.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:41.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:42.359 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:33:42.823 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:33:42.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:42.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:43.287 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:33:43.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:43.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:43.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:43.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:43.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:43.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:43.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:43.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:43.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:43.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:43.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:43.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:43.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:43.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:43.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:43.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:43.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:43.751 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:33:44.215 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:33:44.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:44.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:44.678 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:33:44.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:44.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:44.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:44.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:44.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:44.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:44.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:44.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:44.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:44.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:44.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:44.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:44.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:44.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:44.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:44.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:44.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:45.142 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:33:45.605 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:33:45.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:45.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:46.069 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:33:46.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:46.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:46.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:46.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:46.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:46.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:46.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:46.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:46.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:46.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:46.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:46.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:46.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:46.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:46.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:46.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:46.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:46.535 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:33:46.998 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:33:47.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:47.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:47.462 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:33:47.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:47.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:47.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:47.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:47.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:47.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:47.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:47.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:47.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:47.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:47.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:47.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:47.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:47.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:47.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:47.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:47.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:47.925 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:33:48.391 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:33:48.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:48.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:48.856 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:33:49.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:49.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:49.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:49.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:49.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:49.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:49.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:49.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:49.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:49.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:49.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:49.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:49.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:49.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:49.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:49.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:49.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:49.320 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:33:49.785 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:33:49.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:50.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:50.251 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:33:50.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:50.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:50.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:50.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:50.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:50.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:50.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:50.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:50.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:50.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:50.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:50.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:50.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:50.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:50.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:50.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:50.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:50.715 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:33:51.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:51.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:51.180 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:33:51.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:51.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:51.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:51.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:51.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:51.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:51.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:51.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:51.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:51.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:51.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:51.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:51.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:51.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:51.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:51.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:51.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:51.647 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:33:52.113 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:33:52.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:52.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:52.577 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:33:52.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:52.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:52.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:52.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:52.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:52.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:52.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:52.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:52.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:52.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:52.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:52.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:53.040 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:33:53.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:53.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:53.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:53.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:53.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:53.506 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:33:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:53.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:53.972 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:33:54.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:54.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:54.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:54.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:54.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:54.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:54.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:33:54.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:54.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:54.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:54.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:33:54.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:33:54.436 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:33:54.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:54.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:33:54.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:33:54.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:54.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:54.904 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:33:55.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:55.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:55.368 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:33:55.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:33:55.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:33:55.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:33:55.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:33:55.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:33:55.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:33:55.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:33:55.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:33:55.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:33:55.825 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:33:55.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:33:55.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:33:55.825 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:33:55.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:33:55.825 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:34:00.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:34:00.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:34:00.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:34:00.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:34:00.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:34:00.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:34:00.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:34:00.838 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:34:00.838 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:00.838 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:34:00.838 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:34:00.841 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:34:00.841 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:34:00.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:34:00.842 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:00.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:34:00.842 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:34:00.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:34:00.843 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:34:00.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:00.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:34:00.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:34:00.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:34:00.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:00.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:34:00.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:34:00.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:34:00.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:34:00.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:00.848 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:34:00.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:34:00.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:34:00.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:34:00.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:34:00.849 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:34:00.849 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:34:00.849 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:34:00.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:00.851 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:34:00.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:34:00.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:34:00.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:34:00.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:34:00.852 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:34:00.852 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:34:00.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:00.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:00.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:00.857 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:34:01.321 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:34:01.376 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:34:01.378 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:34:01.380 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:34:01.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:01.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:01.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:01.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:01.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:01.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:01.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:01.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:01.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:01.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:01.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:01.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:01.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:01.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:01.784 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:34:01.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:01.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:01.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:01.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:02.250 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:34:02.714 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:34:02.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:02.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:02.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:02.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:03.178 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:34:03.647 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:34:03.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:03.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:03.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:03.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:04.112 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:34:04.577 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:34:04.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:04.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:04.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:04.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:05.043 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:34:05.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:05.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:05.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:05.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:05.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:05.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:05.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:05.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:05.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:05.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:05.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:05.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:05.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:05.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:05.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:05.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:05.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:05.508 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:34:05.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:34:05.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:34:05.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:34:05.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:34:05.971 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:34:06.434 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:34:06.898 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:34:07.361 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:34:07.823 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:34:08.286 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:34:08.748 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:34:09.211 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:34:09.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:09.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:09.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:09.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:09.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:09.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:09.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:09.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:09.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:09.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:09.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:09.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:09.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:09.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:09.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:09.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:09.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:09.674 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:34:10.136 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:34:10.598 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:34:11.061 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:34:11.523 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:34:11.985 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:34:12.448 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:34:12.911 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:34:13.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:13.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:13.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:13.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:13.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:13.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:13.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:13.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:13.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:13.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:13.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:13.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:13.373 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:34:13.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:13.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:13.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:13.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:13.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:13.836 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:34:14.298 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:34:14.761 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:34:15.224 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:34:15.686 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:34:16.149 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:34:16.611 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:34:17.073 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:34:17.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:17.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:17.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:17.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:17.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:17.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:17.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:17.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:17.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:17.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:17.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:17.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:17.536 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:34:17.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:17.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:17.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:17.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:17.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:17.998 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:34:18.461 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:34:18.923 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:34:19.385 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:34:19.848 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:34:20.311 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:34:20.773 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:34:21.235 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:34:21.697 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:34:22.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:22.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:22.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:22.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:22.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:22.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:22.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:22.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:22.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:22.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:22.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:22.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:22.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:22.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:22.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:22.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:22.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:22.160 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:34:22.622 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:34:23.085 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:34:23.547 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:34:24.009 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:34:24.472 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:34:24.935 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:34:25.398 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:34:25.861 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:34:26.323 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:34:26.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:26.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:26.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:26.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:26.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:26.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:26.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:26.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:26.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:26.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:26.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:26.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:26.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:26.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:26.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:26.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:26.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:26.785 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:34:27.248 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:34:27.710 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:34:28.172 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:34:28.635 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:34:29.097 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:34:29.560 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:34:30.022 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:34:30.485 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:34:30.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:30.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:30.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:30.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:30.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:30.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:30.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:30.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:30.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:30.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:30.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:30.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:30.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:30.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:30.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:30.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:30.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:30.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:30.949 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:34:31.411 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:34:31.876 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:34:32.339 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:34:32.801 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:34:33.263 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:34:33.729 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:34:34.191 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:34:34.653 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:34:35.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:35.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:35.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:35.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:35.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:35.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:35.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:35.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:35.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:35.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:35.024 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:35.024 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:35.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:35.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:35.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:35.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:35.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:35.116 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:34:35.578 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:34:36.041 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:34:36.503 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:34:36.965 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:34:37.428 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:34:37.890 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:34:38.353 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:34:38.815 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:34:39.278 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:34:39.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:39.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:39.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:39.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:39.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:39.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:39.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:39.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:39.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:39.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:39.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:39.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:39.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:34:39.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:39.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:39.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:39.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:39.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:39.741 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:34:40.205 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:34:40.667 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:34:41.130 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:34:41.592 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:34:42.055 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:34:42.517 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 03:34:42.979 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 03:34:43.442 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 03:34:43.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:43.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:43.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:43.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:43.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:43.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:43.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:43.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:43.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:43.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:43.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:43.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:43.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:43.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:43.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:43.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:43.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:43.904 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 03:34:44.366 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 03:34:44.829 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 03:34:45.291 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 03:34:45.754 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 03:34:46.216 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 03:34:46.679 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 03:34:47.141 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 03:34:47.603 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 03:34:48.066 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 03:34:48.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:48.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:48.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:48.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:48.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:48.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:48.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:48.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:48.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:48.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:48.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:48.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:48.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:48.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:48.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:48.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:48.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:48.529 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 03:34:48.991 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 03:34:49.454 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 03:34:49.916 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 03:34:50.378 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 03:34:50.841 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 03:34:51.304 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 03:34:51.766 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 03:34:52.229 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 03:34:52.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:52.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:52.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:52.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:52.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:52.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:52.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:52.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:52.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:52.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:52.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:52.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:52.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:52.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:52.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:52.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:52.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:52.691 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 03:34:53.154 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 03:34:53.616 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 03:34:54.078 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 03:34:54.541 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 03:34:55.003 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 03:34:55.466 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 03:34:55.928 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 03:34:56.391 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 03:34:56.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:56.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:56.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:56.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:56.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:34:56.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:34:56.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:34:56.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:56.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:56.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:56.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:34:56.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:34:56.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:34:56.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:34:56.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:34:56.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:56.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:34:56.853 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 03:34:57.315 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 03:34:57.778 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 03:34:58.240 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 03:34:58.703 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 03:34:59.166 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 03:34:59.630 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 03:35:00.092 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 03:35:00.554 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 03:35:00.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:00.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:00.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:00.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:00.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:00.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:00.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:00.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:00.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:00.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:00.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:00.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:00.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:00.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:00.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:00.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:00.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:01.017 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 03:35:01.484 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 03:35:01.947 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 03:35:02.410 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 03:35:02.880 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 03:35:03.346 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 03:35:03.809 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 03:35:04.334 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 03:35:04.798 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 03:35:04.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:04.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:04.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:04.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:04.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:04.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:04.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:04.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:04.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:04.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:04.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:04.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:05.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:05.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:05.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:05.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:05.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:05.260 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 03:35:05.723 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 03:35:06.190 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 03:35:06.655 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 03:35:07.118 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 03:35:07.582 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 03:35:08.045 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 03:35:08.509 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 03:35:08.972 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 03:35:09.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:09.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:09.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:09.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:09.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:09.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:09.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:09.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:09.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:09.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:09.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:09.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:09.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:09.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:09.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:09.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:09.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:09.435 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 03:35:09.898 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 03:35:10.361 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 03:35:10.823 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 03:35:11.285 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 03:35:11.748 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 03:35:12.211 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 03:35:12.675 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 03:35:13.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:13.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:13.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:13.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:13.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:13.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:13.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:13.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:13.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:13.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:13.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:13.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:13.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:13.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:13.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:13.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:13.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:13.139 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 03:35:13.602 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 03:35:14.098 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 03:35:14.564 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 03:35:15.028 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 03:35:15.491 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 03:35:15.955 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 03:35:16.420 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 03:35:16.883 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 03:35:17.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:17.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:17.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:17.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:17.293 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=16819 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:17.294 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=16819 tn=2 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:17.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:17.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:17.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:17.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:17.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:17.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:17.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:17.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:17.349 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 03:35:17.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:17.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:17.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:17.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:17.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:17.814 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 03:35:18.278 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 03:35:18.743 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 03:35:19.207 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 03:35:19.672 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 03:35:20.136 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 03:35:20.605 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 03:35:21.069 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 03:35:21.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:21.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:21.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:21.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:21.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:21.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:21.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:21.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:21.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:21.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:21.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:21.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:21.534 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 03:35:21.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:21.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:21.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:21.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:21.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:21.999 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 03:35:22.464 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 03:35:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 03:35:23.395 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 03:35:23.865 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 03:35:24.334 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 03:35:24.796 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 03:35:25.261 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 03:35:25.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:25.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:25.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:25.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:25.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:25.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:25.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:25.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:25.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:25.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:35:25.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:35:25.716 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:35:25.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:25.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:25.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:25.717 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=18665 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:25.717 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=18665 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:25.717 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=18665 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:25.717 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=18665 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:25.717 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=18665 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:25.717 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=18665 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:35:30.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:35:30.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:35:30.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:30.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:30.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:30.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:30.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:30.718 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:35:30.719 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:30.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:35:30.719 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:35:30.720 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:35:30.720 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:35:30.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:35:30.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:30.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:30.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:35:30.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:35:30.720 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:35:30.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:30.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:35:30.721 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:35:30.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:35:30.721 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:30.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:30.721 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:35:30.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:35:30.722 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:35:30.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:30.723 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:35:30.723 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:35:30.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:35:30.723 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:30.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:30.723 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:35:30.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:35:30.723 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:35:30.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:35:30.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:35:30.725 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:35:30.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:30.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:30.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:35:30.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:35:30.726 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:35:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:35.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:35:35.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:35:35.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:35.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:35.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:35.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:35.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:35:35.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:35:35.732 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:35.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:35:35.732 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:35:35.733 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:35:35.733 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:35:35.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:35:35.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:35.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:35:35.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:35:35.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:35:35.733 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:35:35.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:35.734 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:35:35.734 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:35:35.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:35:35.734 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:35.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:35:35.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:35:35.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:35:35.735 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:35:35.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:35.735 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:35:35.735 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:35:35.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:35:35.736 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:35:35.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:35:35.736 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:35:35.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:35:35.736 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:35:35.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:35.737 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:35:35.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:35:35.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:35:35.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:35:35.737 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:35:35.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:35:35.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:35:35.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:35:35.738 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:35:35.738 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:35.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:35.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:35.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:35.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:35:35.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:35.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:35.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:35:35.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:35.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:35:35.743 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:35:36.206 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:35:36.253 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:35:36.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:36.254 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:35:36.254 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:35:36.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:36.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:36.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:36.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:36.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:36.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:36.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:36.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:36.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:36.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:36.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:36.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:36.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:36.669 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:35:36.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:36.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:36.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:36.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:37.131 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:35:37.593 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:35:37.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:37.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:37.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:37.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:38.056 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:35:38.518 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:35:38.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:38.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:38.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:38.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:38.980 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:35:39.443 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:35:39.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:39.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:39.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:39.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:39.926 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:35:40.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:40.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:40.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:40.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:40.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:40.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:40.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:40.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:40.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:40.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:40.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:40.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:40.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:40.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:40.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:40.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:40.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:40.388 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:35:40.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:35:40.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:35:40.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:35:40.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:35:40.851 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:35:41.313 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:35:41.776 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:35:42.238 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:35:42.700 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:35:43.163 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:35:43.625 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:35:44.087 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:35:44.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:44.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:44.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:44.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:44.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:44.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:44.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:44.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:44.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:44.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:44.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:44.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:44.550 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:35:44.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:44.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:44.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:44.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:44.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:45.013 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:35:45.475 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:35:45.938 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:35:46.401 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:35:46.864 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:35:47.326 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:35:47.788 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:35:48.251 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:35:48.713 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:35:48.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:48.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:48.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:48.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:48.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:48.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:48.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:48.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:48.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:48.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:48.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:48.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:48.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:48.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:48.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:48.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:48.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:49.177 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:35:49.640 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:35:50.102 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:35:50.565 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:35:51.028 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:35:51.490 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:35:51.953 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:35:52.416 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:35:52.879 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:35:53.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:53.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:53.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:53.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:53.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:53.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:53.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:53.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:53.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:53.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:53.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:53.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:53.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:53.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:53.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:53.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:53.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:53.342 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:35:53.806 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:35:54.268 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:35:54.731 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:35:55.194 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:35:55.657 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:35:56.119 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:35:56.582 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:35:57.045 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:35:57.507 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:35:57.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:57.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:57.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:57.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:57.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:35:57.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:35:57.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:35:57.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:57.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:57.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:57.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:35:57.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:35:57.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:35:57.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:35:57.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:35:57.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:57.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:35:57.970 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:35:58.434 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:35:58.897 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:35:59.359 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:35:59.823 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:36:00.285 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:36:00.748 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:36:01.214 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:36:01.676 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:36:02.139 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:36:02.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:02.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:02.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:02.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:02.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:02.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:02.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:02.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:02.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:02.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:02.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:02.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:02.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:02.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:02.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:02.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:02.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:02.601 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:36:03.063 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:36:03.526 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:36:03.990 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:36:04.453 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:36:04.916 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:36:05.380 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:36:05.842 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:36:06.305 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:36:06.767 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:36:07.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:07.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:07.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:07.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:07.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:07.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:07.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:07.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:07.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:07.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:07.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:07.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:07.230 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:36:07.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:07.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:07.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:07.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:07.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:07.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:07.693 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:36:08.183 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:36:08.645 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:36:09.108 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:36:09.570 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:36:10.034 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:36:10.496 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:36:10.960 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:36:11.424 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:36:11.887 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:36:11.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:11.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:11.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:11.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:11.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:11.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:11.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:12.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:12.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:12.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:12.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:12.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:12.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:12.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:12.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:12.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:12.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:12.349 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:36:12.813 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:36:13.276 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:36:13.738 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:36:14.201 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:36:14.665 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:36:15.128 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:36:15.590 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:36:16.054 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:36:16.517 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:36:16.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:16.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:16.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:16.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:16.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:16.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:16.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:16.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:16.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:16.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:16.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:16.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:16.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:36:16.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:16.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:16.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:16.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:16.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:16.979 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:36:17.442 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 03:36:17.905 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 03:36:18.367 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 03:36:18.830 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 03:36:19.292 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 03:36:19.755 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 03:36:20.218 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 03:36:20.680 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 03:36:21.143 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 03:36:21.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:21.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:21.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:21.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:21.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:21.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:21.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:21.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:21.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:21.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:21.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:21.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:21.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:21.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:21.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:21.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:21.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:21.607 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 03:36:22.071 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 03:36:22.533 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 03:36:22.995 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 03:36:23.458 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 03:36:23.923 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 03:36:24.386 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 03:36:24.848 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 03:36:25.310 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 03:36:25.773 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 03:36:26.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:26.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:26.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:26.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:26.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:26.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:26.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:26.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:26.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:26.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:26.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:26.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:26.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:26.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:26.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:26.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:26.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:26.427 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 03:36:26.890 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 03:36:27.352 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 03:36:27.814 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 03:36:28.277 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 03:36:28.741 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 03:36:29.203 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 03:36:29.666 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 03:36:30.130 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 03:36:30.592 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 03:36:31.055 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 03:36:31.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:31.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:31.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:31.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:31.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:31.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:31.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:31.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:31.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:31.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:31.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:31.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:31.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:31.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:31.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:31.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:31.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:31.518 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 03:36:31.981 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 03:36:32.445 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 03:36:32.909 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 03:36:33.373 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 03:36:33.836 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 03:36:34.300 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 03:36:34.763 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 03:36:35.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:35.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:35.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:35.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:35.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:35.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:35.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:35.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:35.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:35.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:35.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:35.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:35.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:35.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:35.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:35.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:35.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:35.227 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 03:36:35.689 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 03:36:36.152 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 03:36:36.615 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 03:36:37.078 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 03:36:37.541 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 03:36:38.003 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 03:36:38.466 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 03:36:38.929 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 03:36:39.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:39.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:39.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:39.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:39.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:39.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:39.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:39.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:39.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:39.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:39.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:39.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:39.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:39.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:39.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:39.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:39.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:39.391 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 03:36:39.854 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 03:36:40.317 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 03:36:40.780 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 03:36:41.245 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 03:36:41.710 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 03:36:42.174 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 03:36:42.637 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 03:36:43.099 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 03:36:43.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:43.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:43.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:43.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:43.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:43.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:43.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:43.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:43.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:43.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:43.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:43.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:43.561 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 03:36:43.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:43.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:43.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:43.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:43.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:44.024 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 03:36:44.487 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 03:36:44.949 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 03:36:45.411 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 03:36:45.874 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 03:36:46.337 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 03:36:46.810 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 03:36:47.340 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 03:36:47.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:47.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:47.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:47.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:47.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:47.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:47.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:47.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:47.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:47.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:47.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:47.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:47.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:47.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:47.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:47.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:47.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:47.802 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 03:36:48.265 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 03:36:48.729 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 03:36:49.191 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 03:36:49.654 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 03:36:50.116 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 03:36:50.579 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 03:36:51.043 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 03:36:51.505 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 03:36:51.967 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 03:36:52.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:52.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:52.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:52.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:52.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:52.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:52.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:52.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:52.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:52.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:52.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:52.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:52.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:52.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:52.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:52.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:52.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:52.430 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 03:36:52.893 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 03:36:53.356 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 03:36:53.818 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 03:36:54.281 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 03:36:54.743 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 03:36:55.205 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 03:36:55.667 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 03:36:56.130 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 03:36:56.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:56.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:56.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:56.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:56.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:36:56.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:36:56.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:36:56.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:56.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:56.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:56.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:36:56.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:36:56.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:36:56.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:36:56.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:36:56.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:56.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:36:56.592 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 03:36:57.055 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 03:36:57.517 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 03:36:57.980 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 03:36:58.442 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 03:36:58.905 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 03:36:59.367 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 03:36:59.830 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 03:37:00.293 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 03:37:00.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:00.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:00.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:00.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:00.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:00.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:00.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:00.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:00.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:00.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:00.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:00.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:00.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:00.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:00.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:00.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:00.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:00.756 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 03:37:01.218 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 03:37:01.680 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 03:37:02.144 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 03:37:02.606 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 03:37:03.069 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 03:37:03.531 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 03:37:03.994 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 03:37:04.457 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 03:37:04.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:04.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:04.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:04.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:04.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:04.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:04.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:04.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:04.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:04.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:04.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:04.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:04.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:37:04.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:37:04.664 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:37:09.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:37:09.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:37:09.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:09.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:09.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:09.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:09.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:09.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:37:09.673 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:09.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:37:09.673 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:37:09.675 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:37:09.675 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:37:09.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:37:09.675 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:09.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:09.675 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:37:09.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:37:09.675 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:37:09.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:09.677 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:37:09.677 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:37:09.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:37:09.677 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:09.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:09.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:37:09.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:37:09.677 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:37:09.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:09.678 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:37:09.678 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:37:09.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:37:09.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:09.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:09.678 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:37:09.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:37:09.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:37:09.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:09.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:09.681 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:37:09.681 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:37:09.681 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:37:09.681 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:37:09.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:09.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:09.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:09.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:09.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:37:09.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:37:09.681 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:37:09.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:09.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:09.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:14.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:37:14.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:37:14.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:14.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:14.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:14.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:14.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:14.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:37:14.692 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:14.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:37:14.692 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:37:14.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:37:14.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:37:14.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:37:14.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:14.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:14.694 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:37:14.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:37:14.694 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:37:14.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:14.696 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:37:14.696 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:37:14.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:37:14.697 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:14.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:14.697 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:37:14.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:37:14.697 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:37:14.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:14.699 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:37:14.699 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:37:14.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:37:14.699 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:14.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:14.699 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:37:14.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:37:14.699 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:37:14.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:14.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:37:14.703 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:37:14.703 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:37:14.703 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:14.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:14.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:14.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:14.707 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:37:15.170 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:37:15.242 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:37:15.244 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:37:15.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:15.245 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:37:15.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:15.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:15.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:15.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:15.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:15.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:15.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:15.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:15.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:15.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:15.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:15.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:15.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:15.634 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:37:15.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:15.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:15.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:15.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:16.099 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:37:16.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:16.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:16.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:16.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:16.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:16.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:16.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:16.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:16.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:16.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:16.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:16.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:16.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:16.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:16.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:16.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:16.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:16.564 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:37:16.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:16.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:16.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:16.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:17.029 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:37:17.493 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:37:17.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:17.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:17.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:17.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:17.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:17.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:17.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:17.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:17.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:17.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:17.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:17.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:17.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:17.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:17.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:17.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:17.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:17.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:17.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:17.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:17.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:17.958 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:37:18.423 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:37:18.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:18.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:18.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:18.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:18.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:18.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:18.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:18.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:18.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:18.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:18.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:18.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:18.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:18.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:18.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:18.888 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:37:18.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:18.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:18.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:18.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:18.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:19.352 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:37:19.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:19.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:19.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:19.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:19.817 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:37:20.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:20.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:20.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:20.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:20.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:20.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:20.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:20.281 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:37:20.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:20.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:20.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:20.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:20.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:20.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:20.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:20.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:20.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:20.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:20.746 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:37:21.211 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:37:21.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:21.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:21.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:21.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:21.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:21.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:21.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:21.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:21.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:21.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:21.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:21.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:21.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:21.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:21.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:21.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:21.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:21.675 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:37:22.139 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:37:22.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:22.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:22.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:22.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:22.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:22.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:22.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:22.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:22.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:22.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:22.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:22.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:22.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:22.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:22.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:22.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:22.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:22.602 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:37:23.066 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:37:23.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:23.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:23.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:23.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:23.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:23.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:23.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:23.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:23.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:23.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:23.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:23.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:23.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:23.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:23.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:23.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:23.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:23.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:23.549 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:37:24.012 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:37:24.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:24.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:24.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:24.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:24.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:24.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:24.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:24.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:24.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:24.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:24.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:24.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:24.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:24.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:24.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:24.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:24.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:24.475 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:37:24.938 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:37:25.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:25.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:25.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:25.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:25.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:25.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:25.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:25.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:25.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:25.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:25.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:25.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:25.401 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:37:25.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:25.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:25.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:25.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:25.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:25.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:25.863 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:37:26.326 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:37:26.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:26.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:26.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:26.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:26.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:26.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:26.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:26.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:26.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:26.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:26.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:26.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:26.788 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:37:26.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:26.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:26.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:26.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:26.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:27.251 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:37:27.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:27.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:27.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:27.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:27.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:27.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:27.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:27.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:27.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:27.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:27.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:27.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:27.714 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:37:27.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:27.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:27.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:27.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:27.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:28.177 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:37:28.639 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:37:28.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:28.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:28.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:28.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:28.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:28.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:28.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:28.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:28.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:28.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:28.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:28.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:28.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:28.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:28.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:28.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:28.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:29.102 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:37:29.564 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:37:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:29.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:29.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:29.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:29.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:29.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:29.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:29.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:29.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:29.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:29.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:29.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:29.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:29.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:29.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:29.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:29.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:30.028 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:37:30.490 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:37:30.953 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:37:31.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:31.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:31.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:31.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:31.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:31.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:31.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:31.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:31.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:31.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:31.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:31.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:31.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:31.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:31.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:31.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:31.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:31.415 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:37:31.878 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:37:32.340 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:37:32.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:32.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:32.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:32.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:32.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:32.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:32.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:32.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:32.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:32.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:32.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:32.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:32.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:32.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:32.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:32.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:32.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:32.803 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:37:33.265 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:37:33.728 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:37:33.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:33.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:33.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:33.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:33.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:33.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:33.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:33.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:33.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:33.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:33.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:33.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:33.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:33.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:33.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:33.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:33.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:34.190 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:37:34.653 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:37:35.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:35.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:35.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:35.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:35.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:35.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:35.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:35.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:35.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:35.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:35.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:35.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:35.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:35.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:35.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:35.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:35.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:35.116 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:37:35.578 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:37:36.041 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:37:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:36.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:36.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:36.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:36.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:36.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:36.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:36.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:36.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:36.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:36.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:36.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:36.504 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:37:36.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:36.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:36.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:36.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:36.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:36.968 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:37:37.431 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:37:37.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:37.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:37.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:37.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:37.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:37.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:37.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:37.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:37.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:37.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:37.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:37.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:37.895 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:37:37.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:37.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:37.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:37.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:37.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:38.359 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:37:38.824 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:37:39.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:39.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:39.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:39.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:39.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:39.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:39.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:39.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:39.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:39.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:39.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:39.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:39.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:37:39.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:37:39.273 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:37:44.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:37:44.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:37:44.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:44.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:44.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:44.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:44.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:37:44.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:37:44.282 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:44.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:37:44.282 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:37:44.283 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:37:44.283 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:37:44.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:37:44.283 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:44.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:37:44.283 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:37:44.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:37:44.283 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:37:44.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:44.285 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:37:44.285 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:37:44.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:37:44.286 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:44.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:37:44.286 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:37:44.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:37:44.286 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:37:44.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:44.288 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:37:44.288 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:37:44.288 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:37:44.288 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:37:44.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:37:44.288 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:37:44.288 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:37:44.288 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:37:44.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:44.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:37:44.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:37:44.293 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:37:44.293 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:37:44.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:44.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:44.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:37:44.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:37:44.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:37:44.761 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:37:44.816 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:37:44.817 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:37:44.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:44.818 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:37:44.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:44.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:44.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:44.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:44.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:44.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:44.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:44.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:44.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:37:44.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:44.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:44.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:44.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:45.225 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:37:45.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:45.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:45.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:45.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:45.689 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:37:46.152 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:37:46.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:46.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:46.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:46.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:46.615 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:37:47.079 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:37:47.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:47.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:47.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:47.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:47.542 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:37:47.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:48.006 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:37:48.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:48.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:48.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:48.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:48.468 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:37:48.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:48.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:48.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:48.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:48.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:48.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:48.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:48.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:48.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:48.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:48.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:37:48.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:48.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:48.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:48.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:48.931 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:37:49.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:37:49.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:37:49.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:37:49.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:37:49.393 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:37:49.856 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:37:50.318 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:37:50.781 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:37:51.243 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:37:51.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:51.706 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:37:52.168 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:37:52.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:52.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:52.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:52.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:52.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:52.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:52.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:52.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:52.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:52.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:52.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:52.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:52.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:37:52.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:52.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:52.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:52.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:52.630 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:37:53.093 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:37:53.555 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:37:54.019 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:37:54.482 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:37:54.944 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:37:55.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:55.407 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:37:55.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:55.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:55.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:55.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:55.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:55.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:55.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:55.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:55.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:55.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:55.869 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:37:55.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:37:55.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:55.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:55.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:55.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:56.332 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:37:56.794 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:37:57.258 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:37:57.721 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:37:58.187 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:37:58.651 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:37:58.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:59.116 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:37:59.581 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:37:59.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:37:59.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:59.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:59.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:59.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:37:59.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:37:59.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:37:59.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:59.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:59.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:59.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:37:59.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:37:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:37:59.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:37:59.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:37:59.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:37:59.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:00.047 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:38:00.513 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:38:00.977 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:38:01.440 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:38:01.902 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:38:02.365 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:38:02.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:02.827 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:38:03.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:03.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:03.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:03.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:03.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:03.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:03.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:03.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:03.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:03.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:03.289 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:38:03.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:03.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:03.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:03.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:03.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:03.752 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:38:04.214 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:38:04.677 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:38:05.139 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:38:05.601 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:38:06.063 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:38:06.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:06.525 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:38:06.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:06.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:06.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:06.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:06.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:06.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:06.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:06.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:06.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:06.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:06.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:06.966 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:06.987 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:38:07.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:07.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:07.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:07.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:07.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:07.449 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:38:07.911 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:38:08.373 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:38:08.836 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:38:09.298 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:38:09.762 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:38:10.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:10.226 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:38:10.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:10.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:10.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:10.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:10.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:10.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:10.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:10.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:10.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:10.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:10.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:10.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:10.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:10.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:10.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:10.688 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:38:11.151 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:38:11.615 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:38:12.081 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:38:12.547 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:38:13.011 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:38:13.473 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:38:13.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:13.936 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:38:14.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:14.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:14.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:14.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:14.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:14.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:14.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:14.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:14.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:38:14.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:38:14.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:38:14.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:38:14.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:38:14.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:38:14.328 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:38:19.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:38:19.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:38:19.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:38:19.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:38:19.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:38:19.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:38:19.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:38:19.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:38:19.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:19.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:38:19.333 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:38:19.334 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:38:19.334 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:38:19.334 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:38:19.334 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:19.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:38:19.334 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:38:19.334 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:38:19.334 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:38:19.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:19.335 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:38:19.335 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:38:19.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:38:19.335 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:19.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:38:19.335 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:38:19.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:38:19.335 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:38:19.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:19.336 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:38:19.336 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:38:19.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:38:19.336 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:38:19.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:38:19.336 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:38:19.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:38:19.336 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:38:19.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:19.338 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:38:19.338 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:38:19.338 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:38:19.339 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:38:19.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:38:19.343 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:38:19.807 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:38:19.854 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:38:19.855 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:38:19.856 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:38:19.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:19.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:19.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:19.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:19.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:19.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:19.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:19.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:19.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:19.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:19.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:19.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:19.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:19.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:20.270 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:38:20.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:20.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:20.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:20.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:38:21.196 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:38:21.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:21.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:21.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:21.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:21.661 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:38:22.126 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:38:22.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:22.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:22.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:22.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:22.592 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:38:22.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:23.056 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:38:23.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:23.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:23.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:23.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:23.518 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:38:23.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:23.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:23.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:23.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:23.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:23.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:23.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:23.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:23.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:23.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:23.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:23.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:23.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:23.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:23.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:23.982 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:38:24.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:38:24.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:38:24.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:38:24.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:38:24.448 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:38:24.912 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:38:25.374 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:38:25.836 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:38:26.298 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:38:26.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:26.761 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:38:27.223 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:38:27.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:27.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:27.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:27.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:27.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:27.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:27.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:27.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:27.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:27.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:27.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:27.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:27.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:27.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:27.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:27.687 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:38:28.153 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:38:28.617 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:38:29.083 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:38:29.548 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:38:30.011 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:38:30.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:30.475 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:38:30.940 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:38:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:31.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:31.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:31.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:31.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:31.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:31.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:31.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:31.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:31.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:31.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:31.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:31.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:31.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:31.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:31.407 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:38:31.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:31.875 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:38:32.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:32.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:32.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:32.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:32.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:32.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:32.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:32.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:32.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:32.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:32.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:32.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:32.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:32.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:32.337 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:38:32.800 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:38:33.267 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:38:33.738 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:38:34.203 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:38:34.667 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:38:35.130 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:38:35.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:35.594 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:38:35.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:35.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:35.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:35.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:35.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:35.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:35.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:35.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:35.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:35.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:35.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:35.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:35.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:35.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:35.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:36.063 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:38:36.528 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:38:36.993 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:38:37.458 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:38:37.927 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:38:38.394 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:38:38.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:38.858 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:38:39.326 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:38:39.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:39.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:39.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:39.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:39.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:39.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:39.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:39.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:39.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:39.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:39.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:39.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:39.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:39.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:39.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:39.791 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:38:40.255 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:38:40.725 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:38:41.189 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:38:41.654 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:38:42.126 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:38:42.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:42.590 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:38:43.054 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:38:43.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:43.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:43.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:43.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:43.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:43.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:43.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:43.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:43.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:43.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:43.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:43.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:43.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:43.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:43.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:43.517 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:38:43.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:43.982 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:38:44.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:44.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:44.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:44.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:44.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:44.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:44.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:44.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:44.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:44.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:44.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:44.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:44.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:44.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:44.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:44.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:44.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:44.445 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:38:44.909 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:38:45.374 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:38:45.840 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:38:46.303 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:38:46.769 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:38:47.232 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:38:47.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:47.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:47.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:47.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:47.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:47.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:47.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:47.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:47.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:47.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:47.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:47.698 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:38:47.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:47.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:47.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:47.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:47.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:48.160 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:38:48.623 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:38:49.086 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:38:49.549 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:38:50.013 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:38:50.478 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:38:50.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:50.941 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:38:51.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:51.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:51.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:51.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:51.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:51.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:51.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:51.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:51.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:51.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:51.405 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:38:51.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:51.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:51.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:51.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:51.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:51.873 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:38:52.336 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:38:52.804 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:38:53.271 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:38:53.735 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:38:54.200 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:38:54.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:54.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:54.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:54.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:54.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:54.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:54.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:54.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:54.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:54.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:54.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:54.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:54.667 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:38:54.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:54.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:54.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:54.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:55.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:55.134 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:38:55.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:55.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:55.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:55.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:55.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:55.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:55.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:55.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:55.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:55.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:55.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:55.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:55.597 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:38:55.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:55.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:55.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:55.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:55.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:56.060 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:38:56.525 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:38:56.989 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:38:57.452 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:38:57.914 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:38:58.384 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:38:58.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:58.854 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:38:59.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:38:59.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:59.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:38:59.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:38:59.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:38:59.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:59.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:59.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:59.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:38:59.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:38:59.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:38:59.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:38:59.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:38:59.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:59.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:38:59.326 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:38:59.797 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:39:00.267 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:39:00.740 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:39:01.213 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 03:39:01.685 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 03:39:02.154 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 03:39:02.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:02.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:02.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:02.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:02.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:39:02.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:39:02.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:02.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:02.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:02.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:39:02.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:39:02.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:39:02.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:02.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:02.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:02.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:02.626 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 03:39:03.097 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 03:39:03.571 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 03:39:04.042 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 03:39:04.514 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 03:39:04.981 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 03:39:05.452 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 03:39:05.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:05.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:05.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:05.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:05.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:39:05.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:39:05.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:05.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:05.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:05.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:39:05.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:39:05.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:39:05.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:05.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:05.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:05.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:05.918 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 03:39:06.389 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 03:39:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:06.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:06.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:06.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:06.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:39:06.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:06.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:06.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:06.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:06.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:06.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:06.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:06.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:39:06.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:39:06.796 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:39:06.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:11.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:39:11.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:39:11.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:11.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:11.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:11.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:11.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:11.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:39:11.811 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:11.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:39:11.811 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:39:11.814 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:39:11.814 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:39:11.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:39:11.814 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:11.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:11.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:39:11.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:39:11.815 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:39:11.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:11.817 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:39:11.817 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:39:11.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:39:11.817 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:11.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:11.817 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:39:11.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:39:11.817 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:39:11.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:11.819 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:39:11.819 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:39:11.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:39:11.819 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:11.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:11.820 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:39:11.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:39:11.820 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:39:11.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:11.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:39:11.825 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:39:11.825 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:39:11.825 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:11.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:11.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:11.829 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:39:12.300 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:39:12.354 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:39:12.356 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:39:12.358 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:39:12.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:12.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:12.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:39:12.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:39:12.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:12.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:12.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:12.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:39:12.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:39:12.768 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:39:12.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:12.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:12.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:12.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:13.238 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:39:13.709 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:39:13.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:13.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:13.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:13.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:14.180 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:39:14.651 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:39:14.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:14.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:14.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:14.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:15.121 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:39:15.588 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:39:15.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:15.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:15.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:15.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:16.058 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:39:16.529 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:39:16.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:16.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:16.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:16.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:17.000 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:39:17.471 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:39:17.941 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:39:18.412 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:39:18.883 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:39:19.354 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:39:19.825 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:39:20.296 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:39:20.766 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:39:21.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:21.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:39:21.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:21.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:21.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:21.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:21.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:21.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:39:21.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:39:21.137 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:39:21.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:21.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:21.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:21.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2020 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:39:21.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2020 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:39:21.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2020 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:39:21.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2020 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:39:21.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2020 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:39:21.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2020 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:39:26.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:39:26.138 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:39:26.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:26.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:26.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:26.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:26.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:26.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:39:26.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:26.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:39:26.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:39:26.147 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:39:26.147 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:39:26.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:39:26.147 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:26.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:26.148 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:39:26.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:39:26.148 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:39:26.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:26.155 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:39:26.155 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:39:26.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:39:26.156 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:26.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:26.156 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:39:26.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:39:26.156 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:39:26.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:26.162 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:39:26.162 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:39:26.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:39:26.162 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:26.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:26.162 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:39:26.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:39:26.163 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:39:26.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:26.167 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:39:26.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:39:26.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:39:26.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:39:26.167 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:39:26.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:39:26.168 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:39:26.168 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:39:26.168 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:39:26.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:26.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:26.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:26.173 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:39:26.641 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:39:26.697 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:39:26.699 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:39:26.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:26.701 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:39:26.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:26.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:39:26.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:39:26.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:26.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:26.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:26.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:39:26.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:39:27.109 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:39:27.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:27.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:27.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:27.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:27.580 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:39:28.051 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:39:28.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:28.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:28.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:28.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:28.521 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:39:28.992 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:39:29.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:29.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:29.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:29.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:39:29.934 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:39:30.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:30.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:30.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:30.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:30.404 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:39:30.876 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:39:31.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:31.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:31.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:31.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:31.347 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:39:31.817 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:39:32.284 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:39:32.754 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:39:33.224 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:39:33.695 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:39:34.166 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:39:34.637 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:39:35.108 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:39:35.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:35.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:39:35.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:35.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:35.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:35.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:35.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:35.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:35.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:35.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:35.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:39:35.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:39:35.484 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:39:40.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:39:40.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:39:40.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:40.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:40.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:40.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:40.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:40.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:39:40.491 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:40.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:39:40.491 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:39:40.492 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:39:40.492 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:39:40.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:39:40.492 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:40.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:40.493 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:39:40.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:39:40.493 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:39:40.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:40.494 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:39:40.494 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:39:40.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:39:40.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:40.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:40.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:39:40.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:39:40.494 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:39:40.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:40.496 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:39:40.496 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:39:40.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:39:40.496 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:40.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:40.496 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:39:40.496 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:39:40.496 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:39:40.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:40.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:39:40.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:40.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:39:40.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:39:40.499 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:39:40.500 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:40.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:40.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:39:40.981 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:39:41.033 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:39:41.035 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:39:41.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:41.037 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:39:41.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:41.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:39:41.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:39:41.453 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:39:41.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:41.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:41.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:41.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:41.929 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:39:42.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:42.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:42.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:42.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:39:42.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:39:42.401 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:39:42.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:42.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:42.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:42.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:42.872 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:39:43.343 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:39:43.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:43.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:43.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:43.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:43.812 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:39:44.280 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:39:44.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:44.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:44.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:44.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:44.753 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:39:45.226 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:39:45.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:45.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:45.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:45.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:45.693 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:39:46.160 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:39:46.626 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:39:47.096 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:39:47.563 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:39:48.033 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:39:48.504 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:39:48.974 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:39:49.445 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:39:49.911 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:39:50.379 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:39:50.844 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:39:51.312 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:39:51.780 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:39:52.260 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:39:52.726 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:39:53.198 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:39:53.667 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:39:53.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:53.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:39:53.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:53.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:53.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:53.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:53.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:53.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:53.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:53.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:53.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:39:53.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:39:53.821 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:39:58.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:39:58.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:39:58.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:58.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:58.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:58.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:58.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:39:58.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:39:58.847 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:58.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:39:58.848 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:39:58.854 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:39:58.855 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:39:58.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:39:58.855 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:58.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:39:58.856 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:39:58.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:39:58.857 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:39:58.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:58.860 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:39:58.860 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:39:58.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:39:58.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:58.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:39:58.861 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:39:58.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:39:58.861 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:39:58.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:58.864 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:39:58.864 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:39:58.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:39:58.864 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:39:58.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:39:58.864 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:39:58.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:39:58.864 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:39:58.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:58.867 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:39:58.867 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:39:58.867 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:39:58.868 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:39:58.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:39:58.872 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:39:59.342 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:39:59.396 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:39:59.397 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:39:59.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:39:59.400 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:39:59.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:39:59.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:39:59.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:39:59.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:39:59.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:39:59.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:39:59.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:39:59.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:39:59.812 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:39:59.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:39:59.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:39:59.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:39:59.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:00.285 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:40:00.432 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:00.757 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:40:00.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:00.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:00.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:00.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:00.959 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:01.228 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:40:01.475 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:01.700 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:40:01.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:01.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:01.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:01.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:02.173 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:40:02.645 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:40:02.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:02.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:02.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:02.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:03.118 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:40:03.491 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:03.590 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:40:03.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:03.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:03.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:03.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:04.028 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:04.058 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:40:04.528 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:40:04.541 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:04.999 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:40:05.057 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:05.470 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:40:05.943 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:40:06.412 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:40:06.882 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:40:07.063 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:07.353 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:40:07.826 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:40:08.294 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:40:08.765 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:40:09.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:09.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:09.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:09.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:09.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:09.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:09.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:09.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:09.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:09.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:09.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:09.115 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:40:09.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:09.115 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2219 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:09.115 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2219 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:09.115 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2219 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:09.115 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2219 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:09.115 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2219 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:09.115 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2219 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:14.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:14.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:14.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:14.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:14.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:14.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:14.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:14.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:14.125 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:14.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:14.126 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:40:14.128 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:40:14.128 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:40:14.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:14.128 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:14.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:14.129 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:40:14.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:14.129 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:40:14.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:14.130 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:40:14.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:40:14.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:14.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:14.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:14.131 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:40:14.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:14.131 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:40:14.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:14.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:40:14.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:40:14.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:14.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:14.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:14.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:40:14.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:14.133 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:40:14.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:40:14.135 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:40:14.135 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:40:14.135 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:14.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:14.140 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:40:14.611 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:40:14.658 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:14.660 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:40:14.661 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:40:14.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:14.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:14.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:14.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:14.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:14.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:14.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:14.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:14.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:14.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:14.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:14.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:14.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:14.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:14.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:14.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:14.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:14.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:14.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:14.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:14.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:14.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:14.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:14.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:14.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:14.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:14.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:14.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:14.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:14.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:14.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:14.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.078 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:40:15.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:15.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:15.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:15.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:15.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.545 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:40:15.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.567 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.567 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:15.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:15.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:15.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:15.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:15.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:15.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:15.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:15.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:15.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:15.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:15.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:15.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.009 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:40:16.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:16.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:16.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:16.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:16.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:16.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:16.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:16.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:16.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:16.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:16.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:16.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:16.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:16.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:16.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:16.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:16.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:16.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:16.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:16.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:16.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:16.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:16.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:16.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:16.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:16.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:16.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:16.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:16.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:16.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:16.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:16.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:16.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.477 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:40:16.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:16.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:16.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:16.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:16.583 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=535 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:16.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:16.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:16.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:16.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:16.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:16.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:16.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:16.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:16.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:16.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:16.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:16.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:16.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:16.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:16.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:16.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:16.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:16.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:16.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:16.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:16.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:16.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:16.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:16.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:16.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:16.945 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:40:17.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:17.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:17.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:17.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:17.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:17.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:17.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:17.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:17.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:17.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:17.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:17.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:17.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:17.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:17.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:17.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:17.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:17.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:17.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:17.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:17.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:17.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:17.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:17.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:17.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:17.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:17.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:17.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:17.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:17.412 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:40:17.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:17.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:17.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:17.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:17.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:17.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:17.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:17.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:17.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:17.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:17.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:17.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:17.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:17.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:17.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:17.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:17.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:17.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:17.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:17.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:17.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:17.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:17.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:17.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:17.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:17.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:17.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:17.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:17.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:17.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:17.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:17.854 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:40:17.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=812 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:17.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=812 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:17.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=812 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:17.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=812 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:22.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:22.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:22.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:22.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:22.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:22.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:22.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:22.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:22.874 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:22.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:22.874 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:40:22.876 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:40:22.876 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:40:22.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:22.876 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:22.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:22.877 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:40:22.877 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:22.877 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:40:22.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:22.880 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:40:22.880 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:40:22.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:22.880 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:22.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:22.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:40:22.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:22.881 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:40:22.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:22.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:40:22.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:40:22.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:22.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:22.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:22.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:40:22.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:22.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:40:22.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:22.892 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:40:22.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:40:22.892 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:40:22.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:40:22.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:40:22.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:40:22.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:40:22.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:40:22.893 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:40:22.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:22.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:40:22.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:22.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:22.893 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:40:22.893 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:40:22.893 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:40:22.893 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:40:22.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:22.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:22.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:22.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:40:22.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:22.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:22.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:22.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:22.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:22.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:22.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:22.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:22.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:22.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:22.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:22.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:40:23.369 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:40:23.427 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:23.429 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:40:23.430 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:40:23.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:23.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:23.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:23.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:40:23.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:23.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:23.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:23.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:40:23.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:40:23.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 03:40:23.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:40:23.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:40:23.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:23.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:40:23.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:23.836 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:40:23.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:23.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:23.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:23.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:24.304 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:40:24.773 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:40:24.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:24.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:24.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:24.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:25.245 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:40:25.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:40:25.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:40:25.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:25.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:25.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:25.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:25.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:25.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:25.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:25.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:25.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:25.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:25.537 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:40:30.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:30.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:30.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:30.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:30.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:30.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:30.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:30.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:30.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:30.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:30.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:40:30.557 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:40:30.557 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:40:30.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:30.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:30.558 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:40:30.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:30.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:30.558 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:40:30.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:30.563 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:40:30.563 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:40:30.564 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:30.564 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:30.564 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:40:30.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:30.564 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:30.564 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:40:30.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:30.568 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:40:30.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:40:30.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:30.569 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:30.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:30.569 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:40:30.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:30.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:40:30.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:30.573 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:40:30.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:40:30.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:40:30.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:40:30.573 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:40:30.574 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:40:30.574 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:40:30.574 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:30.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:30.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:30.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:30.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:30.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:30.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:30.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:30.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:30.576 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:40:30.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:30.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:30.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:35.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:35.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:35.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:35.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:35.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:35.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:35.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:35.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:35.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:35.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:35.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:40:35.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:40:35.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:40:35.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:35.599 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:35.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:35.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:40:35.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:35.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:40:35.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:35.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:40:35.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:40:35.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:35.602 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:35.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:35.603 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:40:35.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:35.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:40:35.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:35.605 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:40:35.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:40:35.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:35.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:35.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:35.605 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:40:35.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:35.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:40:35.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:35.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:40:35.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:40:35.608 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:40:35.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:35.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:35.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:40:36.076 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:40:36.142 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:36.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:36.144 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:40:36.147 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:40:36.540 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:40:36.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:36.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:36.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:36.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:37.008 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:40:37.480 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:40:37.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:37.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:37.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:37.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:37.946 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:40:38.410 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:40:38.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:38.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:38.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:38.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:38.874 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:40:39.346 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:40:39.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:39.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:39.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:39.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:39.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:40:40.281 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:40:40.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:40.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:40.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:40.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:40.747 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:40:41.212 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:40:41.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:41.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:41.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:41.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:41.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:41.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:41.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:41.632 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:40:41.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:41.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:41.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:41.632 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1317 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:41.632 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1317 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:41.632 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1317 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:41.632 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1317 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:41.632 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1317 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:41.632 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1317 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:41.632 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1317 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:46.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:46.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:46.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:46.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:46.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:46.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:46.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:46.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:46.647 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:46.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:46.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:40:46.650 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:40:46.651 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:40:46.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:46.651 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:46.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:46.652 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:40:46.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:46.652 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:40:46.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:46.653 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:40:46.654 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:40:46.654 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:46.654 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:46.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:46.654 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:40:46.654 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:46.654 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:40:46.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:46.659 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:40:46.659 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:40:46.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:46.659 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:46.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:46.659 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:40:46.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:46.659 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:40:46.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:46.666 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:40:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:40:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:40:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:40:46.666 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:40:46.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:40:46.667 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:40:46.667 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:40:46.667 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:40:46.672 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:40:47.142 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:40:47.194 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:40:47.196 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:40:47.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:40:47.198 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:40:47.613 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:40:47.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:47.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:47.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:47.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:48.080 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:40:48.547 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:40:48.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:48.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:48.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:48.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:49.017 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:40:49.488 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:40:49.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:49.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:49.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:49.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:49.959 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:40:50.426 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:40:50.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:50.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:50.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:50.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:50.890 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:40:51.357 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:40:51.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:51.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:51.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:51.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:51.828 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:40:52.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:52.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:52.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:52.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:52.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:52.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:52.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:52.212 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:40:52.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:52.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:52.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:52.212 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1207 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:52.212 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1207 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:52.212 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1207 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:52.212 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1207 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:52.212 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1207 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:52.212 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1207 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:40:57.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:57.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:57.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:57.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:57.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:57.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:57.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:57.223 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:57.223 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:57.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:40:57.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:40:57.226 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:40:57.226 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:40:57.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:57.227 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:57.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:40:57.227 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:40:57.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:40:57.227 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:40:57.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:40:57.229 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:40:57.229 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:40:57.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:57.230 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:57.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:40:57.230 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:40:57.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:40:57.230 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:40:57.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:40:57.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:40:57.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:40:57.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:57.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:40:57.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:40:57.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:40:57.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:40:57.232 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:40:57.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:40:57.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:40:57.236 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:40:57.236 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:40:57.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:40:57.236 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:40:57.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:02.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:41:02.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:41:02.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:02.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:02.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:02.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:02.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:02.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:02.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:02.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:02.254 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:41:02.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:41:02.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:41:02.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:02.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:02.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:02.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:41:02.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:02.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:41:02.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:02.261 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:41:02.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:41:02.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:02.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:02.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:02.262 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:41:02.262 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:02.262 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:41:02.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:02.265 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:41:02.265 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:41:02.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:02.265 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:02.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:02.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:41:02.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:02.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:41:02.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:02.269 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:41:02.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:41:02.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:41:02.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:41:02.269 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:41:02.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:02.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:41:02.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:41:02.270 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:41:02.271 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:02.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:02.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:02.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:02.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:02.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:02.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:02.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:02.275 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:41:02.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:41:02.803 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:41:02.805 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:41:02.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:02.807 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:41:02.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:02.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:41:02.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:41:03.213 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:41:03.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:03.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:03.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:03.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:03.680 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:41:03.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:03.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:03.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:03.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:41:03.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:41:04.147 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:41:04.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:04.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:04.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:04.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:04.617 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:41:05.084 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:41:05.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:05.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:05.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:05.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:05.553 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:41:06.021 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:41:06.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:06.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:06.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:06.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:06.492 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:41:06.961 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:41:07.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:07.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:07.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:07.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:07.428 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:41:07.896 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:41:08.361 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:41:08.831 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:41:09.301 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:41:09.773 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:41:10.244 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:41:10.715 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:41:11.185 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:41:11.656 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:41:12.122 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:41:12.588 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:41:13.059 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:41:13.529 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:41:13.997 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:41:14.467 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:41:14.938 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:41:15.409 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:41:15.879 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:41:16.350 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:41:16.823 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:41:17.296 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:41:17.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:17.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:41:17.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:17.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:17.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:17.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:17.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:17.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:17.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:41:17.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:41:17.534 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:41:17.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:17.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:17.535 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3317 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:17.535 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3317 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:17.535 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3317 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:17.536 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3317 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:17.536 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3317 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:17.536 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3317 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:22.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:41:22.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:41:22.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:22.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:22.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:22.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:22.547 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:22.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:22.548 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:22.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:22.548 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:41:22.550 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:41:22.550 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:41:22.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:22.550 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:22.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:22.551 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:41:22.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:22.551 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:41:22.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:22.552 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:41:22.552 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:41:22.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:22.552 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:22.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:22.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:41:22.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:22.553 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:41:22.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:22.554 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:41:22.554 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:41:22.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:22.554 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:22.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:22.554 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:41:22.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:22.554 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:41:22.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:22.556 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:41:22.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:41:22.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:41:22.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:41:22.556 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:41:22.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:41:22.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:41:22.557 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:41:22.557 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:41:22.557 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:22.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:22.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:22.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:22.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:22.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:22.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:22.562 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:41:23.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:41:23.081 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:41:23.083 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:41:23.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:23.084 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:41:23.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:23.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:41:23.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:41:23.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:23.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:23.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:23.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:41:23.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:41:23.125 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:41:23.128 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:41:23.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:23.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:23.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:23.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:23.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:23.500 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:41:23.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:23.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:23.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:23.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:23.972 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:41:24.443 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:41:24.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:24.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:24.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:24.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:24.913 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:41:25.383 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:41:25.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:25.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:25.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:25.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:25.849 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:41:26.318 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:41:26.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:26.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:26.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:26.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:26.785 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:41:27.253 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:41:27.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:27.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:27.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:27.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:27.724 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:41:28.195 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:41:28.665 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:41:29.136 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:41:29.607 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:41:30.077 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:41:30.548 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:41:31.019 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:41:31.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:31.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:31.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:31.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:41:31.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:31.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:31.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:31.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:31.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:31.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:31.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:41:31.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:41:31.163 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:41:31.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:31.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:31.164 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1869 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:31.164 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1869 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:31.164 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1869 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:31.164 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1869 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:31.164 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1869 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:31.164 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1869 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:41:36.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:41:36.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:41:36.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:36.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:36.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:36.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:36.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:36.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:36.172 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:36.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:36.173 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:41:36.175 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:41:36.176 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:41:36.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:36.176 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:36.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:36.176 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:41:36.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:36.176 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:41:36.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:36.179 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:41:36.179 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:41:36.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:36.179 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:36.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:36.179 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:41:36.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:36.179 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:41:36.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:36.181 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:41:36.182 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:41:36.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:36.182 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:36.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:36.182 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:41:36.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:36.182 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:41:36.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:41:36.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:36.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:36.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:41:36.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:41:36.187 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:41:36.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:41:36.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:36.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:36.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:36.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:41:36.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:36.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:36.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:36.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:36.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:36.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:36.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:36.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:36.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:36.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:36.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:36.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:36.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:36.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:41:36.663 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:41:36.713 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:41:36.716 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:41:36.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:36.718 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:41:36.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:36.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:41:36.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:41:36.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:36.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:36.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:36.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:41:36.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:41:36.755 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:41:36.758 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:41:36.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:36.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:36.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:36.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:36.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:37.135 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:41:37.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:37.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:37.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:37.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:37.606 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:41:38.077 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:41:38.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:38.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:38.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:38.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:38.543 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:41:39.009 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:41:39.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:39.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:39.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:39.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:39.480 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:41:39.951 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:41:40.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:40.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:40.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:40.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:40.422 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:41:40.894 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:41:41.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:41.364 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:41:41.836 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:41:42.308 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:41:42.781 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:41:43.253 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:41:43.723 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:41:44.195 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:41:44.666 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:41:44.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:44.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:44.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:44.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:41:44.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:44.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:44.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:44.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:44.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:44.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:44.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:44.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:44.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:41:44.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:41:44.781 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:41:49.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:41:49.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:41:49.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:49.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:49.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:49.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:49.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:41:49.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:49.795 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:49.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:41:49.796 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:41:49.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:41:49.797 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:41:49.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:49.797 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:49.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:41:49.797 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:41:49.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:41:49.797 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:41:49.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:49.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:41:49.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:41:49.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:49.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:49.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:41:49.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:41:49.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:41:49.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:41:49.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:49.800 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:41:49.800 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:41:49.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:49.800 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:41:49.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:41:49.800 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:41:49.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:41:49.800 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:41:49.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:41:49.802 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:41:49.802 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:41:49.802 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:41:49.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:41:49.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:41:49.807 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:41:50.284 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:41:50.328 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:41:50.330 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:41:50.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:50.332 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:41:50.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:50.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:41:50.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:41:50.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:50.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:50.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:50.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:41:50.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:41:50.375 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:41:50.378 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:41:50.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:50.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:50.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:50.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:50.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:50.756 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:41:50.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:50.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:50.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:50.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:51.227 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:41:51.698 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:41:51.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:51.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:51.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:51.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:52.169 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:41:52.639 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:41:52.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:52.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:52.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:52.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:53.110 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:41:53.581 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:41:53.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:53.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:53.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:53.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:54.052 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:41:54.522 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:41:54.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:41:54.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:41:54.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:41:54.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:41:54.993 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:41:55.466 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:41:55.939 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:41:56.411 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:41:56.881 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:41:57.352 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:41:57.819 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:41:58.288 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:41:58.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:58.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:58.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:58.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:41:58.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:41:58.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:41:58.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:41:58.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:58.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:58.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:58.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:41:58.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:41:58.418 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:41:58.419 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:41:58.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:41:58.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:41:58.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:41:58.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:58.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:41:58.760 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:41:59.232 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:41:59.703 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:42:00.174 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:42:00.645 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:42:01.116 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:42:01.588 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:42:02.061 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:42:02.533 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:42:03.004 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:42:03.475 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:42:03.948 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:42:04.421 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:42:04.893 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:42:05.364 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:42:05.837 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:42:06.307 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:42:06.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:06.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:06.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:06.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:42:06.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:06.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:06.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:06.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:06.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:06.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:42:06.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:42:06.443 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:42:06.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:06.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:06.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:06.443 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3602 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:06.444 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3602 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:06.444 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3602 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:06.444 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3602 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:06.444 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3602 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:06.444 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3602 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:11.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:42:11.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:42:11.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:11.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:11.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:11.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:11.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:11.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:42:11.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:11.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:42:11.461 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:42:11.464 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:42:11.465 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:42:11.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:42:11.466 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:11.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:11.467 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:42:11.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:42:11.467 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:42:11.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:11.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:42:11.470 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:42:11.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:42:11.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:11.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:11.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:42:11.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:42:11.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:42:11.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:11.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:42:11.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:42:11.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:42:11.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:11.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:11.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:42:11.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:42:11.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:42:11.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:42:11.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:42:11.478 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:42:11.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:11.483 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:42:11.946 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:42:12.010 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:42:12.012 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:42:12.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:12.014 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:42:12.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:12.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:42:12.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:42:12.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:12.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:12.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:12.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:42:12.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:42:12.084 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:42:12.088 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:42:12.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:12.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:12.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:12.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:12.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:12.414 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:42:12.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:12.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:12.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:12.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:12.884 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:42:13.356 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:42:13.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:13.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:13.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:13.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:13.826 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:42:14.298 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:42:14.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:14.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:14.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:14.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:14.771 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:42:15.243 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:42:15.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:15.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:15.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:15.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:15.712 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:42:16.181 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:42:16.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:16.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:16.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:16.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:16.647 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:42:17.119 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:42:17.591 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:42:18.062 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:42:18.528 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:42:18.992 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:42:19.458 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:42:19.927 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:42:20.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:20.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:20.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:20.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:42:20.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:20.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:42:20.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:42:20.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:20.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:20.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:20.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:42:20.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:42:20.158 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:42:20.162 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:42:20.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:20.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:20.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:20.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:20.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:20.392 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:42:20.860 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:42:21.326 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:42:21.796 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:42:22.264 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:42:22.733 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:42:23.201 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:42:23.670 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:42:24.138 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:42:24.604 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:42:25.075 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:42:25.541 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:42:26.007 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:42:26.476 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:42:26.947 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:42:27.415 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:42:27.886 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:42:28.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:28.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:28.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:28.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:42:28.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:28.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:28.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:28.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:28.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:28.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:28.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:28.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:28.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:42:28.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:42:28.198 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:42:28.198 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3639 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:28.198 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3639 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:28.199 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3639 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:28.199 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3639 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:28.199 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3639 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:28.199 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3639 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:33.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:42:33.200 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:42:33.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:33.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:33.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:33.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:33.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:33.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:42:33.208 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:33.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:42:33.209 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:42:33.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:42:33.211 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:42:33.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:42:33.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:33.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:33.212 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:42:33.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:42:33.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:42:33.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:33.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:42:33.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:42:33.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:42:33.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:33.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:33.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:42:33.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:42:33.214 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:42:33.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:33.215 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:42:33.215 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:42:33.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:42:33.215 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:33.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:33.215 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:42:33.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:42:33.215 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:42:33.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:33.217 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:42:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:42:33.218 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:42:33.218 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:42:33.218 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:33.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:33.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:33.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:33.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:33.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:33.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:33.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:33.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:33.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:33.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:33.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:33.223 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:42:33.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:42:33.747 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:42:33.749 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:42:33.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:33.751 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:42:33.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:33.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:42:33.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:42:33.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:33.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:33.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:33.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:42:33.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:42:33.783 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:42:33.784 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:42:33.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:33.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:33.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:33.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:33.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:34.165 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:42:34.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:34.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:34.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:42:35.107 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:42:35.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:35.579 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:42:36.052 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:42:36.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:36.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:36.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:36.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:36.522 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:42:36.991 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:42:37.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:37.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:37.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:37.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:37.461 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:42:37.932 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:42:38.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:38.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:38.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:38.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:38.399 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:42:38.868 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:42:39.335 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:42:39.806 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:42:40.279 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:42:40.752 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:42:41.219 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:42:41.690 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:42:41.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:41.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:41.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:41.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:42:41.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:41.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:42:41.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:42:41.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:41.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:41.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:41.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:42:41.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:42:41.824 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:42:41.825 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:42:41.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:41.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:41.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:41.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:41.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:42.161 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:42:42.632 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:42:43.103 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:42:43.574 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:42:44.044 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:42:44.515 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:42:44.987 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:42:45.456 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:42:45.924 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:42:46.393 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:42:46.864 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:42:47.337 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:42:47.810 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:42:48.276 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:42:48.742 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:42:49.214 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:42:49.682 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:42:49.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:49.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:49.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:49.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:42:49.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:49.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:49.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:49.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:42:49.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:42:49.852 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:42:49.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:49.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:49.852 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3609 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:49.852 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3609 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:49.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3609 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:49.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3609 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:49.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3609 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:49.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3609 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:49.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3609 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:49.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3609 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:42:54.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:42:54.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:42:54.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:54.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:54.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:54.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:54.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:42:54.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:42:54.863 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:54.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:42:54.863 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:42:54.867 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:42:54.867 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:42:54.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:42:54.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:54.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:42:54.868 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:42:54.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:42:54.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:42:54.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:54.869 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:42:54.869 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:42:54.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:42:54.870 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:54.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:42:54.870 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:42:54.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:42:54.870 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:42:54.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:54.872 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:42:54.872 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:42:54.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:42:54.872 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:42:54.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:42:54.872 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:42:54.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:42:54.872 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:42:54.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:42:54.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:42:54.875 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:42:54.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:42:54.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:42:55.352 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:42:55.405 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:42:55.407 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:42:55.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:55.409 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:42:55.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:42:55.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:42:55.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:42:55.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:55.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:55.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:55.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:42:55.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:42:55.491 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:42:55.495 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:42:55.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:42:55.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:42:55.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:42:55.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:55.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:42:55.825 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:42:55.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:55.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:55.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:55.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:56.295 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:42:56.767 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:42:56.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:56.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:56.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:56.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:57.237 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:42:57.708 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:42:57.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:57.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:57.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:57.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:58.179 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:42:58.648 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:42:58.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:58.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:58.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:58.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:42:59.112 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:42:59.582 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:42:59.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:42:59.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:42:59.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:42:59.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:00.054 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:43:00.523 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:43:00.991 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:43:01.463 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:43:01.936 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:43:02.407 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:43:02.878 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:43:03.348 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:43:03.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:03.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:03.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:03.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:03.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:03.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:03.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:43:03.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:03.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:03.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:03.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:43:03.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:43:03.582 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:43:03.585 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:43:03.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:03.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:03.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:03.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:03.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:03.819 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:43:04.286 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:43:04.753 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:43:05.219 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:43:05.685 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:43:06.154 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:43:06.621 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:43:07.087 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:43:07.553 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:43:08.022 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:43:08.492 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:43:08.960 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:43:09.429 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:43:09.897 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:43:10.368 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:43:10.840 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:43:11.309 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:43:11.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:11.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:11.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:11.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:11.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:11.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:43:11.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:11.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:11.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:43:11.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:43:11.634 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:43:11.638 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:43:11.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:11.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:11.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:11.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:11.775 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:43:12.244 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:43:12.713 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:43:13.183 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:43:13.649 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:43:14.115 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:43:14.581 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:43:15.044 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:43:15.510 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:43:15.981 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:43:16.451 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:43:16.922 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:43:17.393 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:43:17.864 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:43:18.334 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:43:18.805 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:43:19.276 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:43:19.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:19.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:19.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:19.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:19.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:19.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:19.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:43:19.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:19.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:19.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:19.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:43:19.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:43:19.692 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:43:19.695 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:43:19.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:19.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:19.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:19.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:19.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:19.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:19.745 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:43:20.212 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:43:20.679 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:43:21.146 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:43:21.614 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:43:22.086 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:43:22.557 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:43:23.027 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:43:23.498 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:43:23.970 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:43:24.441 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:43:24.911 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:43:25.378 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:43:25.845 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:43:26.310 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:43:26.777 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:43:27.243 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:43:27.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:27.708 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:43:27.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:27.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:27.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:27.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:27.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:27.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:27.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:27.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:27.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:43:27.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:43:27.726 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:43:27.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:27.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:27.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:27.727 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7146 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:27.727 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7146 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:27.727 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7146 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:27.727 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7146 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:27.727 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7146 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:27.728 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7146 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:27.728 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7146 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:43:32.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:43:32.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:43:32.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:32.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:32.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:32.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:32.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:32.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:43:32.739 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:32.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:43:32.739 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:43:32.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:43:32.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:43:32.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:43:32.743 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:32.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:32.743 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:43:32.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:43:32.744 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:43:32.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:32.747 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:43:32.748 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:43:32.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:43:32.748 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:32.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:32.748 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:43:32.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:43:32.749 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:43:32.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:32.752 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:43:32.752 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:43:32.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:43:32.752 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:32.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:32.753 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:43:32.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:43:32.753 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:43:32.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:32.757 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:32.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:32.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:32.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:32.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:32.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:32.759 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:43:32.759 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:43:32.759 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:43:32.759 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:43:32.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:32.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:32.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:32.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:43:32.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:32.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:32.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:32.764 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:43:33.230 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:43:33.293 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:43:33.295 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:43:33.296 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:43:33.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:33.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:33.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:33.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:43:33.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:33.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:33.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:33.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:43:33.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:43:33.368 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:43:33.372 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:43:33.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:33.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:33.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:33.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:33.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:33.697 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:43:33.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:33.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:33.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:33.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:34.165 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:43:34.634 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:43:34.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:34.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:34.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:34.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:35.101 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:43:35.569 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:43:35.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:35.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:35.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:35.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:36.034 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:43:36.500 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:43:36.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:36.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:36.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:36.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:36.969 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:43:37.441 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:43:37.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:37.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:37.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:37.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:37.913 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:43:38.384 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:43:38.855 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:43:39.327 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:43:39.799 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:43:40.271 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:43:40.741 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:43:41.212 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:43:41.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:41.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:41.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:41.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:41.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:41.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:41.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:43:41.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:41.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:41.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:41.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:43:41.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:43:41.446 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:43:41.450 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:43:41.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:41.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:41.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:41.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:41.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:41.683 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:43:42.154 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:43:42.625 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:43:43.090 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:43:43.557 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:43:44.030 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:43:44.502 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:43:44.972 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:43:45.441 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:43:45.909 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:43:46.377 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:43:46.847 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:43:47.314 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:43:47.785 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:43:48.256 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:43:48.726 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:43:49.198 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:43:49.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:49.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:49.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:49.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:49.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:49.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:49.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:49.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:49.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:49.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:49.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:49.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:49.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:43:49.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:43:49.481 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:43:54.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:43:54.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:43:54.488 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:54.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:54.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:54.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:54.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:43:54.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:43:54.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:54.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:43:54.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:43:54.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:43:54.499 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:43:54.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:43:54.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:54.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:43:54.500 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:43:54.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:43:54.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:43:54.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:54.501 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:43:54.501 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:43:54.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:43:54.501 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:54.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:43:54.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:43:54.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:43:54.502 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:43:54.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:54.503 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:43:54.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:43:54.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:43:54.504 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:43:54.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:43:54.504 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:43:54.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:43:54.504 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:43:54.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:54.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:43:54.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:43:54.507 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:43:54.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:43:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:43:54.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:43:54.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:43:55.042 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:43:55.044 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:43:55.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:55.045 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:43:55.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:43:55.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:43:55.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:43:55.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:55.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:55.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:55.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:43:55.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:43:55.128 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:43:55.132 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:43:55.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:43:55.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:43:55.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:43:55.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:55.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:43:55.462 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:43:55.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:55.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:55.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:55.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:55.932 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:43:56.404 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:43:56.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:56.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:56.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:56.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:56.874 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:43:57.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:43:57.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:57.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:57.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:57.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:57.809 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:43:58.279 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:43:58.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:58.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:58.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:58.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:58.751 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:43:59.224 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:43:59.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:43:59.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:43:59.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:43:59.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:43:59.696 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:44:00.166 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:44:00.637 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:44:01.108 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:44:01.581 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:44:02.049 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:44:02.520 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:44:02.990 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:44:03.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:03.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:03.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:03.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:03.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:03.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:03.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:44:03.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:03.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:03.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:03.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:44:03.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:44:03.171 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:03.173 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:03.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:03.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:03.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:03.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:03.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:03.457 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:44:03.924 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:44:04.389 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:44:04.861 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:44:05.331 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:44:05.802 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:44:06.275 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:44:06.747 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:44:07.217 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:44:07.690 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:44:08.161 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:44:08.628 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:44:09.101 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:44:09.571 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:44:10.041 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:44:10.511 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:44:10.980 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:44:11.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:11.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:11.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:11.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:11.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:11.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:11.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:44:11.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:11.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:11.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:11.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:44:11.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:44:11.207 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:11.208 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:11.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:11.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:11.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:11.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:11.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:11.452 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:44:11.924 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:44:12.395 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:44:12.867 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:44:13.340 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:44:13.807 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:44:14.278 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:44:14.746 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:44:15.219 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:44:15.691 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:44:16.162 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:44:16.632 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:44:17.103 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:44:17.576 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:44:18.044 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:44:18.509 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:44:18.978 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:44:19.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:19.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:19.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:19.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:19.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:19.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:19.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:44:19.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:19.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:19.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:19.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:44:19.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:44:19.257 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:19.261 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:19.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:19.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:19.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:19.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:19.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:19.445 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:44:19.914 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:44:20.385 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:44:20.856 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:44:21.327 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:44:21.797 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:44:22.270 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:44:22.739 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:44:23.210 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:44:23.680 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:44:24.151 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:44:24.624 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:44:25.093 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:44:25.564 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:44:26.036 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:44:26.508 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:44:26.979 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:44:27.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:27.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:27.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:27.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:27.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:27.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:27.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:27.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:27.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:27.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:27.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:27.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:27.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:27.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:44:27.294 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:44:27.294 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7109 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:27.295 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7109 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:27.295 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7109 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:27.295 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7109 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:27.295 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7109 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:27.295 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7109 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:27.295 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7109 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:44:32.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:44:32.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:44:32.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:32.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:32.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:32.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:32.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:44:32.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:32.305 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:32.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:44:32.306 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:44:32.308 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:44:32.308 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:44:32.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:32.309 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:32.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:44:32.309 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:44:32.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:44:32.310 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:44:32.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:32.311 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:44:32.311 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:44:32.311 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:32.311 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:32.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:44:32.312 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:44:32.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:44:32.312 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:44:32.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:32.314 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:44:32.314 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:44:32.314 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:32.314 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:44:32.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:44:32.314 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:44:32.314 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:44:32.314 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:44:32.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:44:32.317 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:44:32.317 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:44:32.317 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:32.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:44:32.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:44:32.322 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:44:32.790 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:44:32.850 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:32.852 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:32.854 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:44:32.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:32.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:32.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:32.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:44:32.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:32.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:32.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:32.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:44:32.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:44:32.928 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:32.932 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:32.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:32.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:32.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:32.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:33.255 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:44:33.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:33.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:33.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:33.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:33.721 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:44:34.187 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:44:34.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:34.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:34.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:34.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:34.652 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:44:35.118 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:44:35.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:35.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:35.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:35.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:35.589 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:44:36.056 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:44:36.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:36.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:36.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:36.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:36.528 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:44:36.997 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:44:37.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:44:37.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:44:37.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:44:37.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:44:37.465 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:44:37.933 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:44:38.405 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:44:38.874 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:44:39.345 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:44:39.818 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:44:40.291 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:44:40.763 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:44:40.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:40.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:40.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:40.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:40.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:40.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:40.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:44:40.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:40.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:40.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:40.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:44:40.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:44:40.996 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:41.000 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:41.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:41.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:41.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:41.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:41.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:41.233 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:44:41.705 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:44:42.176 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:44:42.646 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:44:43.117 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:44:43.590 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:44:44.060 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:44:44.529 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:44:44.998 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:44:45.466 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:44:45.937 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:44:46.408 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:44:46.875 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:44:47.343 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:44:47.811 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:44:48.284 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:44:48.751 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:44:49.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:49.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:49.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:49.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:49.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:49.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:49.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:44:49.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:49.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:49.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:49.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:44:49.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:44:49.078 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:49.083 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:49.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:49.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:49.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:49.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:49.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:49.218 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:44:49.686 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:44:50.158 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:44:50.627 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:44:51.097 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:44:51.568 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:44:52.038 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:44:52.508 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:44:52.975 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:44:53.444 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:44:53.912 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:44:54.379 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:44:54.845 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:44:55.315 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:44:55.786 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:44:56.259 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:44:56.730 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:44:57.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:57.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:57.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:57.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:57.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:44:57.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:44:57.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:44:57.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:57.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:57.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:57.109 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:44:57.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:44:57.146 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:44:57.151 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:44:57.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:44:57.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:44:57.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:44:57.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:57.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:44:57.201 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:44:57.669 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:44:58.135 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:44:58.603 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:44:59.072 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:44:59.541 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:45:00.012 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:45:00.484 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:45:00.956 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:45:01.427 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:45:01.900 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:45:02.372 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:45:02.841 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:45:03.314 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:45:03.781 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:45:04.251 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:45:04.722 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:45:05.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:05.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:05.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:05.193 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:45:05.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:05.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:05.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:45:05.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:05.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:05.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:05.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:45:05.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:45:05.238 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:05.242 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:05.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:05.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:05.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:05.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:05.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:05.660 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:45:06.131 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:45:06.601 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:45:07.072 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:45:07.546 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:45:08.013 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:45:08.483 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:45:08.953 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:45:09.424 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:45:09.895 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:45:10.363 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:45:10.833 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:45:11.305 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:45:11.775 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:45:12.242 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:45:12.707 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:45:13.178 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:45:13.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:13.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:13.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:13.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:13.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:13.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:13.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:45:13.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:13.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:13.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:13.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:45:13.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:45:13.315 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:13.319 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:13.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:13.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:13.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:13.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:13.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:13.648 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:45:14.115 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:45:14.584 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 03:45:15.052 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 03:45:15.521 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 03:45:15.988 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 03:45:16.460 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 03:45:16.931 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 03:45:17.404 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 03:45:17.877 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 03:45:18.349 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 03:45:18.819 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 03:45:19.290 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 03:45:19.759 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 03:45:20.227 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 03:45:20.698 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 03:45:21.168 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 03:45:21.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:21.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:21.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:21.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:21.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:21.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:21.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:45:21.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:21.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:21.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:21.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:45:21.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:45:21.402 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:21.406 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:21.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:21.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:21.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:21.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:21.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:21.636 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 03:45:22.108 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 03:45:22.576 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 03:45:23.046 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 03:45:23.516 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 03:45:23.988 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 03:45:24.460 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 03:45:24.931 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 03:45:25.402 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 03:45:25.873 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 03:45:26.343 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 03:45:26.814 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 03:45:27.284 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 03:45:27.756 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 03:45:28.226 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 03:45:28.693 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 03:45:29.161 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 03:45:29.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:29.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:29.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:29.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:29.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:29.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:45:29.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:29.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:29.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:29.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:45:29.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:45:29.483 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:29.486 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:29.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:29.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:29.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:29.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:29.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:29.633 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 03:45:30.104 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 03:45:30.576 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 03:45:31.047 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 03:45:31.517 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 03:45:31.988 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 03:45:32.459 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 03:45:32.930 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 03:45:33.399 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 03:45:33.871 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 03:45:34.343 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 03:45:34.813 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 03:45:35.284 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 03:45:35.754 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 03:45:36.225 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 03:45:36.697 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 03:45:37.168 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 03:45:37.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:37.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:37.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:37.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:37.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:37.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:37.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:37.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:37.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:37.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:37.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:37.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:37.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:37.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:45:37.510 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:42.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:42.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:45:42.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:42.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:42.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:42.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:42.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:42.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:42.532 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:42.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:45:42.533 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:45:42.536 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:45:42.536 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:45:42.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:42.536 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:42.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:42.537 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:45:42.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:45:42.537 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:45:42.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:42.540 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:45:42.540 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:45:42.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:42.540 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:42.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:42.541 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:45:42.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:45:42.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:45:42.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:42.543 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:45:42.543 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:45:42.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:42.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:45:42.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:42.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:45:42.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:45:42.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:45:42.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:42.546 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:45:42.546 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:45:42.546 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:45:42.546 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:45:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:45:42.551 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:45:43.020 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:45:43.076 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:43.078 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:43.080 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:45:43.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:43.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:43.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:43.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:45:43.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:43.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:43.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:43.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:45:43.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:45:43.110 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:43.111 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:43.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:43.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:43.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:43.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:43.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:43.488 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:45:43.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:43.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:43.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:43.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:43.959 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:45:44.430 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:45:44.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:44.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:44.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:44.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:44.900 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:45:45.371 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:45:45.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:45.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:45.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:45.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:45.842 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:45:46.313 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:45:46.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:46.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:46.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:46.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:46.785 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:45:47.254 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:45:47.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:47.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:47.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:47.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:47.725 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:45:48.197 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:45:48.664 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:45:49.135 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:45:49.603 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:45:50.074 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:45:50.544 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:45:51.011 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:45:51.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:51.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:51.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:51.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:51.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:51.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:51.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:45:51.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:51.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:51.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:51.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:45:51.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:45:51.144 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:45:51.145 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:45:51.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:51.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:45:51.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:45:51.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:51.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:51.482 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:45:51.952 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:45:52.423 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:45:52.894 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:45:53.365 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:45:53.830 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:45:54.301 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:45:54.773 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:45:55.245 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:45:55.715 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:45:56.184 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:45:56.655 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:45:57.123 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:45:57.593 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:45:58.066 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:45:58.538 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:45:59.010 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:45:59.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:45:59.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:45:59.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:45:59.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:45:59.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:45:59.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:45:59.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:45:59.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:45:59.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:45:59.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:45:59.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:45:59.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:45:59.170 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:45:59.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:45:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:45:59.171 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:59.171 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:59.171 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:59.171 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:59.172 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:45:59.172 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:04.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:04.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:04.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:04.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:04.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:04.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:04.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:04.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:04.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:04.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:04.185 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:04.189 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:04.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:04.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:04.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:04.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:04.190 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:04.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:04.190 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:04.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:04.193 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:04.194 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:04.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:04.194 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:04.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:04.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:04.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:04.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:04.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:04.197 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:04.197 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:04.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:04.197 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:04.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:04.197 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:04.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:04.198 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:04.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:04.201 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:46:04.201 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:46:04.202 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:04.202 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:04.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:04.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:04.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:04.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:04.206 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:46:04.679 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:46:04.728 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:46:04.730 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:46:04.732 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:46:04.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:04.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:04.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:46:04.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:46:04.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:04.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:04.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:04.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:46:04.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:46:04.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:04.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:04.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:04.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:04.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:05.149 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:46:05.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:05.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:05.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:05.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:05.622 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:46:06.094 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:46:06.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:06.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:06.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:06.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:06.565 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:46:07.038 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:46:07.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:07.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:07.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:07.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:07.509 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:46:07.977 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:46:08.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:08.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:08.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:08.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:08.448 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:46:08.919 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:46:09.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:09.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:09.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:09.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:09.389 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:46:09.861 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:46:10.330 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:46:10.802 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:46:11.275 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:46:11.748 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:46:12.221 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:46:12.694 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:46:12.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:12.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:12.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:12.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:46:12.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:12.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:12.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:12.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:12.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:12.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:12.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:12.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:12.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:12.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:12.813 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:46:17.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:17.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:17.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:17.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:17.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:17.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:17.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:17.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:17.828 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:17.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:17.828 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:17.830 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:17.831 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:17.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:17.831 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:17.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:17.831 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:17.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:17.831 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:17.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:17.833 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:17.834 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:17.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:17.834 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:17.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:17.834 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:17.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:17.834 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:17.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:17.836 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:17.836 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:17.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:17.836 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:17.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:17.836 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:17.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:17.836 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:17.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:17.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:46:17.839 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:46:17.839 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:17.839 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:17.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:17.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:17.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:17.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:17.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:17.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:17.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:17.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:17.844 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:46:18.320 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:46:18.371 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:46:18.373 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:46:18.375 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:46:18.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:18.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:18.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:46:18.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:46:18.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:18.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:18.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:18.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:46:18.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:46:18.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:18.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:18.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:18.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:18.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:18.788 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:46:18.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:18.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:18.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:18.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:19.259 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:46:19.730 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:46:19.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:19.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:19.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:19.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:20.201 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:46:20.672 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:46:20.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:20.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:20.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:20.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:21.142 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:46:21.612 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:46:21.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:21.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:21.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:21.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:22.084 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:46:22.554 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:46:22.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:22.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:22.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:22.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:23.026 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:46:23.493 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:46:23.965 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:46:24.438 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:46:24.909 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:46:25.381 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:46:25.852 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:46:26.325 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:46:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:26.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:26.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:26.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:46:26.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:26.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:26.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:26.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:26.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:26.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:26.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:26.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:26.435 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:46:26.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:26.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:26.436 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:26.436 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:26.436 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:26.436 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:26.436 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:26.436 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:46:31.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:31.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:31.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:31.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:31.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:31.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:31.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:31.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:31.456 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:31.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:31.457 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:31.459 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:31.460 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:31.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:31.460 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:31.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:31.461 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:31.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:31.461 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:31.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:31.463 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:31.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:31.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:31.464 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:31.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:31.464 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:31.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:31.465 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:31.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:31.466 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:31.466 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:31.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:31.467 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:31.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:31.467 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:31.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:31.467 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:31.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:31.471 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:31.471 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:31.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:31.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:46:31.472 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:46:31.472 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:31.472 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:31.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:31.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:31.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:31.477 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:46:31.954 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:46:32.004 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:46:32.006 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:46:32.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:32.009 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:46:32.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:32.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:46:32.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:46:32.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:32.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:32.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:32.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:46:32.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:46:32.425 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:46:32.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:32.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:32.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:32.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:32.893 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:46:33.364 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:46:33.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:33.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:33.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:33.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:33.834 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:46:34.305 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:46:34.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:34.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:34.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:34.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:34.778 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:46:35.251 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:46:35.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:35.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:35.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:35.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:35.722 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:46:36.191 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:46:36.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:36.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:36.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:36.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:36.663 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:46:37.135 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:46:37.606 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:46:38.077 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:46:38.545 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:46:38.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:38.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:46:38.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:38.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:38.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:38.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:38.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:38.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:38.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:38.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:38.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:38.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:38.687 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:46:43.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:43.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:43.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:43.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:43.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:43.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:43.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:43.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:43.703 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:43.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:43.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:43.708 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:43.708 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:43.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:43.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:43.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:43.709 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:43.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:43.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:43.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:43.712 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:43.712 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:43.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:43.712 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:43.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:43.713 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:43.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:43.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:43.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:43.715 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:43.715 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:43.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:43.715 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:43.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:43.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:43.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:43.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:43.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:43.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:46:43.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:46:43.720 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:43.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:43.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:46:44.194 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:46:44.243 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:46:44.245 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:46:44.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:44.247 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:46:44.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:44.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:46:44.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:46:44.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:44.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:44.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:44.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:46:44.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:46:44.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:46:44.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:44.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:44.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:44.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:45.133 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:46:45.606 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:46:45.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:45.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:45.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:45.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:46.078 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:46:46.550 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:46:46.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:46.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:46.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:46.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:47.021 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:46:47.492 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:46:47.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:47.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:47.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:47.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:47.966 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:46:48.438 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:46:48.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:48.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:48.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:48.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:48.909 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:46:48.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:48.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:48.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:48.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:48.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:48.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:48.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:48.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:48.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:48.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:49.385 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:46:49.859 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:46:50.332 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:46:50.804 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:46:51.276 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:46:51.748 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:46:52.219 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:46:52.689 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:46:53.160 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:46:53.636 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:46:53.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:53.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:46:53.942 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:46:53.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:53.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:53.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:53.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:53.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:53.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:53.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:53.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:53.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:53.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:53.953 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:53.954 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:53.954 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:53.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:53.954 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:53.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:53.954 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:53.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:53.954 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:53.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:53.955 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:53.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:53.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:53.955 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:53.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:53.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:53.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:53.956 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:53.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:53.957 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:53.957 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:53.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:53.957 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:53.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:53.957 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:53.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:53.957 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:53.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:53.959 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:53.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:53.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:53.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:53.959 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:53.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:46:53.960 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:46:53.960 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:53.960 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:53.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:53.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:53.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:53.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:53.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:53.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:53.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:53.961 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:46:53.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:53.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:53.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:58.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:46:58.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:46:58.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:58.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:58.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:58.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:58.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:46:58.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:58.978 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:58.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:46:58.978 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:46:58.981 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:46:58.982 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:46:58.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:58.982 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:58.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:46:58.983 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:46:58.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:46:58.983 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:46:58.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:58.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:46:58.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:46:58.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:58.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:58.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:46:58.986 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:46:58.986 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:46:58.986 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:46:58.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:58.989 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:46:58.989 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:46:58.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:58.989 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:46:58.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:46:58.989 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:46:58.990 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:46:58.990 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:46:58.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:46:58.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:46:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:46:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:46:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:46:58.994 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:46:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:46:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:46:58.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:46:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:58.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:46:58.995 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:46:58.995 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:46:58.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:58.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:46:58.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:46:59.000 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:46:59.471 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:46:59.523 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:46:59.525 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:46:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:46:59.527 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:46:59.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:46:59.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:46:59.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:46:59.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:46:59.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:46:59.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:46:59.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:46:59.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:46:59.943 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:46:59.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:46:59.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:46:59.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:46:59.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:00.414 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:47:00.887 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:47:00.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:00.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:01.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:01.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:01.360 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:47:01.827 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:47:02.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:02.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:02.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:02.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:02.298 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:47:02.768 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:47:03.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:03.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:03.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:03.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:03.240 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:47:03.712 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:47:04.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:04.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:04.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:04.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:04.185 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:47:04.653 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:47:05.123 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:47:05.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:05.594 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:47:06.067 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:47:06.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:06.539 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:47:07.011 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:47:07.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:07.482 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:47:07.953 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:47:08.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:08.422 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:47:08.890 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:47:09.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:09.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:09.361 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:47:09.833 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:47:10.300 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:47:10.766 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:47:11.232 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:47:11.700 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:47:12.171 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:47:12.639 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:47:13.105 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:47:13.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:13.572 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:47:14.040 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:47:14.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:14.508 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:47:14.978 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:47:15.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:15.449 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:47:15.919 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:47:16.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:16.392 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:47:16.861 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:47:17.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:17.332 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:47:17.803 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:47:18.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:18.272 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:47:18.739 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:47:19.210 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:47:19.681 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:47:20.152 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:47:20.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:47:20.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:47:20.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:20.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:20.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:20.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:20.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:20.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:47:20.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:47:20.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:47:20.294 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:47:20.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:47:20.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:47:25.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:47:25.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:47:25.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:47:25.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:47:25.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:47:25.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:25.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:25.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:47:25.309 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:25.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:47:25.309 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:47:25.312 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:47:25.312 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:47:25.313 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:47:25.313 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:25.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:47:25.313 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:47:25.313 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:47:25.313 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:47:25.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:25.316 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:47:25.316 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:47:25.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:47:25.316 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:25.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:47:25.317 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:47:25.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:47:25.317 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:47:25.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:25.319 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:47:25.320 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:47:25.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:47:25.320 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:25.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:47:25.320 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:47:25.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:47:25.320 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:47:25.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:47:25.324 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:47:25.325 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:47:25.325 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:47:25.325 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:25.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:25.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:25.330 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:47:25.801 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:47:25.858 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:47:25.860 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:47:25.861 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:47:25.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:47:25.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:47:25.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:47:25.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:47:25.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:25.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:47:25.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:47:25.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:47:25.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:47:25.939 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:47:25.944 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:47:25.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:47:25.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:47:25.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:47:25.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:25.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:26.271 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:47:26.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:26.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:26.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:26.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:26.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:47:26.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:26.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:47:26.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:47:26.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:26.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:26.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:26.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:26.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:26.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:47:26.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:47:26.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:47:26.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:47:26.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:47:26.718 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:47:26.718 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:47:26.718 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:47:26.718 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:47:26.718 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:47:26.718 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:47:31.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:47:31.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:47:31.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:47:31.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:47:31.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:47:31.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:31.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:31.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:47:31.729 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:31.730 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:47:31.730 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:47:31.733 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:47:31.733 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:47:31.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:47:31.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:31.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:47:31.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:47:31.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:47:31.734 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:47:31.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:31.736 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:47:31.736 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:47:31.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:47:31.736 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:31.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:47:31.736 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:47:31.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:47:31.736 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:47:31.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:31.738 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:47:31.738 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:47:31.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:47:31.738 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:31.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:47:31.739 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:47:31.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:47:31.739 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:47:31.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:47:31.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:47:31.742 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:47:31.742 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:47:31.742 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:31.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:31.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:31.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:31.746 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:47:32.215 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:47:32.273 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:47:32.275 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:47:32.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:47:32.277 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:47:32.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:47:32.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:47:32.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:47:32.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:32.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:47:32.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:47:32.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:47:32.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:47:32.305 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:47:32.307 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:47:32.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:47:32.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:47:32.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:47:32.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:32.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:32.681 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:47:32.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:32.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:32.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:32.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:33.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 03:47:33.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:33.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:47:33.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:47:33.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:33.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:33.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:33.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:33.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:33.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:47:33.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:47:33.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:47:33.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:47:33.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:47:33.125 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:47:38.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:47:38.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:47:38.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:47:38.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:47:38.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:38.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:47:38.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:47:38.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:47:38.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:38.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:47:38.138 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:47:38.140 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:47:38.140 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:47:38.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:47:38.141 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:38.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:47:38.141 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:47:38.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:47:38.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:47:38.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:38.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:47:38.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:47:38.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:47:38.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:38.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:47:38.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:47:38.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:47:38.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:47:38.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:38.145 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:47:38.145 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:47:38.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:47:38.145 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:47:38.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:47:38.146 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:47:38.146 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:47:38.146 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:47:38.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:38.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:47:38.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:47:38.149 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:47:38.150 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:38.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:47:38.154 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:47:38.620 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:47:38.670 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:47:38.671 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:47:38.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:47:38.671 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:47:38.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:47:38.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:47:38.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:47:38.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:38.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:47:38.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:47:38.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:47:38.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:47:38.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:47:38.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:47:38.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:47:38.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:38.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:39.084 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:47:39.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:39.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:39.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:39.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:39.546 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:47:40.009 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:47:40.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:40.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:40.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:40.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:40.473 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:47:40.937 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:47:41.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:41.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:41.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:41.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:41.402 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:47:41.866 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:47:42.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:42.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:42.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:42.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:42.329 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:47:42.792 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:47:43.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:47:43.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:47:43.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:47:43.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:47:43.254 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:47:43.717 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:47:44.182 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:47:44.648 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:47:45.115 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:47:45.587 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:47:46.054 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:47:46.521 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:47:46.987 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:47:47.454 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:47:47.920 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:47:48.386 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:47:48.850 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:47:49.312 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:47:49.775 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:47:50.240 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:47:50.703 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:47:51.165 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:47:51.629 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:47:52.091 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:47:52.554 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:47:53.016 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:47:53.479 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:47:53.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:47:53.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:53.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:47:53.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:47:53.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:47:53.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:47:53.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:47:53.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:53.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:47:53.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:47:53.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:47:53.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:47:53.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:47:53.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:47:53.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:47:53.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:53.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:47:53.941 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:47:54.404 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:47:54.866 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:47:55.329 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:47:55.791 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:47:56.253 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:47:56.716 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:47:57.178 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:47:57.640 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:47:58.103 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:47:58.566 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:47:59.039 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:47:59.502 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:47:59.965 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:48:00.429 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:48:00.894 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:48:01.356 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:48:01.819 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:48:02.281 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:48:02.745 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:48:03.207 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:48:03.670 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:48:04.134 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:48:04.596 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:48:05.059 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:48:05.521 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:48:05.984 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:48:06.446 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:48:06.910 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:48:07.373 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:48:07.842 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:48:08.313 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:48:08.784 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:48:08.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:48:08.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:08.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:48:08.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:48:08.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:48:08.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:48:08.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:48:08.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:08.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:48:08.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:48:08.981 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:48:08.981 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:48:09.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:48:09.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:48:09.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:48:09.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:09.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:09.255 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:48:09.725 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:48:10.198 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:48:10.671 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:48:11.141 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:48:11.611 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:48:12.081 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 03:48:12.554 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 03:48:13.023 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 03:48:13.494 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 03:48:13.965 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 03:48:14.438 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 03:48:14.910 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 03:48:15.381 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 03:48:15.853 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 03:48:16.326 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 03:48:16.799 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 03:48:17.271 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 03:48:17.744 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 03:48:18.216 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 03:48:18.687 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 03:48:19.159 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 03:48:19.632 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 03:48:20.099 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 03:48:20.570 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 03:48:21.043 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 03:48:21.516 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 03:48:21.988 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 03:48:22.461 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 03:48:22.934 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 03:48:23.406 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 03:48:23.877 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 03:48:24.348 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 03:48:24.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:48:24.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:24.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:48:24.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:48:24.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:48:24.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:48:24.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:48:24.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:24.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:48:24.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:48:24.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:48:24.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:48:24.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:48:24.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:48:24.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:48:24.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:48:24.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:24.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:24.819 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 03:48:25.292 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 03:48:25.764 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 03:48:26.236 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 03:48:26.708 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 03:48:27.181 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 03:48:27.654 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 03:48:28.126 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 03:48:28.597 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 03:48:29.070 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 03:48:29.542 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 03:48:30.011 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 03:48:30.481 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 03:48:30.954 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 03:48:31.427 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 03:48:31.899 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 03:48:32.370 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 03:48:32.843 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 03:48:33.316 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 03:48:33.789 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 03:48:34.261 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 03:48:34.735 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 03:48:35.206 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 03:48:35.678 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 03:48:36.151 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 03:48:36.624 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 03:48:37.096 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 03:48:37.569 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 03:48:38.042 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 03:48:38.512 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 03:48:38.985 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 03:48:39.456 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 03:48:39.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:48:39.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:39.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:48:39.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:48:39.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:48:39.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:48:39.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:48:39.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:48:39.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:48:39.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:48:39.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:48:39.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:48:39.890 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:48:39.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:48:39.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:48:39.890 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13458 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:48:39.890 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13458 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:48:39.890 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13458 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:48:39.890 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13458 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:48:39.890 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13458 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:48:39.890 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13458 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:48:44.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:48:44.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:48:44.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:48:44.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:48:44.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:48:44.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:48:44.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:48:44.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:48:44.905 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:48:44.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:48:44.905 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:48:44.908 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:48:44.908 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:48:44.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:48:44.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:48:44.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:48:44.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:48:44.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:48:44.909 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:48:44.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:48:44.913 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:48:44.913 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:48:44.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:48:44.913 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:48:44.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:48:44.914 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:48:44.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:48:44.914 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:48:44.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:48:44.918 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:48:44.918 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:48:44.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:48:44.918 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:48:44.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:48:44.919 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:48:44.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:48:44.919 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:48:44.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:48:44.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:48:44.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:48:44.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:48:44.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:48:44.924 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:48:44.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:44.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:48:44.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:48:44.925 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:48:44.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:48:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:44.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:44.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:48:44.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:44.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:44.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:44.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:48:44.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:48:44.927 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:48:44.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:44.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:44.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:49.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:48:49.934 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:48:49.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:48:49.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:48:49.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:48:49.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:48:49.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:48:49.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:48:49.944 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:48:49.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:48:49.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:48:49.947 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:48:49.948 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:48:49.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:48:49.948 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:48:49.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:48:49.949 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:48:49.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:48:49.949 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:48:49.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:48:49.950 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:48:49.950 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:48:49.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:48:49.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:48:49.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:48:49.951 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:48:49.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:48:49.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:48:49.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:48:49.953 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:48:49.953 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:48:49.953 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:48:49.953 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:48:49.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:48:49.953 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:48:49.953 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:48:49.953 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:48:49.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:48:49.956 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:48:49.956 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:48:49.956 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:49.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:48:49.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:48:49.961 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:48:50.438 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:48:50.482 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:48:50.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:48:50.486 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:48:50.490 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:48:50.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:48:50.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:48:50.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:48:50.526 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:48:50.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:50.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:48:50.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:48:50.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:48:50.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:48:50.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:48:50.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:48:50.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:48:50.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:50.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:48:50.910 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:48:50.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:48:50.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:48:50.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:48:50.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:48:51.381 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:48:51.852 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:48:51.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:48:51.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:48:51.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:48:51.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:48:52.325 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:48:52.798 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:48:52.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:48:52.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:48:52.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:48:52.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:48:53.269 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:48:53.736 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:48:53.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:48:53.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:48:53.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:48:53.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:48:54.209 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:48:54.682 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:48:54.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:48:54.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:48:54.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:48:54.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:48:55.154 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:48:55.627 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:48:56.100 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:48:56.573 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:48:57.043 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:48:57.516 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:48:57.989 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:48:58.462 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:48:58.935 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:48:59.408 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:48:59.880 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:49:00.351 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:49:00.824 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:49:01.297 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:49:01.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:49:01.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:01.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:49:01.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:49:01.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:01.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:01.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:01.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:01.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:49:01.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:49:01.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:49:01.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:49:01.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:49:01.417 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:49:01.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:49:01.417 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:01.417 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:01.417 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:01.417 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:01.417 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:01.417 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:01.417 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:06.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:49:06.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:49:06.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:49:06.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:49:06.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:49:06.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:49:06.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:49:06.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:49:06.428 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:06.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:49:06.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:49:06.430 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:49:06.431 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:49:06.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:49:06.431 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:06.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:49:06.432 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:49:06.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:49:06.432 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:49:06.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:06.433 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:49:06.433 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:49:06.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:49:06.433 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:06.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:49:06.433 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:49:06.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:49:06.433 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:49:06.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:06.435 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:49:06.435 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:49:06.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:49:06.435 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:06.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:49:06.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:49:06.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:49:06.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:49:06.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:06.437 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:49:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:49:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:49:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:49:06.437 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:49:06.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:49:06.438 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:49:06.438 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:49:06.438 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:06.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:06.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:06.443 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:49:06.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:49:06.970 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:49:06.972 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:49:06.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:49:06.974 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:49:06.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:49:07.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:49:07.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:49:07.003 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:49:07.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:07.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:49:07.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:49:07.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:49:07.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:49:07.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:49:07.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:49:07.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:49:07.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:07.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:07.390 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:49:07.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:07.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:07.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:07.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:07.863 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:49:08.335 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:49:08.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:08.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:08.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:08.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:08.806 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:49:09.277 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:49:09.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:09.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:09.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:09.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:09.748 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:49:10.218 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:49:10.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:10.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:10.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:10.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:10.689 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:49:11.160 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:49:11.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:11.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:11.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:11.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:11.631 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:49:12.101 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:49:12.572 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:49:13.045 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:49:13.518 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:49:13.990 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:49:14.464 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:49:14.936 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:49:15.409 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:49:15.882 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:49:16.355 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:49:16.827 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:49:17.298 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:49:17.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:49:17.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:17.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:49:17.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:49:17.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:17.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:17.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:17.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:17.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:49:17.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:49:17.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:49:17.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:49:17.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:49:17.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:49:17.411 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:49:17.412 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2373 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:17.412 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2373 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:17.412 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2373 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:17.412 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2373 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:17.412 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2373 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:17.412 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2373 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:17.412 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2373 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:17.412 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2373 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:22.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:49:22.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:49:22.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:49:22.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:49:22.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:49:22.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:49:22.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:49:22.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:49:22.425 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:22.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:49:22.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:49:22.429 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:49:22.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:49:22.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:49:22.430 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:22.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:49:22.430 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:49:22.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:49:22.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:49:22.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:22.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:49:22.433 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:49:22.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:49:22.433 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:22.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:49:22.433 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:49:22.434 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:49:22.434 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:49:22.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:22.435 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:49:22.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:49:22.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:49:22.436 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:22.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:49:22.436 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:49:22.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:49:22.436 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:49:22.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:22.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:49:22.440 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:49:22.440 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:49:22.440 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:22.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:22.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:22.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:22.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:22.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:22.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:22.444 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:49:22.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:49:22.969 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:49:22.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:49:22.970 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:49:22.972 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:49:23.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:49:23.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:49:23.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:49:23.010 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:49:23.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:23.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:49:23.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:49:23.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:49:23.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:49:23.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:49:23.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:49:23.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:49:23.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:23.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:23.389 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:49:23.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:23.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:23.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:23.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:23.860 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:49:24.334 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:49:24.355 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:24.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:24.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:24.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:24.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:24.806 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:49:25.279 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:49:25.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:25.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:25.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:25.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:25.752 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:49:26.225 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:49:26.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:26.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:26.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:26.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:26.697 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:49:27.170 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:49:27.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:27.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:27.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:27.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:27.643 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:49:28.116 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:49:28.589 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:49:29.061 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:49:29.534 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:49:30.007 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:49:30.480 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:49:30.952 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:49:31.423 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:49:31.921 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:49:32.393 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:49:32.864 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:49:33.337 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:49:33.810 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:49:34.282 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:49:34.755 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:49:35.228 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:49:35.700 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:49:36.174 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:49:36.646 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:49:37.119 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:49:37.592 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:49:38.065 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:49:38.537 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:49:39.008 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:49:39.479 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:49:39.952 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:49:40.425 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:49:40.897 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:49:41.370 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:49:41.843 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:49:42.316 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:49:42.789 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:49:43.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:49:43.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:43.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:49:43.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:49:43.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:43.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:43.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:43.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:43.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:49:43.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:49:43.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:49:43.100 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:49:43.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:49:43.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:49:43.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:49:43.101 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4456 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:43.101 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4456 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:43.101 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:43.101 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:43.101 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:43.101 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:48.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:49:48.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:49:48.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:49:48.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:49:48.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:49:48.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:49:48.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:49:48.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:49:48.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:48.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:49:48.114 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:49:48.119 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:49:48.119 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:49:48.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:49:48.120 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:48.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:49:48.120 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:49:48.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:49:48.120 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:49:48.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:48.123 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:49:48.124 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:49:48.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:49:48.124 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:48.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:49:48.124 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:49:48.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:49:48.124 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:49:48.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:48.127 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:49:48.127 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:49:48.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:49:48.127 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:49:48.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:49:48.128 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:49:48.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:49:48.128 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:49:48.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:48.132 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:49:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:49:48.132 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:49:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:49:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:49:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:49:48.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:49:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:49:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:49:48.132 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:49:48.133 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:49:48.133 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:49:48.133 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:49:48.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:49:48.138 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:49:48.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:49:48.662 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:49:48.664 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:49:48.665 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:49:48.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:49:48.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:49:48.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:49:48.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:49:48.701 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:49:48.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:48.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:49:48.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:49:48.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:49:48.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:49:48.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:49:48.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:49:48.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:49:48.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:48.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:49.084 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:49:49.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:49.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:49.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:49.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:49.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:49:50.029 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:49:50.053 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:50.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:50.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:50.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:50.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:50.500 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:49:50.973 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:49:51.013 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:51.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:51.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:51.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:51.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:51.446 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:49:51.918 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:49:51.979 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:52.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:52.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:52.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:52.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:52.389 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:49:52.860 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:49:52.939 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:53.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:53.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:53.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:53.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:53.330 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:49:53.801 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:49:53.899 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:54.272 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:49:54.745 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:49:54.858 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:55.218 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:49:55.691 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:49:55.825 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:56.161 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:49:56.635 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:49:56.785 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:57.108 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:49:57.580 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:49:57.752 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:58.051 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:49:58.522 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:49:58.711 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:49:58.995 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:49:59.468 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:49:59.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:49:59.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:49:59.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:49:59.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:49:59.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:49:59.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:49:59.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:49:59.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:49:59.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:49:59.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:49:59.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:49:59.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:49:59.590 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:49:59.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:49:59.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:49:59.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:59.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:59.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:59.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:59.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:49:59.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2476 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:04.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:50:04.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:50:04.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:04.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:04.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:04.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:04.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:04.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:50:04.607 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:04.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:50:04.607 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:50:04.610 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:50:04.610 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:50:04.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:50:04.610 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:04.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:04.610 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:50:04.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:50:04.610 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:50:04.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:04.612 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:50:04.612 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:50:04.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:50:04.612 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:04.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:04.612 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:50:04.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:50:04.612 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:50:04.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:04.614 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:50:04.614 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:50:04.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:50:04.614 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:04.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:04.614 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:50:04.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:50:04.614 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:50:04.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:50:04.616 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:50:04.616 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:50:04.616 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:50:04.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:04.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:04.621 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:50:05.099 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:50:05.140 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:50:05.141 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:50:05.143 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:50:05.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:05.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:05.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:05.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:50:05.176 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:50:05.178 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:50:05.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:05.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:05.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:05.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:50:05.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:50:05.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:05.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:05.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:05.206 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:50:05.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:05.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:05.570 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:50:05.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:05.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:05.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:05.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:06.043 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:50:06.058 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:50:06.515 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:50:06.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:06.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:06.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:06.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:06.986 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:50:07.459 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:50:07.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:07.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:07.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:07.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:07.932 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:50:08.403 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:50:08.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:08.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:08.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:08.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:08.875 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:50:09.348 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:50:09.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:09.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:09.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:09.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:09.821 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:50:10.293 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:50:10.764 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:50:11.238 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:50:11.707 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:50:12.176 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:50:12.647 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:50:13.121 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:50:13.593 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:50:14.065 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:50:14.536 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:50:15.007 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:50:15.478 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:50:15.678 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:50:15.948 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:50:16.418 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:50:16.890 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:50:17.364 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:50:17.836 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:50:18.308 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:50:18.779 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:50:19.250 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:50:19.722 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:50:20.192 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:50:20.664 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:50:21.134 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:50:21.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:21.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:21.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:21.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:21.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:21.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:21.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:21.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:21.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:21.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:21.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:50:21.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:50:21.452 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:50:21.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:21.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:26.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:50:26.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:50:26.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:26.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:26.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:26.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:26.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:26.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:50:26.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:26.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:50:26.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:50:26.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:50:26.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:50:26.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:50:26.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:26.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:26.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:50:26.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:50:26.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:50:26.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:26.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:50:26.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:50:26.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:50:26.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:26.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:26.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:50:26.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:50:26.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:50:26.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:26.482 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:50:26.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:50:26.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:50:26.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:26.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:26.483 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:50:26.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:50:26.483 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:50:26.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:26.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:50:26.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:50:26.486 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:50:26.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:26.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:26.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:50:26.968 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:50:27.015 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:50:27.017 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:50:27.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:27.020 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:50:27.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:27.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:27.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:50:27.059 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:50:27.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:27.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:27.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:27.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:50:27.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:50:27.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:27.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:27.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:27.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:27.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:27.438 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:50:27.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:27.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:27.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:27.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:27.911 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:50:28.384 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:50:28.407 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:50:28.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:28.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:28.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:28.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:28.854 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:50:29.328 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:50:29.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:29.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:29.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:29.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:29.800 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:50:30.273 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:50:30.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:30.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:30.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:30.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:30.743 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:50:31.217 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:50:31.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:31.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:31.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:31.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:31.689 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:50:32.161 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:50:32.632 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:50:33.105 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:50:33.578 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:50:34.050 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:50:34.524 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:50:34.996 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:50:35.468 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:50:35.939 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:50:36.412 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:50:36.885 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:50:37.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:37.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:37.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:37.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:37.127 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=2298 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:37.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:37.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:37.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:37.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:37.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:50:37.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:50:37.144 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:50:37.144 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2302 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.146 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.146 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.146 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.146 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:37.146 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:42.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:50:42.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:50:42.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:42.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:42.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:42.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:42.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:42.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:50:42.154 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:42.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:50:42.154 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:50:42.157 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:50:42.157 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:50:42.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:50:42.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:42.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:42.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:50:42.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:50:42.158 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:50:42.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:42.161 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:50:42.161 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:50:42.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:50:42.161 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:42.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:42.162 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:50:42.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:50:42.162 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:50:42.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:42.165 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:50:42.165 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:50:42.165 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:50:42.165 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:42.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:42.165 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:50:42.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:50:42.166 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:50:42.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:42.170 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:50:42.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:50:42.170 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:50:42.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:50:42.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:50:42.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:50:42.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:50:42.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:50:42.171 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:50:42.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:42.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:50:42.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:42.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:42.171 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:50:42.171 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:50:42.171 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:50:42.171 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:50:42.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:42.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:42.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:42.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:42.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:42.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:42.176 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:50:42.653 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:50:42.702 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:50:42.705 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:50:42.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:42.707 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:50:42.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:42.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:42.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:50:42.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:42.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:42.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:42.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:50:42.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:50:42.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:42.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:42.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:42.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:43.124 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:50:43.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:43.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:43.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:43.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:43.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:43.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:43.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:50:43.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:43.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:43.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:43.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:50:43.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:50:43.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:43.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:43.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:43.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:43.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:43.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:43.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:43.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:43.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:43.596 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:50:43.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:43.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:43.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:43.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:43.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:43.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:43.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:50:43.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:43.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:43.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:43.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:50:43.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:50:43.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:43.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:43.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:43.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:43.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:44.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:44.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:44.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:44.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:44.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:44.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:44.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:50:44.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:44.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:44.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:44.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:50:44.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:50:44.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:44.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:44.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:44.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:44.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:44.066 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:50:44.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:44.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:44.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:44.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:44.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:44.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:44.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:44.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:44.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:44.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:44.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:44.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:44.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:44.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:44.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:50:44.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:50:44.476 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:50:44.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:44.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:44.477 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:44.477 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:44.477 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:44.478 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:44.478 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:44.478 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:44.478 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:44.478 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:44.478 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:50:49.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:50:49.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:50:49.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:49.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:49.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:49.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:49.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:49.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:50:49.510 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:49.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:50:49.511 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:50:49.518 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:50:49.519 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:50:49.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:50:49.519 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:49.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:49.520 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:50:49.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:50:49.520 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:50:49.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:49.525 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:50:49.525 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:50:49.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:50:49.526 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:49.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:49.526 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:50:49.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:50:49.527 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:50:49.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:49.531 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:50:49.531 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:50:49.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:50:49.532 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:49.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:49.532 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:50:49.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:50:49.532 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:50:49.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:50:49.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:49.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:49.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:49.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:49.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:49.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:49.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:49.538 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:50:49.538 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:50:49.538 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:50:49.538 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:50:49.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:49.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:49.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:49.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:49.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:49.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:49.543 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:50:50.021 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:50:50.065 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:50:50.067 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:50:50.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:50.069 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:50:50.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:50.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:50.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:50:50.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:50.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:50.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:50.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:50:50.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:50:50.112 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:50:50.115 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 03:50:50.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:50.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:50.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:50.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:50.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:50.492 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:50:50.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:50.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:50.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:50.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:50.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:50.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:50.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:50.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:50.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:50.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:50.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:50:50.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:50:50.517 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:50:50.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:50.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:55.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:50:55.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:50:55.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:55.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:55.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:55.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:55.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:50:55.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:50:55.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:55.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:50:55.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:50:55.534 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:50:55.534 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:50:55.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:50:55.534 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:55.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:50:55.534 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:50:55.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:50:55.535 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:50:55.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:55.537 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:50:55.537 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:50:55.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:50:55.538 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:55.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:50:55.538 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:50:55.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:50:55.538 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:50:55.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:55.540 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:50:55.540 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:50:55.540 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:50:55.540 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:50:55.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:50:55.541 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:50:55.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:50:55.541 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:50:55.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:50:55.544 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:50:55.544 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:50:55.544 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:50:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:50:55.549 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:50:56.027 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:50:56.074 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:50:56.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:56.079 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:50:56.081 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:50:56.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:56.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:56.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:50:56.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:56.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:56.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:56.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:50:56.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:50:56.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:56.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:56.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:56.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:56.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:56.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:56.500 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:50:56.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:56.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:56.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:56.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:56.971 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:50:57.442 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:50:57.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:57.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:57.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:57.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:57.915 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:50:58.387 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:50:58.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:58.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:58.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:58.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:58.860 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:50:59.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:59.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:59.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:59.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:59.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:50:59.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:50:59.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:50:59.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:59.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:59.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:59.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:50:59.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:50:59.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:59.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:50:59.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:50:59.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:59.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:50:59.330 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:50:59.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:50:59.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:50:59.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:50:59.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:50:59.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:50:59.804 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:51:00.276 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:51:00.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:00.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:00.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:00.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:00.749 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:51:01.219 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:51:01.692 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:51:02.165 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:51:02.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:02.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:02.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:02.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:02.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:02.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:02.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:51:02.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:02.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:51:02.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:51:02.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:51:02.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:51:02.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:02.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:51:02.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:51:02.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:02.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:02.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:02.637 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:51:03.108 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:51:03.582 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:51:04.049 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:51:04.520 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:51:04.991 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:51:05.462 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:51:05.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:05.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:05.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:05.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:05.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:05.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:05.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:51:05.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:05.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:51:05.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:51:05.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:51:05.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:51:05.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:05.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:51:05.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:51:05.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:05.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:05.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:05.934 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:51:06.408 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:51:06.880 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:51:07.351 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:51:07.824 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:51:08.296 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:51:08.768 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:51:08.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:08.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:08.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:08.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:08.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:08.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:08.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:08.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:08.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:51:08.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:51:08.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:51:08.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:51:08.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:51:08.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:51:08.875 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:51:08.875 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2881 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:08.875 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2881 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:08.875 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2881 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:08.875 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2881 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:08.875 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2881 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:08.875 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2881 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:13.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:51:13.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:51:13.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:51:13.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:51:13.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:51:13.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:51:13.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:51:13.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:51:13.887 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:13.887 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:51:13.887 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:51:13.890 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:51:13.891 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:51:13.891 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:51:13.891 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:13.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:51:13.892 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:51:13.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:51:13.892 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:51:13.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:13.893 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:51:13.894 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:51:13.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:51:13.894 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:13.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:51:13.894 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:51:13.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:51:13.894 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:51:13.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:13.896 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:51:13.896 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:51:13.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:51:13.896 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:13.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:51:13.896 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:51:13.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:51:13.896 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:51:13.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:13.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:51:13.900 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:51:13.900 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:51:13.900 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:13.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:13.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:13.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:13.904 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:51:14.380 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:51:14.426 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:51:14.430 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:51:14.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:14.433 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:51:14.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:14.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:14.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:51:14.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:14.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:51:14.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:51:14.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:51:14.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:51:14.847 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:51:14.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:14.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:14.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:14.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:15.318 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:51:15.791 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:51:15.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:15.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:15.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:15.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:16.264 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:51:16.735 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:51:16.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:16.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:16.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:16.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:17.207 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:51:17.680 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:51:17.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:17.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:17.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:17.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:18.153 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:51:18.625 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:51:18.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:18.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:18.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:18.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:19.098 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:51:19.571 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:51:20.042 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:51:20.514 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:51:20.987 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:51:21.459 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:51:21.931 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:51:22.402 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:51:22.875 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:51:23.348 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:51:23.819 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:51:24.291 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:51:24.764 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:51:25.237 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:51:25.708 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:51:26.180 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:51:26.653 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:51:27.125 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:51:27.597 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:51:28.068 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:51:28.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:28.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:28.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:28.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:28.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:28.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:28.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:51:28.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:51:28.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:51:28.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:51:28.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:51:28.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:51:28.366 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:51:33.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:51:33.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:51:33.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:51:33.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:51:33.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:51:33.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:51:33.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:51:33.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:51:33.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:33.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:51:33.388 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:51:33.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:51:33.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:51:33.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:51:33.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:33.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:51:33.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:51:33.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:51:33.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:51:33.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:33.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:51:33.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:51:33.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:51:33.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:33.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:51:33.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:51:33.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:51:33.392 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:51:33.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:33.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:51:33.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:51:33.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:51:33.394 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:33.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:51:33.394 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:51:33.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:51:33.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:51:33.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:51:33.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:51:33.396 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:51:33.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:33.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:33.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:33.401 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:51:33.878 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:51:33.922 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:51:33.923 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:51:33.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:33.925 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:51:33.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:33.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:33.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:51:33.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:33.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:51:33.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:51:33.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:51:33.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:51:33.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:33.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:51:33.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:51:33.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:33.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:34.349 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:51:34.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:34.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:34.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:34.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:34.821 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:51:35.294 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:51:35.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:35.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:35.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:35.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:35.766 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:51:35.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:35.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:35.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:35.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:51:35.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:35.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:51:35.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:51:35.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:51:35.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:51:36.238 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:51:36.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:36.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:36.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:36.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:36.709 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:51:37.180 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:51:37.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:37.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:37.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:37.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:37.653 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:51:38.125 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:51:38.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:38.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:38.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:38.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:38.592 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:51:39.064 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:51:39.534 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:51:40.005 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:51:40.476 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:51:40.949 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:51:41.421 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:51:41.894 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:51:42.366 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:51:42.835 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:51:43.306 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:51:43.776 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:51:44.247 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:51:44.718 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:51:45.189 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:51:45.661 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:51:46.134 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:51:46.606 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:51:47.077 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:51:47.548 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:51:48.019 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:51:48.489 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:51:48.960 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:51:49.434 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:51:49.906 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:51:50.378 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:51:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:50.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:50.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:50.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:50.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:50.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:50.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:50.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:51:50.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:51:50.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:51:50.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:51:50.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:51:50.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:51:50.682 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:51:50.682 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3740 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:50.682 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3740 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:50.682 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3740 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:50.682 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3740 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:50.682 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3740 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:50.683 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3740 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:50.683 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3740 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:51:55.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:51:55.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:51:55.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:51:55.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:51:55.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:51:55.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:51:55.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:51:55.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:51:55.694 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:55.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:51:55.694 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:51:55.697 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:51:55.698 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:51:55.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:51:55.698 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:55.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:51:55.698 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:51:55.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:51:55.699 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:51:55.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:55.701 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:51:55.701 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:51:55.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:51:55.702 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:55.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:51:55.702 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:51:55.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:51:55.702 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:51:55.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:55.704 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:51:55.704 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:51:55.704 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:51:55.704 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:51:55.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:51:55.705 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:51:55.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:51:55.705 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:51:55.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:55.707 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:51:55.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:51:55.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:51:55.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:51:55.708 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:51:55.708 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:51:55.708 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:55.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:55.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:51:55.713 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:51:56.191 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:51:56.238 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:51:56.240 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:51:56.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:51:56.242 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:51:56.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:51:56.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:51:56.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:51:56.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:51:56.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:51:56.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:51:56.247 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:51:56.247 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:51:56.663 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:51:56.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:56.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:56.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:56.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:57.134 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:51:57.607 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:51:57.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:57.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:57.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:57.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:58.075 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:51:58.546 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:51:58.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:58.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:58.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:58.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:59.018 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:51:59.491 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:51:59.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:51:59.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:51:59.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:51:59.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:51:59.963 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:52:00.435 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:52:00.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:00.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:00.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:00.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:00.906 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:52:01.379 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:52:01.852 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:52:02.324 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:52:02.795 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:52:03.266 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:52:03.739 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:52:04.211 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:52:04.683 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:52:05.154 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:52:05.625 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:52:06.096 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:52:06.566 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:52:07.037 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:52:07.504 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:52:07.974 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:52:08.444 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:52:08.916 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:52:09.387 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:52:09.859 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:52:10.332 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:52:10.806 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:52:11.275 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:52:11.745 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:52:12.216 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:52:12.687 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:52:13.158 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:52:13.628 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:52:14.095 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:52:14.565 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:52:15.038 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:52:15.510 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:52:15.982 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:52:16.453 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:52:16.924 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:52:17.398 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:52:17.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:52:17.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:52:17.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:17.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:17.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:17.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:17.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:52:17.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:52:17.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:52:17.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:52:17.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:52:17.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:52:17.730 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:52:17.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4767 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:17.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4767 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:17.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4767 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:17.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4767 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:17.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4767 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:17.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4767 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:17.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4767 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:17.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4767 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:22.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:52:22.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:52:22.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:52:22.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:52:22.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:52:22.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:52:22.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:52:22.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:52:22.742 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:52:22.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:52:22.742 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:52:22.744 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:52:22.744 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:52:22.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:52:22.745 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:52:22.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:52:22.745 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:52:22.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:52:22.746 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:52:22.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:22.747 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:52:22.748 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:52:22.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:52:22.748 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:52:22.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:52:22.748 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:52:22.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:52:22.748 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:52:22.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:22.751 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:52:22.751 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:52:22.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:52:22.751 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:52:22.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:52:22.751 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:52:22.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:52:22.751 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:52:22.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:22.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:52:22.756 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:52:22.756 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:52:22.756 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:22.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:22.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:22.760 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:52:23.237 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:52:23.284 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:52:23.286 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:52:23.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:52:23.288 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:52:23.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:52:23.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:52:23.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:52:23.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:52:23.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:52:23.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:52:23.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:52:23.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:52:23.708 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:52:23.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:23.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:23.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:23.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:24.180 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:52:24.653 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:52:24.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:24.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:24.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:24.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:25.126 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:52:25.598 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:52:25.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:25.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:25.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:25.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:26.069 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:52:26.542 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:52:26.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:26.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:26.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:26.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:27.014 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:52:27.487 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:52:27.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:27.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:27.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:27.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:27.957 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:52:28.431 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:52:28.903 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:52:29.375 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:52:29.846 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:52:30.319 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:52:30.792 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:52:31.263 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:52:31.735 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:52:32.208 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:52:32.680 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:52:33.153 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:52:33.623 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:52:34.096 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:52:34.569 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:52:35.041 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:52:35.512 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:52:35.985 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:52:36.457 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:52:36.929 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:52:37.400 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:52:37.872 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:52:38.345 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:52:38.815 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:52:39.288 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:52:39.759 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:52:40.231 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:52:40.704 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:52:41.176 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:52:41.648 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:52:42.119 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:52:42.590 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:52:43.061 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:52:43.535 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:52:44.007 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:52:44.479 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:52:44.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:52:44.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:52:44.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:44.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:44.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:44.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:44.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:52:44.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:52:44.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:52:44.781 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:52:44.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:52:44.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:52:44.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:52:44.782 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4759 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:44.782 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4759 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:44.783 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4759 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:44.783 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4759 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:44.783 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4759 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:44.783 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4759 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:44.783 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4759 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:52:49.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:52:49.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:52:49.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:52:49.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:52:49.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:52:49.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:52:49.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:52:49.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:52:49.793 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:52:49.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:52:49.793 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:52:49.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:52:49.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:52:49.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:52:49.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:52:49.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:52:49.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:52:49.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:52:49.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:52:49.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:49.802 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:52:49.802 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:52:49.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:52:49.802 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:52:49.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:52:49.803 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:52:49.803 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:52:49.803 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:52:49.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:49.806 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:52:49.806 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:52:49.806 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:52:49.806 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:52:49.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:52:49.806 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:52:49.806 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:52:49.807 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:52:49.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:52:49.810 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:52:49.811 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:52:49.811 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:52:49.811 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:49.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:52:49.816 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:52:50.293 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:52:50.340 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:52:50.341 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:52:50.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:52:50.343 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:52:50.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:52:50.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:52:50.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:52:50.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:52:50.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:52:50.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:52:50.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:52:50.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:52:50.765 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:52:50.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:50.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:50.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:50.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:51.237 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:52:51.710 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:52:51.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:51.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:51.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:51.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:52.182 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:52:52.654 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:52:52.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:52.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:52.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:52.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:53.125 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:52:53.595 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:52:53.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:53.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:53.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:53.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:54.067 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:52:54.538 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:52:54.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:52:54.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:52:54.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:52:54.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:52:55.010 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:52:55.483 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:52:55.955 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:52:56.426 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:52:56.898 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:52:57.370 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:52:57.843 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:52:58.315 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:52:58.786 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:52:59.259 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:52:59.732 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:53:00.203 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:53:00.675 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:53:01.147 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:53:01.620 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:53:02.092 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:53:02.565 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:53:03.037 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:53:03.509 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:53:03.980 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:53:04.453 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:53:04.926 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:53:05.397 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:53:05.869 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:53:06.342 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:53:06.814 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:53:07.286 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:53:07.757 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:53:08.230 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:53:08.699 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:53:09.170 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:53:09.641 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:53:10.113 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:53:10.586 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:53:11.058 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:53:11.530 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:53:12.003 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:53:12.475 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:53:12.946 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:53:13.419 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:53:13.892 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:53:14.364 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:53:14.835 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:53:15.307 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:53:15.780 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:53:16.252 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:53:16.726 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:53:17.198 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:53:17.670 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:53:18.141 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:53:18.614 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:53:19.087 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:53:19.557 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:53:20.030 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:53:20.502 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:53:20.973 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:53:21.466 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:53:21.938 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:53:22.409 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:53:22.882 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:53:23.354 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:53:23.825 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:53:23.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:53:23.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:53:23.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:53:23.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:53:23.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:53:23.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:53:23.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:53:23.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:53:23.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:53:23.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:53:23.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:53:23.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:53:23.841 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:53:23.841 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7349 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:23.841 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7349 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:23.841 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7349 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:23.841 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7349 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:23.841 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:23.841 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:28.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:53:28.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:53:28.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:53:28.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:53:28.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:53:28.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:53:28.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:53:28.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:53:28.853 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:53:28.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:53:28.853 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:53:28.856 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:53:28.856 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:53:28.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:53:28.856 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:53:28.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:53:28.857 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:53:28.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:53:28.858 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:53:28.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:53:28.859 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:53:28.860 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:53:28.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:53:28.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:53:28.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:53:28.860 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:53:28.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:53:28.861 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:53:28.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:53:28.864 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:53:28.864 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:53:28.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:53:28.864 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:53:28.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:53:28.865 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:53:28.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:53:28.865 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:53:28.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:53:28.870 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:53:28.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:53:28.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:53:28.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:53:28.870 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:53:28.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:53:28.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:53:28.871 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:53:28.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:53:28.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:53:28.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:53:28.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:53:28.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:53:28.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:53:28.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:53:28.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:53:28.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:53:28.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:53:28.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:53:28.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:53:29.354 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:53:29.400 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:53:29.403 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:53:29.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:53:29.405 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:53:29.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:53:29.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:53:29.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:53:29.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:53:29.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:53:29.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:53:29.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:53:29.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:53:29.826 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:53:29.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:53:29.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:53:29.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:53:29.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:53:30.297 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:53:30.768 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:53:30.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:53:30.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:53:30.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:53:30.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:53:31.239 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:53:31.708 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:53:31.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:53:31.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:53:31.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:53:31.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:53:32.176 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:53:32.647 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:53:32.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:53:32.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:53:32.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:53:32.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:53:33.120 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:53:33.588 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:53:33.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:53:33.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:53:33.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:53:33.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:53:34.059 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:53:34.530 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:53:35.001 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:53:35.471 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:53:35.942 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:53:36.412 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:53:36.883 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:53:37.356 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:53:37.829 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:53:38.301 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:53:38.771 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:53:39.242 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:53:39.713 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:53:40.184 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:53:40.656 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:53:41.129 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:53:41.601 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:53:42.072 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:53:42.543 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:53:43.016 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:53:43.488 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:53:43.960 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:53:44.431 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:53:44.904 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:53:45.377 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:53:45.849 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:53:46.322 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:53:46.794 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:53:47.266 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:53:47.738 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:53:48.207 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:53:48.678 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:53:49.150 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:53:49.623 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:53:50.095 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:53:50.567 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:53:51.038 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:53:51.508 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:53:51.979 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:53:52.452 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:53:52.924 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:53:53.391 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:53:53.862 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:53:54.333 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:53:54.807 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:53:55.274 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:53:55.745 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:53:56.216 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:53:56.690 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:53:56.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:53:56.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:53:56.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:53:56.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:53:56.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:53:56.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:53:56.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:53:56.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:53:56.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:53:56.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:53:56.899 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:53:56.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:53:56.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:53:56.899 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6066 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:56.899 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6066 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:56.899 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6066 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:56.899 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6066 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:56.899 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6066 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:53:56.899 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6066 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:01.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:01.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:01.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:01.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:01.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:01.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:01.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:01.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:01.912 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:01.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:01.912 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:54:01.914 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:54:01.914 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:54:01.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:01.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:01.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:01.915 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:54:01.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:01.915 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:54:01.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:01.917 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:54:01.917 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:54:01.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:01.917 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:01.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:01.917 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:54:01.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:01.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:54:01.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:01.919 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:54:01.919 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:54:01.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:01.919 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:01.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:01.919 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:54:01.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:01.919 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:54:01.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:01.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:54:01.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:54:01.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:54:01.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:54:01.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:54:01.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:54:01.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:54:01.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:54:01.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:01.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:54:01.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:54:01.922 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:54:01.922 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:01.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:01.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:01.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:54:02.405 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:54:02.442 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:54:02.442 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:54:02.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:54:02.444 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:54:02.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:02.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:02.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:02.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:02.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:02.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:02.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:02.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:02.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:02.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:02.461 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:54:02.461 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:02.461 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:02.461 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:02.461 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:02.461 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:02.461 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:07.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:07.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:07.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:07.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:07.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:07.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:07.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:07.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:07.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:07.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:07.474 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:54:07.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:54:07.478 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:54:07.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:07.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:07.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:07.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:54:07.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:07.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:54:07.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:07.481 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:54:07.481 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:54:07.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:07.481 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:07.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:07.482 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:54:07.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:07.482 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:54:07.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:07.484 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:54:07.484 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:54:07.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:07.484 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:07.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:07.485 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:54:07.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:07.485 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:54:07.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:07.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:54:07.489 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:54:07.489 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:54:07.489 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:07.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:07.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:07.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:07.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:07.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:07.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:07.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:07.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:07.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:07.493 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:54:07.972 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:54:08.010 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:54:08.010 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:54:08.012 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:54:08.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:54:08.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:08.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:08.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:08.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:08.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:08.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:08.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:08.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:08.028 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:54:08.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:08.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:08.028 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:08.029 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:08.029 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:08.029 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:08.029 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:08.029 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:13.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:13.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:13.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:13.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:13.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:13.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:13.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:13.046 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:13.046 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:13.046 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:13.046 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:54:13.049 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:54:13.049 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:54:13.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:13.050 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:13.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:13.051 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:54:13.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:13.051 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:54:13.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:13.053 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:54:13.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:54:13.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:13.053 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:13.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:13.053 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:54:13.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:13.053 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:54:13.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:13.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:54:13.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:54:13.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:13.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:13.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:13.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:54:13.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:13.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:54:13.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:54:13.060 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:54:13.061 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:54:13.061 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:54:13.061 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:13.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:13.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:13.066 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:54:13.544 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:54:13.606 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:54:13.610 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:54:13.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:54:13.612 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:54:13.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:13.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:13.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:13.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:13.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:13.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:13.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:13.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:13.630 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:54:13.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:13.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:13.630 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:13.630 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:13.630 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:13.630 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:13.630 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:13.630 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:18.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:18.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:18.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:18.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:18.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:18.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:18.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:18.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:18.641 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:18.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:18.641 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:54:18.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:54:18.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:54:18.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:18.646 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:18.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:18.646 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:54:18.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:18.647 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:54:18.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:18.649 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:54:18.649 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:54:18.649 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:18.649 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:18.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:18.650 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:54:18.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:18.650 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:54:18.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:18.652 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:54:18.652 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:54:18.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:18.653 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:18.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:18.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:54:18.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:18.653 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:54:18.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:18.656 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:54:18.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:54:18.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:54:18.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:54:18.656 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:54:18.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:54:18.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:54:18.657 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:54:18.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:18.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:18.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:18.662 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:54:19.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:54:19.179 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:54:19.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:54:19.182 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:54:19.184 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:54:19.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:54:19.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:54:19.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:54:19.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:54:19.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:54:19.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:54:19.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:54:19.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:54:19.612 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:54:19.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:19.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:19.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:19.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:20.084 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:54:20.556 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:54:20.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:20.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:20.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:20.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:21.029 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:54:21.501 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:54:21.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:21.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:21.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:21.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:21.972 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:54:22.445 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:54:22.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:22.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:22.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:22.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:22.918 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:54:23.389 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:54:23.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:23.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:23.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:23.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:23.860 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:54:24.332 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:54:24.804 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:54:25.277 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:54:25.749 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:54:26.220 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:54:26.690 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:54:27.161 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:54:27.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:54:27.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:54:27.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:27.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:27.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:27.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:27.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:27.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:27.243 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:27.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:27.244 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:54:27.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:27.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:27.244 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:27.244 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:27.244 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:27.244 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:27.244 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:27.244 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:32.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:32.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:32.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:32.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:32.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:32.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:32.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:32.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:32.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:32.259 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:32.259 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:54:32.262 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:54:32.262 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:54:32.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:32.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:32.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:32.263 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:54:32.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:32.264 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:54:32.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:32.265 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:54:32.266 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:54:32.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:32.266 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:32.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:32.266 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:54:32.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:32.266 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:54:32.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:32.268 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:54:32.269 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:54:32.269 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:32.269 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:32.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:32.269 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:54:32.269 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:32.269 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:54:32.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:32.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:54:32.273 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:54:32.273 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:54:32.273 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:32.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:32.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:32.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:32.277 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:54:32.753 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:54:32.798 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:54:32.800 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:54:32.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:54:32.801 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:54:32.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:54:32.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:54:32.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:54:32.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:54:32.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:54:32.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:54:32.806 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:54:32.806 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:54:33.225 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:54:33.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:33.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:33.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:33.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:33.696 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:54:34.167 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:54:34.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:34.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:34.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:34.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:34.639 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:54:35.112 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:54:35.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:35.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:35.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:35.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:35.584 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:54:36.055 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:54:36.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:36.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:36.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:36.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:36.528 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:54:37.000 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:54:37.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:37.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:37.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:37.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:37.472 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:54:37.943 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:54:38.415 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:54:38.887 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:54:39.359 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:54:39.831 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:54:40.302 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:54:40.776 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:54:40.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:54:40.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:54:40.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:40.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:40.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:40.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:40.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:40.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:40.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:40.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:40.860 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:54:40.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:40.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:40.860 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:40.860 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:40.860 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:40.860 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:40.860 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:40.860 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:45.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:45.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:45.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:45.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:45.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:45.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:45.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:45.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:45.873 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:45.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:45.873 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:54:45.875 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:54:45.876 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:54:45.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:45.876 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:45.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:45.876 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:54:45.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:45.876 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:54:45.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:45.878 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:54:45.878 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:54:45.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:45.878 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:45.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:45.878 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:54:45.879 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:45.879 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:54:45.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:45.880 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:54:45.880 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:54:45.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:45.880 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:45.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:45.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:54:45.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:45.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:54:45.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:54:45.883 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:54:45.883 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:54:45.883 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:45.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:45.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:45.888 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:54:46.367 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:54:46.412 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:54:46.414 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:54:46.416 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:54:46.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:54:46.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:54:46.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:54:46.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:54:46.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:54:46.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:54:46.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:54:46.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:54:46.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:54:46.838 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:54:46.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:46.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:46.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:46.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:47.310 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:54:47.781 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:54:47.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:47.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:47.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:47.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:48.254 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:54:48.726 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:54:48.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:48.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:48.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:48.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:49.198 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:54:49.669 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:54:49.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:49.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:49.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:49.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:50.142 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:54:50.615 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:54:50.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:50.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:50.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:50.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:51.087 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:54:51.558 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:54:52.030 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:54:52.503 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:54:52.975 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:54:53.447 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:54:53.920 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:54:54.392 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:54:54.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:54:54.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:54:54.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:54.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:54.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:54.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:54.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:54.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:54.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:54.473 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:54:54.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:54.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:54.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:54.474 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:54.474 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:54.474 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:54.474 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:54.475 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:54.475 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:54:59.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:54:59.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:54:59.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:59.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:59.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:59.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:59.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:54:59.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:59.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:59.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:54:59.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:54:59.488 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:54:59.488 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:54:59.488 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:59.488 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:59.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:54:59.489 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:54:59.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:54:59.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:54:59.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:54:59.491 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:54:59.491 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:54:59.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:59.491 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:59.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:54:59.491 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:54:59.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:54:59.492 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:54:59.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:54:59.493 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:54:59.493 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:54:59.493 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:59.494 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:54:59.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:54:59.494 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:54:59.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:54:59.494 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:54:59.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:54:59.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:54:59.497 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:54:59.497 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:54:59.497 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:54:59.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:54:59.501 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:54:59.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:55:00.024 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:55:00.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:55:00.028 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:55:00.029 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:55:00.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:55:00.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:55:00.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:55:00.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:55:00.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:55:00.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:55:00.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:55:00.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:55:00.447 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:55:00.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:00.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:00.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:00.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:00.916 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:55:01.387 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:55:01.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:01.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:01.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:01.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:01.860 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:55:02.332 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:55:02.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:02.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:02.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:02.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:02.805 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:55:03.277 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:55:03.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:03.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:03.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:03.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:03.748 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:55:04.221 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:55:04.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:04.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:04.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:04.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:04.693 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:55:05.164 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:55:05.635 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:55:06.107 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:55:06.580 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:55:07.052 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:55:07.523 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:55:07.996 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:55:08.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:55:08.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:55:08.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:08.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:08.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:08.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:08.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:55:08.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:55:08.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:55:08.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:55:08.082 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:55:08.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:55:08.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:55:08.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:08.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:08.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:08.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:08.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:08.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:13.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:55:13.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:55:13.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:55:13.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:55:13.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:55:13.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:55:13.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:55:13.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:55:13.096 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:13.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:55:13.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:55:13.101 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:55:13.102 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:55:13.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:55:13.102 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:13.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:55:13.103 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:55:13.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:55:13.104 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:55:13.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:13.106 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:55:13.107 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:55:13.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:55:13.107 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:13.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:55:13.108 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:55:13.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:55:13.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:55:13.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:13.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:55:13.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:55:13.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:55:13.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:13.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:55:13.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:55:13.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:55:13.112 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:55:13.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:13.116 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:55:13.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:55:13.116 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:55:13.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:55:13.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:55:13.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:55:13.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:55:13.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:55:13.117 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:55:13.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:13.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:55:13.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:13.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:13.117 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:55:13.117 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:55:13.117 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:55:13.117 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:55:13.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:13.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:13.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:13.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:13.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:13.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:13.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:13.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:13.122 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:55:13.600 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:55:13.645 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:55:13.647 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:55:13.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:55:13.650 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:55:13.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:55:13.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:55:13.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:55:13.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:55:13.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:55:13.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:55:13.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:55:13.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:55:14.071 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:55:14.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:14.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:14.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:14.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:14.543 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:55:15.014 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:55:15.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:15.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:15.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:15.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:15.487 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:55:15.959 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:55:16.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:16.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:16.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:16.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:16.427 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:55:16.897 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:55:17.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:17.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:17.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:17.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:17.368 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:55:17.839 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:55:18.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:18.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:18.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:18.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:18.312 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:55:18.785 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:55:19.257 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:55:19.728 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:55:20.201 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:55:20.674 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:55:21.146 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:55:21.617 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:55:21.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:55:21.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:55:21.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:21.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:21.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:21.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:21.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:55:21.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:55:21.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:55:21.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:55:21.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:55:21.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:55:21.706 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:55:21.706 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:21.707 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:21.707 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:21.707 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:21.707 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:21.707 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:26.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:55:26.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:55:26.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:55:26.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:55:26.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:55:26.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:55:26.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:55:26.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:55:26.717 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:26.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:55:26.717 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:55:26.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:55:26.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:55:26.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:55:26.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:26.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:55:26.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:55:26.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:55:26.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:55:26.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:26.723 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:55:26.723 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:55:26.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:55:26.723 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:26.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:55:26.724 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:55:26.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:55:26.724 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:55:26.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:26.727 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:55:26.727 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:55:26.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:55:26.727 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:26.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:55:26.727 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:55:26.728 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:55:26.728 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:55:26.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:26.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:26.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:26.734 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:55:26.734 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:55:26.734 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:55:26.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:55:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:26.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:26.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:26.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:26.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:26.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:26.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:26.739 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:55:27.217 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:55:27.264 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:55:27.266 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:55:27.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:55:27.268 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:55:27.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:55:27.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:55:27.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:55:27.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:55:27.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:55:27.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:55:27.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:55:27.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:55:27.689 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:55:27.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:27.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:27.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:27.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:28.160 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:55:28.633 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:55:28.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:28.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:28.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:28.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:29.106 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:55:29.578 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:55:29.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:29.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:29.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:29.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:30.049 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:55:30.522 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:55:30.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:30.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:30.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:30.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:30.994 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:55:31.466 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:55:31.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:31.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:31.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:31.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:31.937 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:55:32.410 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:55:32.883 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:55:33.355 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:55:33.828 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:55:34.301 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:55:34.773 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:55:35.246 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:55:35.719 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:55:36.191 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:55:36.664 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:55:37.137 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:55:37.609 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:55:38.080 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:55:38.550 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:55:39.021 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:55:39.493 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:55:39.966 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:55:40.438 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:55:40.909 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:55:41.381 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:55:41.853 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:55:42.326 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:55:42.798 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:55:43.269 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:55:43.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:55:43.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:55:43.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:43.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:43.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:43.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:43.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:55:43.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:55:43.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:55:43.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:55:43.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:55:43.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:55:43.323 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:55:43.323 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3584 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:43.323 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3584 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:43.323 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3584 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:43.323 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3584 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:43.323 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3584 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:43.323 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3584 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:43.323 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3584 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:48.329 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:55:48.329 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:55:48.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:55:48.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:55:48.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:55:48.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:55:48.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:55:48.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:55:48.337 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:48.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:55:48.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:55:48.341 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:55:48.341 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:55:48.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:55:48.341 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:48.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:55:48.341 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:55:48.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:55:48.341 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:55:48.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:48.345 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:55:48.345 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:55:48.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:55:48.345 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:48.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:55:48.345 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:55:48.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:55:48.345 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:55:48.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:48.349 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:55:48.349 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:55:48.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:55:48.349 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:55:48.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:55:48.350 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:55:48.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:55:48.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:55:48.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:48.355 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:55:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:55:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:55:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:55:48.355 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:55:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:55:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:55:48.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:55:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:55:48.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:55:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:48.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:48.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:55:48.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:55:48.356 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:55:48.356 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:48.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:55:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:55:48.361 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:55:48.838 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:55:48.890 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:55:48.892 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:55:48.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:55:48.893 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:55:48.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:55:48.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:55:48.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:55:48.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:55:48.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:55:48.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:55:48.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:55:48.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:55:49.310 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:55:49.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:49.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:49.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:49.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:49.781 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:55:50.253 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:55:50.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:50.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:50.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:50.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:50.726 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:55:51.198 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:55:51.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:51.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:51.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:51.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:51.669 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:55:52.141 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:55:52.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:52.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:52.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:52.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:52.612 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:55:53.085 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:55:53.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:53.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:53.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:53.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:53.555 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:55:54.028 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:55:54.500 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:55:54.973 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:55:55.445 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:55:55.913 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:55:56.383 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:55:56.854 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:55:56.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:55:56.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:55:56.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:55:56.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:55:56.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:55:56.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:55:56.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:55:56.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:55:56.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:55:56.951 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:55:56.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:55:56.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:55:56.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:55:56.952 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:56.952 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:56.952 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:56.952 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:56.952 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:55:56.952 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:01.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:01.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:01.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:01.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:01.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:01.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:01.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:01.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:01.966 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:01.966 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:01.966 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:56:01.968 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:56:01.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:56:01.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:01.969 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:01.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:01.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:56:01.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:01.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:56:01.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:01.971 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:56:01.971 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:56:01.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:01.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:01.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:01.971 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:56:01.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:01.972 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:56:01.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:01.973 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:56:01.973 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:56:01.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:01.973 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:01.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:01.973 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:56:01.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:01.974 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:56:01.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:56:01.976 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:56:01.976 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:56:01.976 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:01.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:01.981 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:56:02.459 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:56:02.505 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:56:02.507 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:56:02.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:56:02.509 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:56:02.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:02.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:02.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:56:02.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:56:02.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:56:02.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:56:02.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:56:02.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:56:02.931 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:56:02.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:02.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:02.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:02.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:03.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:56:03.876 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:56:03.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:03.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:03.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:03.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:04.348 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:56:04.820 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:56:04.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:04.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:04.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:04.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:05.291 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:56:05.764 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:56:05.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:05.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:05.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:05.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:06.237 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:56:06.709 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:56:06.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:06.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:06.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:06.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:07.180 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:56:07.653 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:56:08.125 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:56:08.596 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:56:09.068 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:56:09.540 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:56:10.011 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:56:10.484 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:56:10.956 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:56:11.428 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:56:11.899 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:56:12.373 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:56:12.845 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:56:13.317 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:56:13.788 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:56:14.262 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:56:14.734 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:56:15.202 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:56:15.672 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:56:16.146 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:56:16.618 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:56:17.090 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:56:17.561 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:56:18.034 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:56:18.507 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:56:18.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:18.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:18.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:18.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:18.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:18.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:18.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:18.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:18.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:18.583 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:56:18.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:18.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:18.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:18.584 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3588 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:18.584 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3588 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:18.584 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3588 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:18.584 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3588 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:18.585 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3588 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:18.585 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3588 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:23.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:23.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:23.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:23.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:23.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:23.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:23.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:23.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:23.594 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:23.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:23.594 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:56:23.598 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:56:23.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:56:23.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:23.599 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:23.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:23.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:56:23.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:23.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:56:23.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:23.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:56:23.604 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:56:23.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:23.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:23.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:23.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:56:23.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:23.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:56:23.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:23.607 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:56:23.608 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:56:23.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:23.608 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:23.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:23.608 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:56:23.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:23.608 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:56:23.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:23.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:56:23.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:56:23.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:56:23.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:56:23.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:56:23.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:56:23.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:56:23.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:56:23.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:23.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:56:23.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:56:23.614 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:56:23.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:23.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:23.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:23.619 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:56:24.097 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:56:24.146 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:56:24.150 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:56:24.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:56:24.153 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:56:24.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:24.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:24.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:56:24.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:24.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:24.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:24.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:24.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:24.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:24.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:24.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:24.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:24.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:24.189 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:56:24.189 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:24.189 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:24.190 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:24.190 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:24.190 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:24.190 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:29.192 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:29.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:29.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:29.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:29.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:29.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:29.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:29.197 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:29.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:29.197 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:56:29.200 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:56:29.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:56:29.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:29.200 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:29.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:29.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:56:29.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:29.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:56:29.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:29.204 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:56:29.204 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:56:29.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:29.204 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:29.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:29.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:56:29.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:29.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:56:29.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:29.207 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:56:29.207 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:56:29.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:29.207 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:29.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:29.207 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:56:29.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:29.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:56:29.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:56:29.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:56:29.212 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:56:29.212 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:56:29.212 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:29.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:29.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:29.217 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:56:29.694 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:56:29.747 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:56:29.749 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:56:29.752 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:56:29.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:56:29.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:29.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:29.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:56:29.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:29.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:29.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:29.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:29.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:29.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:29.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:29.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:29.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:29.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:29.812 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:56:29.812 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.813 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.813 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.813 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.813 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.813 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.813 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.814 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.814 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.814 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:29.814 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:34.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:34.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:34.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:34.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:34.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:34.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:34.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:34.823 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:34.823 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:34.823 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:34.823 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:56:34.826 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:56:34.826 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:56:34.826 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:34.827 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:34.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:34.827 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:56:34.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:34.828 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:56:34.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:34.829 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:56:34.829 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:56:34.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:34.829 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:34.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:34.829 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:56:34.829 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:34.829 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:56:34.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:34.831 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:56:34.831 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:56:34.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:34.831 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:34.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:34.831 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:56:34.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:34.831 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:56:34.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:34.833 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:56:34.834 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:56:34.834 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:56:34.834 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:34.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:34.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:34.839 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:56:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:56:35.360 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:56:35.362 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:56:35.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:56:35.365 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:56:35.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:35.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:35.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:56:35.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:35.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:35.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:35.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:35.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:35.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:35.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:35.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:35.409 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:56:35.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:35.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:35.410 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:35.410 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:35.410 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:35.410 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:35.410 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:35.411 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:56:40.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:40.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:40.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:40.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:40.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:40.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:40.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:40.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:40.422 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:40.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:40.422 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:56:40.427 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:56:40.427 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:56:40.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:40.427 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:40.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:40.428 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:56:40.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:40.428 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:56:40.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:40.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:56:40.432 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:56:40.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:40.432 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:40.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:40.433 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:56:40.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:40.433 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:56:40.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:40.436 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:56:40.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:56:40.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:40.437 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:40.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:40.437 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:56:40.437 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:40.437 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:56:40.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:40.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:56:40.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:56:40.442 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:56:40.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:40.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:40.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:40.447 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:56:40.923 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:56:40.972 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:56:40.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:56:40.976 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:56:40.978 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:56:41.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:41.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:41.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:56:41.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:41.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:41.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:41.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:41.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:41.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:41.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:41.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:41.025 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:56:41.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:41.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:46.031 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:46.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:46.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:46.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:46.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:46.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:46.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:46.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:46.041 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:46.042 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:46.042 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:56:46.045 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:56:46.046 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:56:46.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:46.046 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:46.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:46.046 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:56:46.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:46.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:56:46.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:46.049 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:56:46.050 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:56:46.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:46.050 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:46.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:46.050 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:56:46.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:46.050 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:56:46.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:46.053 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:56:46.053 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:56:46.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:46.053 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:46.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:46.053 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:56:46.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:46.053 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:56:46.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:56:46.056 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:56:46.057 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:56:46.057 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:56:46.057 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:46.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:46.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:46.062 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:56:46.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:56:46.585 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:56:46.588 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:56:46.588 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:56:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:56:46.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:46.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:46.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:56:46.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:46.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:46.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:56:46.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:46.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:46.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:46.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:46.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:46.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:46.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:46.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:46.629 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:56:46.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:46.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:51.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:51.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:51.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:51.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:51.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:51.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:51.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:51.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:51.647 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:51.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:51.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:56:51.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:56:51.653 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:56:51.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:51.653 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:51.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:51.654 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:56:51.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:51.655 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:56:51.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:51.657 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:56:51.658 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:56:51.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:51.658 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:51.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:51.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:56:51.660 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:51.660 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:56:51.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:51.662 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:56:51.662 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:56:51.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:51.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:51.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:51.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:56:51.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:51.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:56:51.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:51.666 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:56:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:56:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:56:51.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:56:51.667 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:56:51.667 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:56:51.667 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:51.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:51.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:51.672 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:56:52.150 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:56:52.202 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:56:52.204 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:56:52.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:56:52.207 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:56:52.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:52.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:52.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:56:52.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:52.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:52.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:56:52.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:52.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:52.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:52.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:52.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:52.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:52.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:52.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:52.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:52.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:52.249 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:56:57.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:56:57.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:56:57.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:57.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:57.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:57.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:57.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:56:57.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:57.266 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:57.266 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:56:57.266 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:56:57.270 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:56:57.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:56:57.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:57.272 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:57.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:56:57.272 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:56:57.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:56:57.273 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:56:57.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:57.276 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:56:57.276 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:56:57.277 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:57.277 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:57.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:56:57.278 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:56:57.278 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:56:57.278 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:56:57.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:57.280 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:56:57.280 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:56:57.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:57.280 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:56:57.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:56:57.280 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:56:57.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:56:57.281 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:56:57.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:57.284 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:56:57.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:56:57.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:56:57.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:56:57.284 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:56:57.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:56:57.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:56:57.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:57.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:56:57.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:56:57.285 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:56:57.285 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:56:57.285 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:57.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:56:57.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:56:57.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:56:57.767 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:56:57.817 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:56:57.820 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:56:57.821 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:56:57.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:56:57.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:56:57.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:56:57.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:56:57.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:56:57.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:56:57.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:56:57.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:56:57.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:56:58.235 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:56:58.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:58.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:58.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:58.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:58.705 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:56:59.176 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:56:59.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:56:59.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:56:59.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:56:59.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:56:59.647 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:57:00.120 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:57:00.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:00.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:00.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:00.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:00.592 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:57:01.064 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:57:01.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:01.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:01.535 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:57:02.008 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:57:02.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:02.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:02.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:02.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:02.481 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:57:02.953 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:57:03.424 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:57:03.897 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:57:04.365 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:57:04.836 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:57:05.308 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:57:05.781 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:57:06.253 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 03:57:06.724 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 03:57:07.195 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 03:57:07.668 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 03:57:08.136 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 03:57:08.606 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 03:57:09.078 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 03:57:09.549 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 03:57:10.019 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 03:57:10.490 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 03:57:10.961 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 03:57:11.432 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 03:57:11.903 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 03:57:12.376 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 03:57:12.848 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 03:57:13.320 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 03:57:13.791 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 03:57:14.264 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 03:57:14.737 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 03:57:15.209 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 03:57:15.680 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 03:57:16.151 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 03:57:16.624 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 03:57:17.096 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 03:57:17.568 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 03:57:18.039 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 03:57:18.513 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 03:57:18.985 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 03:57:19.457 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 03:57:19.927 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 03:57:20.398 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 03:57:20.872 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 03:57:21.344 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 03:57:21.816 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 03:57:22.287 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 03:57:22.758 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 03:57:23.231 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 03:57:23.702 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 03:57:24.174 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 03:57:24.646 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 03:57:25.117 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 03:57:25.590 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 03:57:26.058 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 03:57:26.530 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 03:57:27.003 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 03:57:27.475 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 03:57:27.947 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 03:57:28.418 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 03:57:28.891 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 03:57:29.364 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 03:57:29.836 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 03:57:30.307 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 03:57:30.778 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 03:57:31.251 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 03:57:31.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:57:31.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:57:31.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:31.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:31.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:31.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:31.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:57:31.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:57:31.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:57:31.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:57:31.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:57:31.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:57:31.314 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:57:31.314 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7360 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:31.314 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7360 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:31.314 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7360 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:31.314 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7360 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:31.314 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7360 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:31.314 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7360 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:36.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:57:36.317 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:57:36.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:57:36.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:57:36.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:57:36.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:57:36.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:57:36.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:57:36.320 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:36.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:57:36.320 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:57:36.321 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:57:36.321 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:57:36.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:57:36.322 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:36.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:57:36.322 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:57:36.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:57:36.322 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:57:36.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:36.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:57:36.323 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:57:36.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:57:36.323 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:36.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:57:36.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:57:36.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:57:36.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:57:36.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:36.324 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:57:36.324 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:57:36.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:57:36.324 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:36.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:57:36.324 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:57:36.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:57:36.324 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:57:36.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:57:36.326 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:57:36.326 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:57:36.326 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:36.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:36.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:36.331 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:57:36.808 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:57:36.854 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:57:36.857 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:57:36.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:57:36.859 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:57:37.280 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:57:37.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:37.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:37.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:37.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:37.756 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:57:38.227 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:57:38.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:38.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:38.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:38.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:38.698 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:57:39.174 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:57:39.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:39.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:39.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:39.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:39.645 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:57:39.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:57:39.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:39.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:39.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:39.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:39.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:57:39.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:57:39.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:57:39.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:57:39.876 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:57:39.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:57:39.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:57:39.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=766 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:39.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=766 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:39.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=766 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:39.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=766 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:39.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=766 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:39.877 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=766 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:57:44.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:57:44.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:57:44.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:57:44.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:57:44.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:57:44.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:57:44.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:57:44.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:57:44.893 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:44.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:57:44.893 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:57:44.897 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:57:44.898 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:57:44.898 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:57:44.898 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:44.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:57:44.898 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:57:44.899 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:57:44.899 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:57:44.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:44.902 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:57:44.902 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:57:44.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:57:44.902 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:44.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:57:44.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:57:44.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:57:44.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:57:44.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:44.905 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:57:44.906 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:57:44.906 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:57:44.906 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:44.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:57:44.906 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:57:44.906 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:57:44.906 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:57:44.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:44.909 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:57:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:57:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:57:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:57:44.909 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:57:44.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:57:44.910 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:57:44.910 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:57:44.910 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:44.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:44.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:44.915 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:57:45.392 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:57:45.443 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:57:45.445 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:57:45.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:57:45.447 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:57:45.864 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:57:45.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:45.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:45.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:45.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:46.339 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:57:46.811 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:57:46.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:46.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:46.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:46.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:47.276 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:57:47.748 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:57:47.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:47.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:47.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:47.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:48.220 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:57:48.693 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:57:48.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:48.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:48.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:48.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:49.166 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:57:49.629 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:49.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:50.095 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:57:50.558 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:57:51.027 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:57:51.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:51.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:51.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:51.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:51.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:57:51.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:57:51.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:57:51.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:57:51.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:57:51.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:57:51.463 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:57:56.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:57:56.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:57:56.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:57:56.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:57:56.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:57:56.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:57:56.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:57:56.479 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:57:56.479 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:56.479 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:57:56.479 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:57:56.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:57:56.484 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:57:56.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:57:56.485 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:56.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:57:56.486 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:57:56.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:57:56.486 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:57:56.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:56.489 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:57:56.489 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:57:56.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:57:56.489 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:56.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:57:56.489 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:57:56.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:57:56.489 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:57:56.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:56.490 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:57:56.490 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:57:56.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:57:56.490 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:57:56.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:57:56.490 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:57:56.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:57:56.490 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:57:56.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:56.492 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:57:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:57:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:57:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:57:56.492 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:56.493 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:57:56.493 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:57:56.493 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:57:56.494 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:57:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:57:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:57:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:57:56.498 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:57:56.976 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:57:57.029 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:57:57.031 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:57:57.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:57:57.034 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:57:57.447 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:57:57.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:57.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:57.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:57.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:57.920 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:57:58.394 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:57:58.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:58.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:58.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:58.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:58.865 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:57:59.336 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:57:59.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:57:59.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:57:59.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:57:59.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:57:59.806 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:58:00.278 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:58:00.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:00.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:00.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:00.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:00.750 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:58:01.223 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:58:01.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:01.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:01.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:01.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:01.696 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:58:02.168 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:58:02.638 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:58:03.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:03.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:03.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:03.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:03.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:03.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:03.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:03.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:03.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:03.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:03.052 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:58:08.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:08.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:08.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:08.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:08.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:08.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:08.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:08.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:08.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:08.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:08.066 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:58:08.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:58:08.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:58:08.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:08.068 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:08.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:08.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:58:08.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:08.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:58:08.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:08.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:58:08.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:58:08.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:08.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:08.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:08.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:58:08.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:08.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:58:08.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:08.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:58:08.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:58:08.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:08.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:08.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:08.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:58:08.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:08.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:58:08.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:08.075 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:58:08.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:58:08.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:58:08.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:58:08.075 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:58:08.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:58:08.076 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:58:08.076 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:58:08.076 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:08.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:08.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:08.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:08.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:08.081 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:58:08.555 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:58:08.607 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:58:08.609 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:58:08.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:58:08.611 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:58:09.026 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:58:09.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:09.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:09.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:09.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:09.502 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:58:09.974 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:58:10.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:10.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:10.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:10.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:10.449 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:58:10.921 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:58:11.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:11.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:11.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:11.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:11.387 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:58:11.858 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:58:12.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:12.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:12.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:12.333 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:58:12.805 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:58:13.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:13.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:13.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:13.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:13.276 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:58:13.747 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:58:14.213 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:58:14.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:14.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:14.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:14.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:14.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:14.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:14.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:14.628 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:58:14.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:14.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:14.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:14.628 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1418 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:14.628 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1418 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:14.628 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1418 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:14.628 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1418 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:14.628 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1418 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:14.628 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1418 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:19.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:19.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:19.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:19.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:19.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:19.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:19.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:19.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:19.641 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:19.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:19.642 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:58:19.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:58:19.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:58:19.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:19.646 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:19.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:19.646 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:58:19.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:19.646 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:58:19.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:19.649 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:58:19.649 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:58:19.649 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:19.649 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:19.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:19.650 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:58:19.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:19.650 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:58:19.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:19.652 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:58:19.652 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:58:19.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:19.652 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:19.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:19.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:58:19.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:19.653 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:58:19.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:19.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:58:19.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:58:19.657 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:58:19.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:19.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:19.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:19.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:19.661 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:58:20.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:58:20.189 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:58:20.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:58:20.190 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:58:20.191 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:58:20.612 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:58:20.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:20.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:20.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:20.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:21.083 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:58:21.558 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:58:21.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:21.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:21.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:21.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:22.030 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:58:22.505 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:58:22.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:22.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:22.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:22.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:22.977 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:58:23.448 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:58:23.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:23.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:23.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:23.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:23.923 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:58:24.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:58:24.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:58:24.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:24.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:24.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:24.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:24.866 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:58:25.335 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:58:25.803 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:58:26.278 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:58:26.750 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:58:27.226 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:58:27.698 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:58:28.173 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:58:28.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:28.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:28.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:28.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:28.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:28.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:28.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:28.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:28.216 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:58:28.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:28.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:28.216 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:28.216 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:28.216 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:28.216 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:28.216 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:28.216 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:33.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:33.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:33.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:33.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:33.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:33.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:33.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:33.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:33.229 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:33.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:33.229 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:58:33.231 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:58:33.231 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:58:33.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:33.232 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:33.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:33.232 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:58:33.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:33.233 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:58:33.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:33.234 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:58:33.234 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:58:33.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:33.234 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:33.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:33.234 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:58:33.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:33.234 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:58:33.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:33.236 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:58:33.236 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:58:33.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:33.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:33.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:33.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:58:33.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:33.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:58:33.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:33.238 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:58:33.239 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:58:33.239 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:58:33.239 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:33.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:33.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:33.244 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:58:33.721 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:58:33.764 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:58:33.765 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:58:33.767 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:58:33.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:58:34.186 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:58:34.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:34.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:34.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:34.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:34.649 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:58:35.112 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:58:35.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:35.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:35.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:35.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:35.576 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:58:36.039 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:58:36.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:36.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:36.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:36.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:36.510 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:58:36.981 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:58:37.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:37.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:37.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:37.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:37.454 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:58:37.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:37.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:37.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:37.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:37.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:37.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:37.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:37.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:37.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:37.783 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:58:37.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:42.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:42.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:42.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:42.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:42.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:42.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:42.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:42.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:42.798 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:42.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:42.799 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:58:42.804 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:58:42.804 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:58:42.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:42.804 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:42.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:42.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:58:42.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:42.805 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:58:42.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:42.809 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:58:42.809 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:58:42.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:42.809 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:42.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:42.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:58:42.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:42.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:58:42.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:42.813 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:58:42.813 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:58:42.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:42.813 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:42.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:42.813 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:58:42.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:42.814 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:58:42.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:42.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:58:42.818 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:58:42.818 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:58:42.818 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:42.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:42.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:42.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:42.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:42.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:42.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:42.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:58:43.300 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:58:43.374 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:58:43.376 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:58:43.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:58:43.378 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:58:43.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:43.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:43.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:43.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:43.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:43.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:43.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:43.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:43.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:43.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:43.401 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:58:43.401 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:43.401 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:43.402 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:43.402 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:43.402 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:43.402 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:48.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:48.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:48.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:48.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:48.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:48.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:48.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:48.408 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:48.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:48.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:58:48.411 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:58:48.411 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:58:48.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:48.412 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:48.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:48.412 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:58:48.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:48.413 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:58:48.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:48.414 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:58:48.414 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:58:48.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:48.415 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:48.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:48.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:58:48.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:48.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:58:48.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:48.417 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:58:48.417 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:58:48.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:48.417 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:48.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:48.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:58:48.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:48.417 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:58:48.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:58:48.420 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:58:48.420 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:58:48.420 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:48.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:48.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:48.425 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:58:48.902 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:58:48.944 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:58:48.946 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:58:48.947 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:58:48.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:58:48.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:58:48.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:48.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:48.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:48.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:48.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:48.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:48.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:48.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:48.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:48.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:48.959 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:48.959 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:58:53.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:53.964 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:53.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:53.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:53.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:53.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:53.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:53.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:53.973 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:53.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:53.973 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:58:53.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:58:53.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:58:53.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:53.979 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:53.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:53.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:58:53.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:53.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:58:53.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:53.982 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:58:53.983 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:58:53.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:53.983 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:53.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:53.983 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:58:53.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:53.983 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:58:53.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:53.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:58:53.986 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:58:53.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:53.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:53.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:53.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:58:53.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:53.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:58:53.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:53.991 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:58:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:58:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:58:53.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:58:53.991 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:53.992 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:58:53.992 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:58:53.992 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:58:53.992 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:53.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:53.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:53.997 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:58:54.474 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:58:54.523 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:58:54.524 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:58:54.524 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:58:54.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:58:54.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:54.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:54.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:54.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:54.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:54.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:54.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:54.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:54.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:54.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:54.538 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:58:59.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:58:59.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:58:59.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:59.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:59.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:59.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:59.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:58:59.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:59.549 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:59.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:58:59.549 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:58:59.553 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:58:59.553 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:58:59.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:59.553 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:59.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:58:59.554 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:58:59.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:58:59.554 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:58:59.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:58:59.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:58:59.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:58:59.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:59.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:59.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:58:59.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:58:59.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:58:59.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:58:59.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:58:59.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:58:59.560 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:58:59.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:59.560 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:58:59.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:58:59.560 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:58:59.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:58:59.561 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:58:59.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:59.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:58:59.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:58:59.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:58:59.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:58:59.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:59:00.048 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:59:00.092 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:59:00.094 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:59:00.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:00.097 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:59:00.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:00.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:00.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:59:00.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:00.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:00.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:00.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:59:00.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:59:00.517 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:59:00.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:00.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:00.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:00.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:00.981 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:59:01.452 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:59:01.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:01.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:01.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:01.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:01.923 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:59:02.396 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:59:02.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:02.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:02.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:02.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:02.869 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:59:03.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:03.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:03.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:03.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:03.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:03.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:03.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:03.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:03.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:03.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:03.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:03.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:03.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:03.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:03.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:03.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:59:03.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:59:03.220 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:59:03.220 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=791 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.221 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=791 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.221 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=791 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.221 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=791 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.221 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=791 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.221 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=791 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.221 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=792 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.222 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=792 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.222 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=792 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.222 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=792 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.222 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=792 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.222 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=792 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.222 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=792 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:03.222 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=792 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:08.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:59:08.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:59:08.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:08.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:08.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:08.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:08.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:08.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:59:08.231 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:08.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:59:08.231 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:59:08.233 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:59:08.233 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:59:08.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:59:08.233 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:08.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:08.234 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:59:08.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:59:08.234 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:59:08.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:08.236 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:59:08.236 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:59:08.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:59:08.236 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:08.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:08.236 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:59:08.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:59:08.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:59:08.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:08.238 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:59:08.238 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:59:08.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:59:08.238 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:08.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:08.239 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:59:08.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:59:08.239 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:59:08.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:08.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:59:08.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:59:08.242 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:59:08.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:08.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:08.246 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:59:08.721 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:59:08.770 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:59:08.774 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:59:08.775 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:59:08.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:08.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:08.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:08.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:59:08.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:08.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:08.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:08.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:59:08.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:59:09.193 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:59:09.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:09.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:09.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:09.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:09.665 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:59:10.138 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:59:10.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:10.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:10.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:10.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:10.610 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:59:11.082 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:59:11.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:11.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:11.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:11.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:11.553 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:59:11.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:11.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:11.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:11.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:12.026 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:59:12.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:12.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:12.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:12.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:12.498 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:59:12.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:12.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:12.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:12.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:12.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:12.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:12.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:12.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:12.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:12.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:59:12.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:59:12.519 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:59:12.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:12.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:17.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:59:17.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:59:17.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:17.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:17.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:17.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:17.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:17.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:59:17.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:17.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:59:17.539 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:59:17.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:59:17.546 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:59:17.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:59:17.546 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:17.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:17.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:59:17.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:59:17.547 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:59:17.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:17.550 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:59:17.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:59:17.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:59:17.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:17.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:17.551 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:59:17.551 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:59:17.551 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:59:17.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:17.554 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:59:17.554 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:59:17.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:59:17.554 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:17.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:17.554 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:59:17.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:59:17.554 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:59:17.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:17.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:59:17.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:59:17.559 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:59:17.559 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:17.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:17.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:17.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:17.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:17.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:17.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:17.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:17.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:17.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:17.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:17.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:17.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:59:18.041 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:59:18.086 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:59:18.089 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:59:18.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:18.092 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:59:18.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:18.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:18.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:59:18.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:18.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:18.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:18.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:59:18.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:59:18.513 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:59:18.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:18.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:18.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:18.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:18.984 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:59:19.458 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:59:19.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:19.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:19.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:19.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:19.930 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:59:20.401 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:59:20.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:20.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:20.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:20.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:20.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:59:21.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:21.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:21.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:21.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:21.346 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:59:21.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:21.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:21.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:21.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:21.818 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:59:22.291 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:59:22.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:22.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:22.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:22.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:22.764 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:59:23.237 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:59:23.708 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:59:24.180 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:59:24.653 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:59:25.126 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:59:25.598 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:59:26.069 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:59:26.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:26.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:26.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:26.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:26.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:26.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:26.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:26.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:26.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:59:26.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:59:26.181 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:59:26.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:26.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:26.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:26.182 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:26.182 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:26.182 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:26.182 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:26.182 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:26.182 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:31.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:59:31.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:59:31.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:31.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:31.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:31.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:31.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:31.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:59:31.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:31.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:59:31.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:59:31.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:59:31.196 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:59:31.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:59:31.196 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:31.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:31.197 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:59:31.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:59:31.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:59:31.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:31.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:59:31.199 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:59:31.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:59:31.199 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:31.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:31.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:59:31.200 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:59:31.202 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:59:31.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:59:31.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:59:31.206 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:59:31.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:31.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:59:31.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:59:31.733 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:59:31.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:31.736 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:59:31.738 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:59:31.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:31.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:31.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:59:31.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:31.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:31.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:31.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:59:31.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:59:32.159 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:59:32.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:32.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:32.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:32.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:32.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:59:33.098 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:59:33.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:33.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:33.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:33.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:33.569 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:59:34.039 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:59:34.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:34.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:34.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:34.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:34.512 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:59:34.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:34.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:34.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:34.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:34.985 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:59:35.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:35.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:35.457 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:59:35.928 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:59:36.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:36.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:36.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:36.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:36.399 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:59:36.871 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:59:37.342 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:59:37.815 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:59:38.287 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:59:38.753 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:59:39.224 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:59:39.695 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:59:39.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:39.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:39.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:39.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:39.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:39.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:39.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:39.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:39.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:39.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:39.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:39.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:59:39.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:59:39.818 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:59:44.823 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:59:44.823 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:59:44.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:44.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:44.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:44.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:44.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:44.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:59:44.832 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:44.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:59:44.832 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:59:44.836 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:59:44.836 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:59:44.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:59:44.836 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:44.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:44.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:59:44.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:59:44.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:59:44.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:44.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:59:44.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:59:44.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:59:44.839 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:44.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:44.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:59:44.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:59:44.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:59:44.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:44.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:59:44.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:59:44.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:59:44.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:44.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:44.842 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:59:44.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:59:44.842 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:59:44.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:44.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:59:44.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:59:44.844 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:59:44.845 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:44.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:44.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:59:45.326 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:59:45.369 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:59:45.371 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:59:45.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:45.372 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:59:45.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:45.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:45.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:59:45.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:45.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:45.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:45.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:59:45.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:59:45.798 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:59:45.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:45.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:45.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:45.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:46.269 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 03:59:46.742 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 03:59:46.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:46.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:46.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:46.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:47.215 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 03:59:47.687 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 03:59:47.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:47.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:47.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:47.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:48.158 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 03:59:48.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:48.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:48.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:48.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:48.631 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 03:59:48.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:48.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:48.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:48.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:49.104 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 03:59:49.575 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 03:59:49.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:49.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:49.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:49.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:50.047 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 03:59:50.520 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 03:59:50.993 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 03:59:51.464 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 03:59:51.936 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 03:59:52.409 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 03:59:52.881 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 03:59:53.353 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 03:59:53.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:53.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:53.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:53.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:53.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:53.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:53.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:53.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:53.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:53.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:59:53.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:59:53.456 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 03:59:53.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:53.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:53.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:53.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:53.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:53.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:53.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:53.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 03:59:58.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 03:59:58.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 03:59:58.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:58.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:58.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:58.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:58.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 03:59:58.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:59:58.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:58.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 03:59:58.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 03:59:58.479 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 03:59:58.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 03:59:58.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:59:58.480 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:58.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 03:59:58.480 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 03:59:58.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 03:59:58.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 03:59:58.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:58.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 03:59:58.482 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 03:59:58.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:59:58.482 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:58.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 03:59:58.482 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 03:59:58.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 03:59:58.482 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 03:59:58.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:58.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 03:59:58.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 03:59:58.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:59:58.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 03:59:58.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 03:59:58.483 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 03:59:58.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 03:59:58.483 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 03:59:58.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 03:59:58.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 03:59:58.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 03:59:58.486 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 03:59:58.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 03:59:58.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 03:59:58.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 03:59:59.014 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 03:59:59.016 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 03:59:59.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 03:59:59.018 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 03:59:59.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 03:59:59.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 03:59:59.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 03:59:59.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:59.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:59.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:59.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 03:59:59.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 03:59:59.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 03:59:59.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 03:59:59.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:59.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 03:59:59.439 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 03:59:59.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 03:59:59.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 03:59:59.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 03:59:59.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 03:59:59.911 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:00:00.384 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:00:00.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:00.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:00.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:00.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:00.856 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:00:01.328 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:00:01.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:01.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:01.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:01.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:01.799 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:00:02.272 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:00:02.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:02.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:02.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:02.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:02.745 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:00:03.217 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:00:03.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:03.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:03.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:03.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:03.688 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:00:04.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:04.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:04.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:04.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:04.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:04.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:04.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:04.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:04.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:04.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:04.075 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:00:04.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:04.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:04.075 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:04.075 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:04.075 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:04.075 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:04.075 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:04.075 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:09.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:09.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:09.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:09.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:09.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:09.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:09.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:09.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:09.083 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:09.083 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:09.083 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:00:09.084 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:00:09.084 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:00:09.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:09.084 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:09.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:09.084 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:00:09.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:09.084 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:00:09.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:09.085 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:00:09.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:00:09.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:09.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:09.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:09.086 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:00:09.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:09.086 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:00:09.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:09.087 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:00:09.087 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:00:09.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:09.087 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:09.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:09.087 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:00:09.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:09.087 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:00:09.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:00:09.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:00:09.089 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:00:09.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:09.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:09.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:09.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:00:09.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:00:09.612 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:00:09.614 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:00:09.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:00:09.616 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:00:09.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:09.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:09.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:00:09.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:00:09.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:00:09.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:00:09.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:00:09.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:00:10.038 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:00:10.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:10.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:10.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:10.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:10.509 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:00:10.982 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:00:11.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:11.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:11.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:11.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:11.455 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:00:11.925 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:00:12.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:12.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:12.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:12.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:12.397 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:00:12.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:00:12.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:00:12.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:00:12.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:00:12.868 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:00:13.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:13.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:13.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:13.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:13.334 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:00:13.802 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:00:14.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:14.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:14.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:14.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:14.272 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:00:14.742 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:00:15.213 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:00:15.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:15.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:15.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:00:15.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:15.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:15.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:15.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:15.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:15.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:15.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:15.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:15.270 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:00:15.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:15.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:20.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:20.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:20.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:20.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:20.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:20.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:20.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:20.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:20.284 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:20.285 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:20.285 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:00:20.287 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:00:20.287 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:00:20.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:20.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:20.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:20.287 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:00:20.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:20.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:00:20.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:20.289 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:00:20.289 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:00:20.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:20.289 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:20.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:20.290 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:00:20.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:20.290 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:00:20.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:20.291 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:00:20.291 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:00:20.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:20.292 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:20.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:20.292 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:00:20.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:20.292 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:00:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:20.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:00:20.295 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:00:20.295 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:00:20.295 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:20.299 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:00:20.777 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:00:20.823 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:00:20.825 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:00:20.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:00:20.827 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:00:20.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:20.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:20.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:00:20.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:00:20.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:00:20.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:00:20.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:00:20.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:00:21.249 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:00:21.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:21.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:21.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:21.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:21.720 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:00:22.191 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:00:22.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:22.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:22.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:22.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:22.661 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:00:23.132 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:00:23.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:23.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:23.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:23.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:23.599 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:00:23.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:23.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:23.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:00:23.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:23.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:23.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:23.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:23.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:23.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:23.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:23.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:23.922 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:00:23.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:23.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:23.922 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:23.922 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:23.922 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:23.922 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:23.922 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:23.922 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:28.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:28.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:28.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:28.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:28.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:28.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:28.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:28.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:28.933 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:28.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:28.934 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:00:28.936 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:00:28.936 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:00:28.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:28.936 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:28.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:28.937 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:00:28.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:28.937 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:00:28.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:28.940 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:00:28.940 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:00:28.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:28.941 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:28.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:28.941 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:00:28.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:28.941 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:00:28.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:28.944 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:00:28.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:00:28.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:28.945 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:28.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:28.945 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:00:28.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:28.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:00:28.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:28.950 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:00:28.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:00:28.950 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:00:28.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:00:28.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:00:28.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:00:28.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:00:28.951 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:00:28.951 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:00:28.951 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:28.956 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:00:29.433 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:00:29.479 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:00:29.481 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:00:29.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:00:29.484 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:00:29.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:29.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:29.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:00:29.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:00:29.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:00:29.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:00:29.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:00:29.495 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:00:29.904 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:00:29.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:29.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:29.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:29.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:30.376 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:00:30.847 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:00:30.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:30.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:30.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:30.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:31.320 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:00:31.793 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:00:31.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:31.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:31.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:31.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:32.264 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:00:32.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:32.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:32.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:00:32.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:32.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:32.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:32.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:32.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:32.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:32.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:32.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:32.587 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:00:32.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:32.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:32.587 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:32.587 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:32.587 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:32.587 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:32.587 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:32.587 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:37.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:37.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:37.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:37.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:37.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:37.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:37.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:37.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:37.608 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:37.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:37.608 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:00:37.610 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:00:37.611 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:00:37.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:37.611 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:37.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:37.611 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:00:37.612 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:37.612 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:00:37.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:37.613 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:00:37.613 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:00:37.613 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:37.613 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:37.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:37.613 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:00:37.613 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:37.614 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:00:37.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:37.615 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:00:37.615 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:00:37.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:37.615 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:37.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:37.615 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:00:37.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:37.615 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:00:37.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:37.617 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:00:37.617 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:00:37.617 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:00:37.618 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:37.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:37.622 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:00:38.099 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:00:38.144 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:00:38.147 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:00:38.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:00:38.149 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:00:38.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:38.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:38.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:00:38.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:00:38.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:00:38.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:00:38.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:00:38.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:00:38.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:38.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:38.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:38.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:38.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:38.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:38.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:38.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:38.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:38.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:38.422 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:00:38.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:38.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:43.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:43.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:43.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:43.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:43.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:43.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:43.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:43.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:43.434 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:43.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:43.434 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:00:43.437 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:00:43.438 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:00:43.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:43.438 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:43.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:43.438 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:00:43.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:43.438 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:00:43.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:43.441 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:00:43.441 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:00:43.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:43.442 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:43.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:43.442 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:00:43.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:43.442 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:00:43.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:43.444 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:00:43.445 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:00:43.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:43.445 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:43.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:43.445 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:00:43.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:43.445 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:00:43.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:43.449 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:00:43.449 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:00:43.450 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:00:43.450 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:43.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:43.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:43.454 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:00:43.931 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:00:43.972 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:00:43.974 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:00:43.976 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:00:43.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:00:43.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:43.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:43.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:00:43.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:00:43.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:00:43.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:00:43.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:00:43.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:00:44.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:44.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:44.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:44.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:44.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:44.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:44.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:44.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:44.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:44.209 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:00:44.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:44.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:44.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:44.209 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:44.209 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:44.209 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:44.209 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:44.209 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:44.209 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:44.209 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:00:49.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:49.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:49.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:49.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:49.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:49.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:49.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:49.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:49.220 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:49.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:00:49.221 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:00:49.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:00:49.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:00:49.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:49.224 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:49.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:49.224 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:00:49.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:00:49.225 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:00:49.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:49.227 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:00:49.227 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:00:49.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:49.227 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:49.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:49.227 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:00:49.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:00:49.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:00:49.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:49.230 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:00:49.230 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:00:49.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:49.230 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:00:49.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:49.230 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:00:49.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:00:49.230 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:00:49.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:49.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:00:49.234 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:00:49.234 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:00:49.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:49.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:49.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:49.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:49.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:00:49.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:49.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:49.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:49.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:00:49.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:00:49.238 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:00:49.716 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:00:49.764 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:00:49.766 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:00:49.768 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:00:49.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:00:49.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:49.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:49.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:00:49.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:00:49.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:00:49.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:00:49.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:00:49.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:00:50.188 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:00:50.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:50.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:50.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:50.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:50.659 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:00:51.130 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:00:51.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:51.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:51.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:51.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:51.601 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:00:52.071 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:00:52.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:52.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:52.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:52.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:52.542 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:00:53.013 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:00:53.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:53.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:53.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:53.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:53.483 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:00:53.954 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:00:54.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:54.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:54.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:54.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:54.425 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:00:54.896 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:00:55.367 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:00:55.838 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:00:56.309 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:00:56.781 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:00:57.253 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:00:57.726 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:00:58.197 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:00:58.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:00:58.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:00:58.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:00:58.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:00:58.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:00:58.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:00:58.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:00:58.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:00:58.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:00:58.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:00:58.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:00:58.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:00:58.640 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:01:03.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:01:03.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:01:03.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:03.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:03.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:03.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:03.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:03.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:01:03.652 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:03.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:01:03.653 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:01:03.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:01:03.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:01:03.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:01:03.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:03.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:03.655 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:01:03.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:01:03.655 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:01:03.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:03.658 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:01:03.658 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:01:03.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:01:03.658 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:03.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:03.658 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:01:03.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:01:03.658 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:01:03.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:03.660 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:01:03.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:01:03.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:01:03.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:03.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:03.661 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:01:03.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:01:03.661 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:01:03.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:03.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:01:03.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:01:03.665 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:01:03.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:03.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:03.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:03.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:01:04.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:01:04.193 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:01:04.194 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:01:04.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:01:04.196 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:04.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:01:04.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:01:04.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:01:04.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:01:04.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:01:04.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:01:04.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:01:04.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:01:04.618 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:01:04.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:04.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:04.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:04.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:05.089 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:01:05.562 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:01:05.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:05.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:05.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:05.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:06.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:01:06.505 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:01:06.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:06.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:06.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:06.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:06.978 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:01:07.450 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:01:07.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:07.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:07.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:07.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:07.922 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:01:08.396 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:01:08.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:08.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:08.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:08.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:08.867 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:01:09.339 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:01:09.812 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:01:10.285 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:01:10.757 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:01:11.229 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:01:11.700 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:01:12.171 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:01:12.642 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:01:12.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:01:12.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:01:12.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:12.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:12.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:12.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:12.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:12.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:12.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:12.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:12.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:01:12.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:01:12.997 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:01:18.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:01:18.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:01:18.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:18.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:18.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:18.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:18.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:18.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:01:18.011 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:18.011 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:01:18.011 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:01:18.014 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:01:18.014 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:01:18.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:01:18.015 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:18.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:18.015 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:01:18.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:01:18.015 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:01:18.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:18.018 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:01:18.018 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:01:18.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:01:18.018 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:18.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:18.018 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:01:18.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:01:18.019 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:01:18.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:18.021 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:01:18.021 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:01:18.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:01:18.021 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:18.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:18.022 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:01:18.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:01:18.022 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:01:18.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:18.025 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:01:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:01:18.025 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:01:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:01:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:01:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:01:18.026 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:01:18.026 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:01:18.026 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:18.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:18.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:18.031 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:01:18.508 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:01:18.556 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:01:18.560 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:01:18.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:01:18.563 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:18.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:01:18.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:01:18.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:01:18.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:01:18.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:01:18.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:01:18.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:01:18.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:01:18.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:01:19.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:19.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:19.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:19.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:19.452 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:01:19.924 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:01:20.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:20.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:20.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:20.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:20.397 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:01:20.869 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:01:21.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:21.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:21.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:21.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:21.342 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:01:21.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:01:21.623 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:21.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:01:21.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:01:21.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:01:21.670 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:21.711 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:21.748 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:21.790 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:21.815 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:01:21.837 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:21.873 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:21.915 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:21.956 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:21.993 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:22.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:22.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:22.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:22.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:22.035 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:22.076 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:22.113 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:22.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:01:22.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:01:22.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:01:22.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:22.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:22.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:22.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:22.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:22.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:22.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:22.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:22.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:01:22.163 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:01:22.163 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:01:22.163 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=893 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:01:27.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:01:27.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:01:27.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:27.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:27.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:27.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:27.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:27.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:01:27.173 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:27.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:01:27.173 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:01:27.175 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:01:27.175 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:01:27.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:01:27.175 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:27.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:27.176 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:01:27.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:01:27.176 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:01:27.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:27.178 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:01:27.178 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:01:27.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:01:27.178 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:27.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:27.178 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:01:27.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:01:27.179 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:01:27.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:27.180 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:01:27.180 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:01:27.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:01:27.181 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:27.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:27.181 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:01:27.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:01:27.181 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:01:27.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:27.184 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:01:27.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:01:27.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:01:27.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:01:27.184 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:01:27.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:01:27.185 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:01:27.185 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:27.185 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:27.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:27.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:27.190 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:01:27.667 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:01:27.715 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:01:27.718 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:01:27.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:01:27.720 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:28.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:28.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:28.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:28.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:28.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:28.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:28.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:28.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:28.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:01:28.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:01:28.045 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:01:33.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:01:33.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:01:33.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:33.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:33.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:33.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:33.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:33.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:01:33.058 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:33.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:01:33.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:01:33.062 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:01:33.062 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:01:33.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:01:33.062 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:33.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:33.063 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:01:33.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:01:33.063 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:01:33.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:33.065 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:01:33.065 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:01:33.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:01:33.065 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:33.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:33.066 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:01:33.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:01:33.066 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:01:33.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:33.067 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:01:33.067 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:01:33.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:01:33.067 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:33.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:33.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:01:33.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:01:33.068 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:01:33.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:01:33.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:01:33.071 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:01:33.071 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:33.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:33.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:33.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:33.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:33.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:33.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:33.076 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:01:33.552 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:01:33.596 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:01:33.599 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:01:33.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:01:33.601 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:34.017 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:01:34.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:34.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:34.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:34.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:34.480 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:01:34.952 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:01:35.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:35.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:35.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:35.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:35.424 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:01:35.894 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:01:36.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:36.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:36.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:36.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:36.365 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:01:36.841 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:01:37.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:37.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:37.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:37.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:37.312 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:01:37.785 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:01:38.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:38.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:38.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:38.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:38.258 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:01:38.729 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:01:39.201 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:01:39.673 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:01:40.146 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:01:40.619 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:01:41.091 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:01:41.566 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:01:42.033 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:01:42.496 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:01:42.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:01:42.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:42.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:42.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:42.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:42.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:42.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:42.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:01:42.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:01:42.632 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:01:42.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:42.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:47.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:01:47.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:01:47.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:47.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:47.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:47.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:47.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:47.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:01:47.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:47.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:01:47.650 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:01:47.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:01:47.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:01:47.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:01:47.656 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:47.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:47.657 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:01:47.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:01:47.658 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:01:47.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:47.660 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:01:47.661 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:01:47.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:01:47.661 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:47.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:47.662 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:01:47.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:01:47.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:01:47.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:47.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:01:47.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:01:47.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:01:47.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:01:47.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:47.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:01:47.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:01:47.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:01:47.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:47.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:01:47.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:01:47.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:01:47.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:01:47.670 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:01:47.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:01:47.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:01:47.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:01:47.675 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:01:48.153 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:01:48.202 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:01:48.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:01:48.205 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:01:48.207 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:01:48.622 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:01:48.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:48.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:48.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:48.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:49.095 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:01:49.566 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:01:49.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:49.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:49.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:49.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:50.037 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:01:50.508 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:01:50.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:50.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:50.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:50.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:50.984 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:01:51.456 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:01:51.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:51.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:51.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:51.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:51.930 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:01:52.402 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:01:52.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:52.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:52.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:52.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:52.875 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:01:53.348 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:01:53.814 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:01:54.285 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:01:54.757 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:01:55.229 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:01:55.702 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:01:56.175 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:01:56.647 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:01:57.121 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:01:57.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:01:57.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:01:57.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:01:57.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:01:57.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:01:57.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:01:57.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:01:57.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:01:57.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:01:57.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:01:57.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:01:57.235 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:02:02.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:02.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:02.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:02.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:02.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:02.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:02.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:02.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:02.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:02.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:02.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:02:02.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:02:02.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:02:02.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:02.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:02.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:02.256 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:02:02.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:02.256 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:02:02.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:02.258 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:02:02.258 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:02:02.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:02.258 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:02.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:02.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:02:02.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:02.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:02:02.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:02.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:02:02.261 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:02:02.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:02.261 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:02.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:02.261 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:02:02.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:02.261 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:02:02.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:02.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:02:02.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:02:02.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:02:02.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:02:02.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:02:02.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:02:02.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:02:02.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:02:02.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:02.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:02:02.265 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:02:02.265 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:02:02.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:02.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:02.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:02.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:02.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:02.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:02.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:02.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:02.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:02.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:02.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:02.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:02.269 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:02:02.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:02:02.796 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:02:02.799 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:02:02.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:02.801 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:02:03.219 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:02:03.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:03.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:03.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:03.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:03.694 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:02:04.166 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:02:04.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:04.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:04.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:04.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:04.639 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:02:05.112 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:02:05.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:05.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:05.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:05.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:05.584 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:02:05.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:05.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:05.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:05.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:05.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:05.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:05.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:05.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:05.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:05.854 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:02:05.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:05.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:05.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:05.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:05.855 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:05.855 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:05.855 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:05.855 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:10.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:10.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:10.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:10.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:10.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:10.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:10.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:10.860 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:10.860 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:10.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:10.861 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:02:10.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:02:10.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:02:10.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:10.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:10.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:10.865 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:02:10.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:10.866 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:02:10.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:10.868 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:02:10.869 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:02:10.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:10.869 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:10.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:10.870 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:02:10.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:10.870 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:02:10.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:10.873 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:02:10.873 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:02:10.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:10.874 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:10.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:10.874 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:02:10.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:10.874 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:02:10.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:10.879 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:02:10.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:02:10.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:02:10.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:02:10.879 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:02:10.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:02:10.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:02:10.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:02:10.880 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:02:10.880 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:02:10.880 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:10.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:10.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:10.885 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:02:11.363 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:02:11.410 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:02:11.412 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:02:11.413 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:02:11.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:11.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:02:11.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:02:11.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:02:11.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:02:11.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:02:11.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:02:11.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:02:11.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:02:11.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:11.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:02:11.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:02:11.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:02:11.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:02:11.835 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:02:11.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:11.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:02:11.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:02:11.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:02:11.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:11.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:11.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:11.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:11.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:11.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:11.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:11.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:11.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:11.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:11.858 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:02:11.858 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:11.858 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:11.858 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:11.858 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:11.858 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:11.858 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:11.858 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:11.858 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:16.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:16.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:16.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:16.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:16.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:16.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:16.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:16.870 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:16.870 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:16.870 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:16.870 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:02:16.873 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:02:16.873 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:02:16.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:16.873 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:16.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:16.874 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:02:16.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:16.874 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:02:16.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:16.876 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:02:16.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:02:16.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:16.876 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:16.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:16.876 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:02:16.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:16.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:02:16.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:16.878 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:02:16.878 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:02:16.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:16.878 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:16.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:16.878 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:02:16.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:16.878 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:02:16.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:02:16.880 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:02:16.881 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:02:16.881 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:02:16.881 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:16.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:16.886 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:02:17.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:02:17.406 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:02:17.408 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:02:17.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:17.410 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:02:17.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:17.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:17.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:17.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:17.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:17.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:17.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:17.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:17.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:17.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:17.430 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:02:17.430 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.430 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.430 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.431 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.431 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.431 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.431 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.431 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.431 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.432 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.432 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.432 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:17.432 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:22.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:22.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:22.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:22.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:22.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:22.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:22.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:22.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:22.436 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:22.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:22.436 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:02:22.439 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:02:22.439 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:02:22.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:22.439 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:22.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:22.439 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:02:22.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:22.439 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:02:22.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:22.441 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:02:22.441 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:02:22.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:22.441 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:22.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:22.442 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:02:22.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:22.442 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:02:22.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:22.443 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:02:22.443 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:02:22.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:22.444 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:22.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:22.444 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:02:22.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:22.444 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:02:22.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:02:22.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:02:22.447 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:02:22.447 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:02:22.447 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:22.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:22.452 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:02:22.929 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:02:22.976 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:02:22.977 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:02:22.979 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:02:22.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:23.400 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:02:23.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:23.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:23.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:23.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:23.866 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:02:24.338 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:02:24.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:24.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:24.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:24.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:24.810 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:02:24.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:24.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:24.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:24.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:25.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:25.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:25.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:25.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:25.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:25.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:25.002 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:02:30.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:30.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:30.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:30.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:30.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:30.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:30.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:30.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:30.013 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:30.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:30.013 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:02:30.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:02:30.017 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:02:30.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:30.017 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:30.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:30.017 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:02:30.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:30.018 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:02:30.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:30.020 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:02:30.020 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:02:30.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:30.020 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:30.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:30.021 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:02:30.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:30.021 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:02:30.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:30.023 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:02:30.023 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:02:30.023 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:30.023 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:30.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:30.024 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:02:30.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:30.024 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:02:30.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:30.026 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:02:30.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:02:30.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:02:30.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:02:30.026 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:02:30.027 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:02:30.027 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:02:30.027 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:30.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:30.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:30.032 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:02:30.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:02:30.550 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:02:30.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:30.551 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:02:30.554 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:02:30.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:02:30.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:02:30.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:02:30.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:02:30.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:02:30.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:02:30.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:02:30.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:02:30.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:02:31.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:31.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:31.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:31.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:31.452 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:02:31.923 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:02:32.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:32.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:32.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:32.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:32.393 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:02:32.864 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:02:33.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:33.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:33.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:33.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:33.335 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:02:33.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:02:33.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:02:33.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:33.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:33.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:33.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:33.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:33.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:33.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:33.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:33.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:33.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:33.360 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:02:38.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:38.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:38.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:38.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:38.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:38.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:38.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:38.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:38.370 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:38.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:38.370 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:02:38.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:02:38.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:02:38.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:38.372 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:38.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:38.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:02:38.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:38.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:02:38.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:38.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:02:38.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:02:38.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:38.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:38.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:38.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:02:38.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:38.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:02:38.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:38.374 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:02:38.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:02:38.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:38.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:38.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:38.375 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:02:38.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:38.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:02:38.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:02:38.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:02:38.377 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:02:38.377 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:38.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:38.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:38.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:02:38.859 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:02:38.911 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:02:38.915 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:02:38.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:38.916 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:02:38.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:02:38.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:02:38.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:02:38.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:02:38.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:02:38.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:02:38.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:02:38.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:02:39.331 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:02:39.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:39.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:39.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:39.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:39.802 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:02:40.273 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:02:40.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:40.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:40.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:40.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:40.745 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:02:40.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:02:40.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:02:41.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:41.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:41.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:41.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:41.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:41.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:41.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:41.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:41.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:41.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:41.004 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:02:46.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:46.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:46.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:46.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:46.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:46.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:46.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:46.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:46.017 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:46.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:46.018 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:02:46.019 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:02:46.020 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:02:46.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:46.020 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:46.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:46.020 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:02:46.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:46.021 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:02:46.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:46.022 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:02:46.022 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:02:46.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:46.022 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:46.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:46.022 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:02:46.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:46.022 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:02:46.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:46.024 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:02:46.024 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:02:46.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:46.024 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:46.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:46.024 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:02:46.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:46.024 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:02:46.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:46.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:02:46.026 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:02:46.026 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:02:46.027 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:46.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:46.031 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:02:46.510 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:02:46.559 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:02:46.562 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:02:46.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:46.563 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:02:46.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:02:46.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:02:46.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:02:46.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:02:46.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:02:46.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:02:46.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:02:46.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:02:46.981 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:02:47.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:47.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:47.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:47.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:47.453 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:02:47.926 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:02:48.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:48.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:48.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:48.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:48.399 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:02:48.870 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:02:49.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:49.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:49.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:49.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:49.342 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:02:49.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:02:49.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:02:49.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:49.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:49.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:49.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:49.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:49.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:49.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:49.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:49.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:49.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:49.364 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:02:49.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:49.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:49.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:49.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:49.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:49.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:54.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:54.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:54.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:54.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:54.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:54.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:54.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:54.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:54.381 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:54.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:02:54.382 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:02:54.385 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:02:54.385 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:02:54.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:54.385 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:54.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:54.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:02:54.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:02:54.387 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:02:54.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:54.388 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:02:54.388 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:02:54.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:54.388 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:54.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:54.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:02:54.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:02:54.389 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:02:54.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:54.390 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:02:54.390 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:02:54.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:54.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:02:54.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:54.391 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:02:54.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:02:54.391 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:02:54.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:02:54.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:02:54.394 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:02:54.394 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:02:54.394 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:54.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:02:54.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:02:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:54.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:02:54.398 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:02:54.875 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:02:54.919 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:02:54.920 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:02:54.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:02:54.922 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:02:54.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:02:54.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:02:54.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:02:54.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:02:54.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:02:54.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:02:54.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:02:54.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:02:55.346 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:02:55.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:55.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:55.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:55.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:55.818 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:02:56.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:02:56.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:56.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:56.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:56.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:56.762 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:02:57.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:02:57.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:02:57.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:02:57.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:02:57.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:02:57.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:02:57.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:02:57.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:02:57.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:02:57.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:02:57.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:02:57.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:02:57.024 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:02:57.024 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:57.024 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:57.024 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:57.024 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:57.024 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:02:57.024 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:02.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:02.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:02.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:02.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:02.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:02.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:02.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:02.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:02.034 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:02.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:02.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:03:02.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:03:02.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:03:02.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:02.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:02.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:02.040 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:03:02.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:02.040 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:03:02.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:02.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:03:02.042 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:03:02.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:02.042 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:02.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:02.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:03:02.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:02.043 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:03:02.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:02.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:03:02.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:03:02.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:02.045 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:02.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:02.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:03:02.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:02.046 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:03:02.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:02.049 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:03:02.049 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:03:02.049 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:03:02.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:02.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:02.054 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:03:02.531 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:03:02.575 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:03:02.577 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:03:02.579 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:03:02.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:02.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:03:02.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:03:02.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:03:02.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:03:02.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:03:02.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:03:02.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:03:02.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:03:03.001 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:03:03.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:03.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:03.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:03.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:03.469 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:03:03.940 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:03:04.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:04.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:04.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:04.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:04.411 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:03:04.882 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:03:05.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:05.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:05.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:05.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:05.353 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:03:05.824 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:03:06.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:06.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:06.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:06.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:06.297 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:03:06.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:03:06.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:03:06.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:06.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:06.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:06.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:06.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:06.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:06.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:06.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:06.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:06.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:06.319 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:03:11.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:11.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:11.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:11.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:11.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:11.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:11.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:11.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:11.334 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:11.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:11.334 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:03:11.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:03:11.338 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:03:11.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:11.338 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:11.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:11.339 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:03:11.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:11.339 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:03:11.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:11.341 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:03:11.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:03:11.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:11.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:11.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:11.342 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:03:11.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:11.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:03:11.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:11.344 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:03:11.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:03:11.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:11.345 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:11.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:11.345 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:03:11.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:11.345 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:03:11.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:11.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:03:11.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:03:11.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:03:11.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:03:11.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:03:11.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:03:11.349 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:03:11.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:11.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:11.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:11.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:03:11.831 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:03:11.874 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:03:11.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:11.876 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:03:11.877 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:03:11.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:03:11.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:03:11.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:03:11.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:03:11.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:03:11.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:03:11.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:03:11.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:03:12.303 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:03:12.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:12.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:12.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:12.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:12.774 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:03:13.259 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:03:13.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:13.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:13.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:13.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:13.730 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:03:14.202 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:03:14.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:14.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:14.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:14.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:14.673 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:03:15.143 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:03:15.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:15.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:15.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:15.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:15.614 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:03:15.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:03:15.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:03:15.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:15.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:15.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:15.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:15.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:15.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:15.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:15.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:15.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:15.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:15.876 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:03:20.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:20.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:20.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:20.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:20.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:20.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:20.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:20.891 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:20.891 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:20.891 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:20.891 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:03:20.894 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:03:20.894 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:03:20.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:20.894 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:20.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:20.894 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:03:20.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:20.894 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:03:20.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:20.896 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:03:20.896 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:03:20.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:20.897 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:20.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:20.897 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:03:20.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:20.897 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:03:20.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:20.898 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:03:20.898 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:03:20.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:20.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:20.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:20.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:03:20.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:20.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:03:20.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:20.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:03:20.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:03:20.902 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:03:20.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:20.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:20.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:03:21.383 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:03:21.432 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:03:21.435 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:03:21.435 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:03:21.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:21.855 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:03:21.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:21.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:21.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:21.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:22.328 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:03:22.801 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:03:22.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:22.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:22.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:22.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:23.273 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:03:23.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:23.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:23.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:23.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:23.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:23.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:23.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:23.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:23.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:23.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:23.455 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:03:23.455 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=551 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:23.456 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=551 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:23.456 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=551 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:23.456 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=551 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:23.456 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=551 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:23.456 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=551 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:28.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:28.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:28.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:28.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:28.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:28.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:28.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:28.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:28.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:28.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:28.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:03:28.492 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:03:28.493 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:03:28.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:28.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:28.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:28.494 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:03:28.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:28.494 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:03:28.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:28.499 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:03:28.499 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:03:28.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:28.499 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:28.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:28.500 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:03:28.500 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:28.500 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:03:28.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:28.504 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:03:28.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:03:28.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:28.505 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:28.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:28.505 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:03:28.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:28.505 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:03:28.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:28.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:03:28.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:03:28.511 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:03:28.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:28.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:28.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:28.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:03:28.993 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:03:29.046 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:03:29.048 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:03:29.050 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:03:29.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:29.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:03:29.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:03:29.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:03:29.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:29.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:29.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:03:29.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:29.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:29.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:29.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:29.933 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:03:30.403 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:03:30.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:30.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:30.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:30.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:30.872 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:03:31.345 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:03:31.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:31.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:31.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:31.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:31.818 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:03:32.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:32.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:32.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:32.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:32.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:32.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:32.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:32.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:32.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:32.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:32.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:32.112 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:03:37.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:37.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:37.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:37.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:37.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:37.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:37.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:37.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:37.126 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:37.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:37.127 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:03:37.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:03:37.129 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:03:37.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:37.130 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:37.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:37.130 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:03:37.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:37.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:03:37.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:37.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:03:37.132 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:03:37.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:37.132 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:37.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:37.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:03:37.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:37.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:03:37.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:37.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:03:37.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:03:37.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:37.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:37.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:37.134 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:03:37.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:37.134 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:03:37.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:03:37.137 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:03:37.137 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:03:37.137 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:37.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:37.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:37.142 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:03:37.620 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:03:37.663 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:03:37.665 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:03:37.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:37.667 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:03:37.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:03:37.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:03:37.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:03:37.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:37.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:37.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:37.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:37.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:37.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:37.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:37.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:37.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:37.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:37.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:37.707 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:03:37.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:37.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:42.712 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:42.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:42.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:42.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:42.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:42.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:42.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:42.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:42.719 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:42.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:42.719 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:03:42.723 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:03:42.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:03:42.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:42.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:42.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:42.724 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:03:42.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:42.724 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:03:42.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:42.726 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:03:42.726 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:03:42.726 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:42.726 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:42.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:42.726 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:03:42.726 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:42.726 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:03:42.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:42.728 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:03:42.729 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:03:42.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:42.729 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:42.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:42.729 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:03:42.729 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:42.729 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:03:42.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:03:42.732 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:03:42.732 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:03:42.732 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:03:42.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:42.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:42.737 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:03:43.214 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:03:43.258 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:03:43.261 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:03:43.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:43.264 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:03:43.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:03:43.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:03:43.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:03:43.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:43.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:43.686 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:03:43.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:43.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:43.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:43.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:44.154 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:03:44.617 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:03:44.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:44.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:44.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:44.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:45.082 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:03:45.550 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:03:45.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:45.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:45.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:45.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:46.020 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:03:46.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:46.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:46.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:46.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:46.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:46.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:46.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:46.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:46.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:46.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:46.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:46.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:46.319 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:03:51.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:51.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:51.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:51.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:51.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:51.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:51.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:51.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:51.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:51.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:51.333 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:03:51.335 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:03:51.335 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:03:51.335 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:51.335 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:51.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:51.336 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:03:51.336 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:51.336 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:03:51.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:51.338 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:03:51.338 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:03:51.338 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:51.338 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:51.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:51.338 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:03:51.338 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:51.338 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:03:51.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:51.340 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:03:51.340 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:03:51.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:51.340 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:51.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:51.340 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:03:51.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:51.340 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:03:51.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:51.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:03:51.343 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:03:51.343 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:03:51.343 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:51.347 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:03:51.823 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:03:51.870 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:03:51.873 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:03:51.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:51.875 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:03:51.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:03:51.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:03:51.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:03:51.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:51.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:51.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:51.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:51.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:51.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:51.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:51.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:51.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:51.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:51.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:51.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:51.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:51.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:51.923 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:03:51.923 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:51.924 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:51.924 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:51.924 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:51.924 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:51.924 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:03:56.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:56.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:56.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:56.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:56.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:56.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:56.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:56.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:56.936 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:56.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:03:56.936 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:03:56.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:03:56.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:03:56.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:56.938 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:56.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:56.939 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:03:56.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:03:56.939 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:03:56.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:56.942 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:03:56.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:03:56.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:56.943 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:56.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:56.943 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:03:56.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:03:56.943 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:03:56.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:56.946 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:03:56.946 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:03:56.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:56.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:03:56.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:03:56.947 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:03:56.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:03:56.947 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:03:56.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:56.951 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:03:56.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:03:56.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:56.952 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:03:56.952 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:03:56.952 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:03:56.953 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:56.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:03:56.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:03:56.957 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:03:57.430 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:03:57.483 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:03:57.486 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:03:57.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:03:57.488 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:03:57.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:03:57.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:03:57.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:03:57.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:03:57.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:03:57.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:03:57.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:03:57.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:03:57.503 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:03:57.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:03:57.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:02.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:02.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:02.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:02.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:02.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:02.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:02.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:02.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:02.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:02.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:02.518 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:04:02.524 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:04:02.524 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:04:02.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:02.524 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:02.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:02.525 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:04:02.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:02.526 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:04:02.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:02.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:04:02.530 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:04:02.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:02.530 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:02.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:02.530 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:04:02.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:02.530 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:04:02.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:02.535 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:04:02.535 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:04:02.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:02.535 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:02.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:02.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:04:02.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:02.536 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:04:02.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:02.539 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:04:02.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:04:02.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:04:02.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:04:02.539 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:04:02.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:04:02.540 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:04:02.540 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:04:02.540 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:02.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:02.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:02.545 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:04:03.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:04:03.062 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:04:03.064 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:04:03.065 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:04:03.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:03.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:03.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:03.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:03.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:03.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:03.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:03.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:03.080 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:04:03.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:03.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:03.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:03.081 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:03.081 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:03.081 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:03.081 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:03.081 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:03.081 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:08.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:08.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:08.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:08.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:08.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:08.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:08.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:08.093 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:08.094 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:08.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:08.094 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:04:08.096 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:04:08.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:04:08.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:08.097 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:08.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:08.098 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:04:08.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:08.098 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:04:08.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:08.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:04:08.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:04:08.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:08.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:08.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:08.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:04:08.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:08.100 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:04:08.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:08.101 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:04:08.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:04:08.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:08.102 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:08.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:08.102 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:04:08.102 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:08.102 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:04:08.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:08.104 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:04:08.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:04:08.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:04:08.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:04:08.104 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:04:08.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:04:08.105 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:04:08.105 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:04:08.105 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:08.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:08.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:08.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:08.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:08.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:08.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:08.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:08.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:08.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:08.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:08.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:08.109 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:04:08.584 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:04:08.635 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:04:08.636 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:04:08.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:08.638 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:04:08.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:08.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:08.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:08.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:08.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:08.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:08.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:08.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:08.644 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:04:08.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:08.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:08.644 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:08.644 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:08.644 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:08.644 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:08.644 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:08.644 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:13.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:13.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:13.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:13.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:13.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:13.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:13.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:13.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:13.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:13.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:13.661 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:04:13.665 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:04:13.666 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:04:13.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:13.666 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:13.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:13.666 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:04:13.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:13.667 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:04:13.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:13.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:04:13.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:04:13.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:13.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:13.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:13.671 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:04:13.671 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:13.671 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:04:13.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:13.673 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:04:13.674 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:04:13.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:13.674 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:13.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:13.674 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:04:13.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:13.674 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:04:13.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:13.677 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:04:13.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:04:13.678 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:04:13.678 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:04:13.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:13.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:13.683 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:04:14.161 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:04:14.207 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:04:14.210 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:04:14.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:14.213 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:04:14.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:14.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:14.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:14.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:14.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:14.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:14.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:14.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:14.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:14.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:14.228 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:04:19.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:19.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:19.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:19.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:19.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:19.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:19.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:19.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:19.243 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:19.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:19.243 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:04:19.245 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:04:19.245 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:04:19.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:19.246 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:19.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:19.246 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:04:19.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:19.246 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:04:19.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:19.248 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:04:19.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:04:19.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:19.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:19.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:19.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:04:19.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:19.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:04:19.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:19.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:04:19.250 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:04:19.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:19.250 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:19.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:19.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:04:19.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:19.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:04:19.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:19.253 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:04:19.253 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:04:19.253 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:04:19.254 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:19.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:19.258 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:04:19.734 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:04:19.776 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:04:19.777 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:04:19.779 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:04:19.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:20.206 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:04:20.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:20.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:20.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:20.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:20.677 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:04:21.142 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:04:21.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:21.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:21.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:21.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:21.614 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:04:22.079 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:04:22.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:22.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:22.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:22.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:22.550 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:04:22.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:04:22.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:04:22.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:04:22.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:04:22.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:04:22.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:04:22.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:04:22.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:04:23.019 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:04:23.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:23.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:23.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:23.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:23.488 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:04:23.960 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:04:24.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:24.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:24.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:24.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:24.432 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:04:24.903 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:04:25.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:04:25.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:04:25.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:25.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:25.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:25.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:25.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:25.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:25.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:25.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:25.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:25.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:25.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:25.035 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:04:30.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:30.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:30.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:30.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:30.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:30.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:30.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:30.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:30.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:30.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:30.049 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:04:30.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:04:30.054 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:04:30.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:30.054 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:30.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:30.054 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:04:30.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:30.055 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:04:30.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:30.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:04:30.059 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:04:30.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:30.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:30.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:30.060 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:04:30.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:30.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:04:30.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:30.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:04:30.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:04:30.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:30.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:30.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:30.064 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:04:30.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:30.064 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:04:30.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:30.068 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:04:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:04:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:04:30.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:04:30.068 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:04:30.069 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:04:30.069 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:04:30.069 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:30.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:30.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:30.074 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:04:30.552 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:04:30.602 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:04:30.606 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:04:30.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:30.608 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:04:30.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:04:30.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:04:30.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:04:30.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:30.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:30.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:30.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:30.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:30.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:30.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:30.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:30.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:30.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:30.650 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:04:30.650 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:30.650 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:30.650 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:30.650 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:30.650 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:30.650 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:35.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:35.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:35.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:35.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:35.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:35.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:35.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:35.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:35.663 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:35.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:35.664 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:04:35.668 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:04:35.668 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:04:35.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:35.669 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:35.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:35.669 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:04:35.669 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:35.669 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:04:35.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:35.672 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:04:35.672 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:04:35.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:35.672 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:35.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:35.672 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:04:35.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:35.672 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:04:35.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:35.675 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:04:35.675 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:04:35.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:35.675 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:35.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:35.675 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:04:35.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:35.675 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:04:35.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:35.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:35.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:35.680 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:04:35.680 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:04:35.680 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:04:35.680 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:04:35.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:35.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:35.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:35.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:04:35.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:35.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:35.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:35.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:35.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:35.684 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:04:36.162 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:04:36.210 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:04:36.212 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:04:36.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:36.215 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:04:36.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:04:36.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:04:36.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:04:36.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:36.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:36.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:36.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:36.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:36.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:36.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:36.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:36.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:36.259 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:04:36.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:36.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:36.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:36.259 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:36.259 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:36.259 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:36.259 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:36.259 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:36.259 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:41.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:41.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:41.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:41.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:41.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:41.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:41.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:41.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:41.272 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:41.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:41.272 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:04:41.275 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:04:41.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:04:41.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:41.275 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:41.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:41.275 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:04:41.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:41.275 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:04:41.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:41.278 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:04:41.278 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:04:41.278 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:41.278 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:41.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:41.278 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:04:41.278 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:41.278 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:04:41.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:41.280 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:04:41.280 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:04:41.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:41.281 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:41.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:41.281 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:04:41.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:41.281 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:04:41.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:41.283 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:04:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:04:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:04:41.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:04:41.284 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:04:41.284 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:04:41.284 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:41.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:41.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:41.289 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:04:41.765 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:04:41.810 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:04:41.812 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:04:41.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:41.814 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:04:41.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:04:41.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:04:41.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:04:41.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:41.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:41.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:41.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:41.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:41.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:41.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:41.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:41.856 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:41.856 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:41.856 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:04:41.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:41.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:41.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:41.856 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:41.856 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:41.856 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:41.856 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:41.856 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:41.856 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:46.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:46.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:46.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:46.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:46.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:46.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:46.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:46.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:46.869 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:46.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:46.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:04:46.871 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:04:46.871 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:04:46.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:46.872 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:46.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:46.872 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:04:46.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:46.872 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:04:46.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:46.873 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:04:46.873 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:04:46.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:46.874 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:46.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:46.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:04:46.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:46.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:04:46.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:46.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:04:46.876 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:04:46.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:46.876 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:46.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:46.876 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:04:46.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:46.876 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:04:46.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:46.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:04:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:04:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:04:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:04:46.878 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:04:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:04:46.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:04:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:04:46.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:04:46.879 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:04:46.879 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:04:46.879 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:46.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:46.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:46.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:46.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:46.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:46.883 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:04:47.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:04:47.404 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:04:47.407 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:04:47.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:47.409 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:04:47.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:04:47.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:04:47.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:04:47.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:47.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:47.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:47.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:47.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:47.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:47.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:47.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:47.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:47.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:47.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:47.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:47.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:47.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:47.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:47.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:47.444 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:04:47.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:47.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:47.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:47.444 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:47.444 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:47.444 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:47.445 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:47.445 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:47.445 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:04:52.451 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:52.451 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:52.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:52.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:52.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:52.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:52.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:52.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:52.468 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:52.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:52.468 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:04:52.471 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:04:52.471 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:04:52.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:52.472 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:52.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:52.472 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:04:52.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:52.472 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:04:52.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:52.474 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:04:52.474 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:04:52.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:52.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:52.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:52.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:04:52.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:52.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:04:52.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:52.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:04:52.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:04:52.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:52.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:52.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:52.477 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:04:52.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:52.477 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:04:52.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:52.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:04:52.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:04:52.481 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:04:52.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:52.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:52.486 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:04:52.962 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:04:53.009 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:04:53.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:53.013 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:04:53.015 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:04:53.018 [DEBUG] fake_trx.py:382 (BTS@172.18.173.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 04:04:53.018 [INFO] fake_trx.py:385 (BTS@172.18.173.20:5700) Artificial TRXC delay set to 200
2026-04-19 04:04:53.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 04:04:53.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:53.435 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:04:53.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:53.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:53.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:53.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:53.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:53.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:53.904 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:04:54.375 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:04:54.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:54.650 [DEBUG] fake_trx.py:382 (BTS@172.18.173.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 04:04:54.650 [INFO] fake_trx.py:385 (BTS@172.18.173.20:5700) Artificial TRXC delay set to 0
2026-04-19 04:04:54.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 04:04:54.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:54.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:54.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:54.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:04:54.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:54.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:54.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:54.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:54.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:54.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:54.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:54.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:54.661 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:04:54.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:54.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:59.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:04:59.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:04:59.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:59.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:59.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:59.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:59.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:04:59.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:59.676 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:59.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:04:59.676 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:04:59.679 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:04:59.679 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:04:59.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:59.679 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:59.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:04:59.680 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:04:59.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:04:59.680 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:04:59.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:04:59.682 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:04:59.682 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:04:59.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:59.682 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:59.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:04:59.682 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:04:59.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:04:59.682 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:04:59.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:04:59.684 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:04:59.684 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:04:59.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:59.684 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:04:59.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:04:59.684 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:04:59.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:04:59.685 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:04:59.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:59.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:04:59.688 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:04:59.688 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:04:59.688 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:04:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:59.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:04:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:04:59.692 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:05:00.168 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:05:00.213 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:05:00.215 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:05:00.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:00.218 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:05:00.220 [DEBUG] fake_trx.py:382 (BTS@172.18.173.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 04:05:00.220 [INFO] fake_trx.py:385 (BTS@172.18.173.20:5700) Artificial TRXC delay set to 200
2026-04-19 04:05:00.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 04:05:00.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:00.633 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:05:00.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:00.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:00.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:00.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:00.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.102 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:05:01.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.575 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:05:01.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.853 [DEBUG] fake_trx.py:382 (BTS@172.18.173.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 04:05:01.854 [INFO] fake_trx.py:385 (BTS@172.18.173.20:5700) Artificial TRXC delay set to 0
2026-04-19 04:05:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 04:05:01.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:01.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:01.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:01.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:01.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:01.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:01.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:01.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:01.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:05:01.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:05:01.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:05:01.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:05:01.864 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:05:01.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:05:01.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:05:01.865 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=473 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:01.865 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=473 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:01.865 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=473 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:01.865 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=473 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:01.865 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=473 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:01.865 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=473 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:06.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:05:06.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:05:06.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:05:06.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:05:06.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:05:06.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:05:06.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:05:06.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:05:06.872 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:06.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:05:06.873 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:05:06.875 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:05:06.875 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:05:06.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:05:06.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:06.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:05:06.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:05:06.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:05:06.876 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:05:06.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:06.878 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:05:06.878 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:05:06.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:05:06.878 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:06.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:05:06.878 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:05:06.878 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:05:06.878 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:05:06.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:06.880 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:05:06.880 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:05:06.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:05:06.880 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:06.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:05:06.881 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:05:06.881 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:05:06.881 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:05:06.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:06.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:05:06.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:05:06.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:05:06.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:05:06.883 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:05:06.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:05:06.884 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:05:06.884 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:05:06.884 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:06.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:06.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:06.889 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:05:07.365 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:05:07.411 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:05:07.414 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:05:07.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:07.416 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:05:07.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:07.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:07.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:07.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:07.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:07.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:07.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:07.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:07.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:07.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:05:07.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:05:07.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:05:07.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:05:07.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:05:07.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:05:07.458 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:05:07.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:07.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:07.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:07.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:07.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:07.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:07.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:07.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:12.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:05:12.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:05:12.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:05:12.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:05:12.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:05:12.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:05:12.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:05:12.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:05:12.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:12.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:05:12.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:05:12.473 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:05:12.474 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:05:12.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:05:12.474 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:12.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:05:12.475 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:05:12.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:05:12.475 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:05:12.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:12.476 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:05:12.476 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:05:12.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:05:12.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:12.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:05:12.477 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:05:12.477 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:05:12.477 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:05:12.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:12.479 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:05:12.479 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:05:12.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:05:12.479 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:12.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:05:12.479 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:05:12.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:05:12.479 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:05:12.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:12.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:05:12.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:05:12.482 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:05:12.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:12.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:12.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:05:12.964 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:05:13.013 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:05:13.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:13.016 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:05:13.018 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:05:13.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:13.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:13.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:13.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:13.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:13.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:13.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:13.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:13.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:13.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:05:13.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:05:13.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:05:13.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:05:13.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:05:13.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:05:13.064 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:05:13.065 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:13.065 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:13.065 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:13.065 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:13.065 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:13.065 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:05:18.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:05:18.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:05:18.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:05:18.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:05:18.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:05:18.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:05:18.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:05:18.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:05:18.072 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:18.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:05:18.072 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:05:18.074 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:05:18.075 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:05:18.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:05:18.075 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:18.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:05:18.076 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:05:18.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:05:18.076 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:05:18.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:18.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:05:18.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:05:18.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:05:18.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:18.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:05:18.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:05:18.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:05:18.078 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:05:18.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:18.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:05:18.080 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:05:18.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:05:18.080 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:05:18.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:05:18.080 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:05:18.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:05:18.080 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:05:18.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:18.082 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:05:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:05:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:05:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:05:18.082 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:05:18.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:05:18.083 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:05:18.083 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:05:18.083 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:18.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:18.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:05:18.088 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:05:18.563 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:05:18.611 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:05:18.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:18.614 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:05:18.616 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:05:18.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:18.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:18.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:18.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:18.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:18.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:18.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:18.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:18.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:18.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:18.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:18.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:18.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:18.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:18.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:18.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:18.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:18.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:18.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:18.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:18.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:18.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:18.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:18.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:18.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:18.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:18.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:18.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:18.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:18.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:19.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:05:19.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:19.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:19.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:19.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:19.502 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:05:19.972 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:05:20.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:20.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:20.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:20.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:20.443 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:05:20.914 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:05:21.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:21.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:21.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:21.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:21.385 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:05:21.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:21.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:21.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:21.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:21.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:21.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:21.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:21.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:21.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:21.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:21.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:21.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:21.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:21.855 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:05:21.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:21.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:21.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:21.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:21.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:21.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:21.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:21.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:21.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:21.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:21.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:21.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:21.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:21.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:21.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:21.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:21.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:21.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:21.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:21.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:21.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:22.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:22.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:22.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:22.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:22.326 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:05:22.797 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:05:23.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:05:23.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:05:23.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:05:23.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:05:23.270 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:05:23.740 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:05:24.213 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:05:24.685 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:05:24.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:24.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:24.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:24.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:24.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:24.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:24.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:24.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:24.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:24.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:24.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:24.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:25.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:25.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:25.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:25.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:25.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:25.156 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:05:25.627 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:05:26.098 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:05:26.569 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:05:27.039 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:05:27.510 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:05:27.983 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:05:28.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:28.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:28.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:28.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:28.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:28.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:28.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:28.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:28.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:28.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:28.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:28.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:28.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:28.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:28.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:28.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:28.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:28.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:28.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:28.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:28.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:28.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:28.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:28.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:28.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:28.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:28.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:28.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:28.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:28.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:28.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:28.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:28.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:28.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:28.451 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:05:28.922 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:05:29.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:29.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:29.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:29.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:29.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:29.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:29.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:29.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:29.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:29.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:29.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:29.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:29.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:29.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:29.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:29.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:29.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:29.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:29.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:29.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:29.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:29.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:29.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:29.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:29.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:29.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:29.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:29.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:29.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:29.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:29.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:29.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:29.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:29.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:29.393 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:05:29.864 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:05:30.335 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:05:30.808 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:05:31.280 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:05:31.752 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:05:32.225 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:05:32.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:32.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:32.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:32.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:32.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:32.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:32.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:32.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:32.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:32.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:32.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:32.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:32.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:32.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:32.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:32.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:32.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:32.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:32.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:32.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:32.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:32.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:32.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:32.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:32.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:32.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:32.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:32.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:32.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:32.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:32.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:32.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:32.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:32.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:32.693 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:05:33.164 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:05:33.635 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:05:34.106 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:05:34.576 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:05:35.047 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:05:35.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:35.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:35.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:35.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:35.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:35.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:35.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:35.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:35.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:35.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:35.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:35.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:35.517 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:05:35.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:35.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:35.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:35.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:35.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:35.989 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:05:36.460 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:05:36.930 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:05:37.401 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:05:37.872 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:05:38.345 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:05:38.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:38.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:38.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:38.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:38.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:38.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:38.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:38.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:38.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:38.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:38.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:38.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:38.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:38.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:38.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:38.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:38.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:38.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:38.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:38.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:38.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:38.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:38.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:38.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:38.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:38.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:38.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:38.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:38.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:38.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:38.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:38.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:38.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:38.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:38.813 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:05:39.284 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:05:39.755 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:05:39.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:39.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:39.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:39.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:39.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:39.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:39.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:39.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:39.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:39.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:39.956 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:39.956 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:39.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:39.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:39.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:39.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:39.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:40.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:40.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:40.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:40.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:40.225 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:05:40.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:40.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:40.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:40.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:40.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:40.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:40.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:40.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:40.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:40.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:40.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:40.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:40.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:40.696 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:05:41.167 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:05:41.640 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:05:42.113 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:05:42.585 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:05:43.056 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:05:43.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:43.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:43.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:43.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:43.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:43.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:43.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:43.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:43.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:43.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:43.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:43.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:43.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:43.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:43.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:43.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:43.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:43.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:43.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:43.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:43.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:43.526 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:05:43.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:43.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:43.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:43.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:43.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:43.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:43.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:43.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:43.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:43.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:43.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:43.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:43.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:43.994 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:05:44.464 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:05:44.934 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:05:45.405 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:05:45.876 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:05:46.345 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:05:46.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:46.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:46.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:46.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:46.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:46.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:46.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:46.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:46.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:46.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:46.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:46.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:46.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:46.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:46.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:46.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:46.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:46.816 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:05:47.284 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:05:47.754 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:05:48.223 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:05:48.691 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:05:49.162 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:05:49.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:49.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:49.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:49.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:49.635 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:05:49.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:49.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:49.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:49.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:49.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:49.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:49.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:49.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:49.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:49.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:49.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:49.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:49.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:49.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:49.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:49.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:49.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:49.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:49.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:49.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:49.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:49.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:49.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:49.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:49.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:49.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:49.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:49.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:49.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:49.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:50.104 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:05:50.570 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:05:50.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:50.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:50.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:50.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:50.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:50.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:50.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:50.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:50.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:50.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:50.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:50.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:50.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:50.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:50.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:50.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:50.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:50.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:50.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:50.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:50.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:50.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:50.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:50.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:50.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:50.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:50.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:50.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:50.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:50.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:50.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:50.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:50.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:50.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:51.038 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:05:51.506 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:05:51.978 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:05:52.448 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:05:52.920 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:05:53.389 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:05:53.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:53.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:53.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:53.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:53.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:53.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:53.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:53.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:53.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:53.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:53.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:53.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:53.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:53.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:53.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:53.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:53.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:53.859 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 04:05:54.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:54.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:54.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:54.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:54.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:54.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:54.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:54.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:54.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:54.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:54.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:54.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:54.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:54.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:54.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:54.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:54.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:54.330 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 04:05:54.803 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 04:05:55.276 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 04:05:55.748 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 04:05:56.220 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 04:05:56.693 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 04:05:57.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:57.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:57.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:57.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:57.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:05:57.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:05:57.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:05:57.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:57.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:57.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:57.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:05:57.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:05:57.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:05:57.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:05:57.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:05:57.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:57.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:05:57.164 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 04:05:57.633 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 04:05:58.105 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 04:05:58.578 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 04:05:59.049 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 04:05:59.521 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 04:05:59.992 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 04:06:00.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:00.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:00.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:00.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:00.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:00.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:00.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:00.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:00.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:00.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:00.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:00.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:00.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:00.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:00.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:00.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:00.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:00.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:00.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:00.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:00.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:00.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:00.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:00.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:00.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:00.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:00.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:00.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:00.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:00.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:00.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:00.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:00.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:00.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:00.462 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 04:06:00.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:00.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:00.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:00.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:00.933 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 04:06:00.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:00.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:00.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:00.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:00.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:00.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:00.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:00.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:00.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:00.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:00.942 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:06:00.942 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9286 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:00.943 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:00.943 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:00.943 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:00.943 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:00.943 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:00.943 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:05.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:05.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:05.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:05.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:05.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:05.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:05.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:05.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:05.954 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:05.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:05.955 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:06:05.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:06:05.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:06:05.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:05.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:05.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:05.959 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:06:05.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:05.959 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:06:05.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:05.963 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:06:05.963 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:06:05.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:05.963 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:05.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:05.963 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:06:05.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:05.963 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:06:05.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:05.966 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:06:05.966 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:06:05.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:05.966 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:05.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:05.967 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:06:05.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:05.967 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:06:05.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:05.970 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:06:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:06:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:06:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:06:05.970 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:06:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:06:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:06:05.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:06:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:05.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:06:05.971 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:06:05.971 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:06:05.971 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:05.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:05.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:05.976 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:06:06.454 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:06:06.497 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:06:06.499 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:06:06.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:06.502 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:06:06.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:06.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:06.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:06.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:06.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:06.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:06.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:06.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:06.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:06.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:06.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:06.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:06.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:06.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:06.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:06.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:06.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:06.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:06.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:06.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:06.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:06.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:06.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:06.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:06.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:06.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:06.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:06.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:06.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:06.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:06.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:06.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:06.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:06.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:06.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:06.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:06.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:06.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:06.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:06.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:06.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:06.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:06.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:06.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:06.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:06.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:06.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:06.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:06.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:06.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:06.921 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:06:06.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:06.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:06.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:06.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:07.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:07.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:07.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:07.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:07.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:07.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:07.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:07.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:07.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:07.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:07.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:07.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:07.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:07.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:07.021 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:06:12.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:12.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:12.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:12.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:12.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:12.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:12.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:12.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:12.033 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:12.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:12.033 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:06:12.036 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:06:12.036 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:06:12.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:12.037 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:12.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:12.037 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:06:12.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:12.038 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:06:12.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:12.039 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:06:12.039 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:06:12.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:12.039 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:12.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:12.040 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:06:12.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:12.040 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:06:12.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:12.041 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:06:12.042 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:06:12.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:12.042 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:12.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:12.042 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:06:12.042 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:12.042 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:06:12.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:12.044 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:06:12.045 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:06:12.045 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:06:12.045 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:06:12.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:12.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:12.050 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:06:12.527 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:06:12.566 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:06:12.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:12.570 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:06:12.573 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:06:12.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:12.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:12.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:12.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:12.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:12.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:12.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:12.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:12.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:12.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:12.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:12.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:12.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:12.996 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:06:13.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:13.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:13.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:13.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:13.467 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:06:13.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:13.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:13.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:13.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:13.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:13.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:13.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:13.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:13.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:13.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:13.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:13.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:13.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:13.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:13.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:13.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:13.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:13.937 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:06:14.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:14.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:14.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:14.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:14.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:14.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:14.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:14.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:14.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:14.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:14.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:14.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:14.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:14.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:14.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:14.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:14.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:14.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:14.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:14.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:14.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:14.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:14.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:14.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:14.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:14.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:14.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:14.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:14.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:14.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:14.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:14.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:14.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:14.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:14.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:14.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:14.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:14.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:14.406 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:06:14.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:14.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:14.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:14.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:14.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:14.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:14.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:14.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:14.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:14.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:14.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:14.814 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:06:14.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:14.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:14.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:14.814 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:14.814 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:14.814 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:14.814 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:14.814 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:14.814 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:19.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:19.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:19.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:19.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:19.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:19.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:19.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:19.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:19.832 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:19.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:19.832 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:06:19.834 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:06:19.834 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:06:19.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:19.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:19.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:19.835 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:06:19.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:19.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:06:19.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:19.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:06:19.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:06:19.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:19.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:19.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:19.837 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:06:19.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:19.837 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:06:19.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:19.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:06:19.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:06:19.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:19.838 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:19.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:19.838 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:06:19.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:19.838 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:06:19.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:06:19.840 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:06:19.841 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:06:19.841 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:06:19.841 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:19.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:19.845 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:06:20.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:06:20.369 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:06:20.371 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:06:20.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:20.373 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:06:20.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:20.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:20.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:20.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:20.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:20.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:20.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:20.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:20.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:20.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:20.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:20.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:20.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:20.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:20.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:20.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:20.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:20.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:20.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:20.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:20.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:20.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:20.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:20.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:20.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:20.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:20.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:20.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:20.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:20.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:20.792 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:06:20.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:20.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:20.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:20.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:20.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:20.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:20.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:20.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:20.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:20.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:20.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:20.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:20.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:20.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:20.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:20.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:20.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:20.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:20.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:20.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:20.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:21.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:21.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:21.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:21.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:21.264 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:06:21.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:21.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:21.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:21.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:21.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:21.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:21.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:21.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:21.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:21.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:21.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:21.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:21.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:21.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:21.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:21.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:21.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:21.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:21.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:21.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:21.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:21.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:21.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:21.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:21.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:21.666 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:06:21.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:21.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:21.667 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:21.667 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:21.668 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:21.668 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:21.668 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:21.668 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:26.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:26.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:26.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:26.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:26.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:26.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:26.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:26.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:26.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:26.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:26.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:06:26.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:06:26.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:06:26.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:26.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:26.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:26.681 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:06:26.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:26.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:06:26.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:26.683 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:06:26.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:06:26.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:26.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:26.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:26.683 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:06:26.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:26.683 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:06:26.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:26.685 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:06:26.685 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:06:26.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:26.685 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:26.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:26.685 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:06:26.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:26.686 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:06:26.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:06:26.688 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:06:26.688 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:06:26.688 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:26.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:26.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:26.693 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:06:27.171 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:06:27.216 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:06:27.218 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:06:27.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:27.221 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:06:27.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:27.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:27.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:27.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:27.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:27.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:27.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:27.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:27.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:27.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:27.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:27.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:27.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:27.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:27.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:27.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:27.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:27.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:27.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:27.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:27.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:27.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:27.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:27.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:27.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:27.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:27.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:27.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:27.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:27.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:27.642 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:06:27.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:27.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:27.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:27.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:27.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:27.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:27.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:27.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:27.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:27.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:27.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:27.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:27.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:27.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:27.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:27.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:27.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:27.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:27.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:27.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:27.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:28.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:28.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:28.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:28.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:28.114 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:06:28.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:28.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:28.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:28.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:28.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:28.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:28.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:28.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:28.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:28.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:28.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:28.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:28.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:28.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:28.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:28.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:28.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:28.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:28.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:28.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:28.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:28.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:28.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:28.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:28.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:28.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:28.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:28.520 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:06:28.521 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:28.521 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:28.521 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:28.521 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:28.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:28.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:33.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:33.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:33.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:33.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:33.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:33.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:33.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:33.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:33.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:33.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:33.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:06:33.535 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:06:33.535 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:06:33.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:33.536 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:33.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:33.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:06:33.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:33.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:06:33.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:33.540 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:06:33.541 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:06:33.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:33.541 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:33.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:33.541 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:06:33.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:33.542 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:06:33.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:33.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:06:33.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:06:33.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:33.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:33.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:33.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:06:33.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:33.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:06:33.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:33.549 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:06:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:06:33.549 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:06:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:06:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:06:33.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:06:33.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:06:33.550 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:06:33.550 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:06:33.550 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:33.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:33.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:33.555 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:06:34.032 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:06:34.090 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:06:34.092 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:06:34.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:34.094 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:06:34.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:34.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:34.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:34.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:34.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:34.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:34.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:34.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:34.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:34.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:34.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:34.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:34.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:34.523 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:06:34.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:34.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:34.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:34.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:34.995 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:06:35.466 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:06:35.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:35.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:35.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:35.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:35.937 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:06:35.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:35.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:35.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:35.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:36.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:36.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:36.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:36.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:36.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:36.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:36.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:36.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:36.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:36.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:36.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:36.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:36.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:36.408 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:06:36.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:36.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:36.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:36.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:36.879 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:06:37.349 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:06:37.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:37.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:37.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:37.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:37.820 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:06:38.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:38.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:38.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:38.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:38.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:38.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:38.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:38.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:38.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:38.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:38.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:38.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:38.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:38.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:38.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:38.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:38.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:38.291 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:06:38.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:38.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:38.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:38.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:38.761 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:06:39.232 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:06:39.705 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:06:39.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:39.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:39.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:39.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:39.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:39.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:39.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:39.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:39.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:39.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:39.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:39.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:39.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:39.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:39.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:39.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:39.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:40.177 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:06:40.649 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:06:41.120 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:06:41.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:41.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:41.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:41.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:41.591 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:06:41.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:41.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:41.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:41.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:41.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:41.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:41.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:41.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:41.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:41.593 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:06:41.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:46.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:46.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:46.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:46.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:46.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:46.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:46.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:46.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:46.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:46.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:46.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:06:46.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:06:46.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:06:46.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:46.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:46.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:46.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:06:46.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:46.625 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:06:46.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:46.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:06:46.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:06:46.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:46.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:46.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:46.629 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:06:46.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:46.629 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:06:46.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:46.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:06:46.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:06:46.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:46.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:46.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:46.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:06:46.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:46.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:06:46.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:46.638 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:06:46.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:06:46.638 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:06:46.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:06:46.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:06:46.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:06:46.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:06:46.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:06:46.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:06:46.640 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:06:46.640 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:06:46.640 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:46.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:46.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:46.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:46.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:46.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:46.644 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:06:47.123 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:06:47.172 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:06:47.174 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:06:47.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:47.177 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:06:47.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:47.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:47.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:47.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:47.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:47.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:47.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:47.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:47.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:47.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:47.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:47.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:47.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:47.596 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:06:47.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:47.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:47.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:47.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:48.067 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:06:48.537 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:06:48.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:48.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:48.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:48.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:49.008 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:06:49.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:49.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:49.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:49.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:49.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:49.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:49.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:49.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:49.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:49.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:49.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:49.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:49.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:49.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:49.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:49.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:49.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:49.479 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:06:49.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:49.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:49.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:49.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:49.950 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:06:50.421 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:06:50.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:50.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:50.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:50.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:50.892 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:06:51.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:51.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:51.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:51.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:51.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:51.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:51.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:51.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:51.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:51.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:51.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:51.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:51.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:51.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:51.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:51.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:51.364 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:06:51.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:51.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:51.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:51.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:51.837 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:06:52.309 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:06:52.780 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:06:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:52.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:52.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:52.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:52.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:52.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:52.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:06:52.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:52.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:52.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:52.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:06:52.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:06:52.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:52.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:06:52.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:06:52.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:52.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:53.250 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:06:53.721 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:06:54.192 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:06:54.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:06:54.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:06:54.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:06:54.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:06:54.662 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:06:54.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:54.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:54.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:54.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:54.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:54.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:54.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:54.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:54.674 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:06:54.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:54.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:54.675 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:54.675 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:54.675 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:54.675 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:54.676 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:54.676 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:06:59.677 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:06:59.677 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:06:59.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:59.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:59.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:59.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:59.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:06:59.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:59.685 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:59.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:06:59.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:06:59.687 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:06:59.687 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:06:59.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:59.688 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:59.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:06:59.688 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:06:59.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:06:59.688 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:06:59.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:06:59.691 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:06:59.691 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:06:59.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:59.691 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:59.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:06:59.691 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:06:59.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:06:59.691 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:06:59.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:06:59.694 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:06:59.694 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:06:59.694 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:59.694 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:06:59.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:06:59.695 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:06:59.695 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:06:59.695 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:06:59.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:06:59.700 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:06:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:06:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:06:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:06:59.700 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:06:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:06:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:06:59.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:06:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:06:59.701 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:06:59.701 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:06:59.701 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:59.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:59.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:06:59.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:06:59.706 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:07:00.182 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:07:00.234 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:07:00.235 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:07:00.237 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:07:00.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:00.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:00.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:00.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:00.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:00.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:00.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:00.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:00.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:00.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:00.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:00.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:00.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:00.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:00.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:00.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:00.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:00.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:00.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:00.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:00.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:00.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:00.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:00.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:00.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:00.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:00.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:00.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:00.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:00.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:00.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:00.652 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:07:00.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:00.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:00.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:00.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:01.124 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:07:01.597 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:07:01.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:01.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:01.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:01.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:02.064 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:07:02.535 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:07:02.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:02.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:02.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:02.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:02.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:02.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:02.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:02.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:02.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:02.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:02.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:02.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:02.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:02.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:02.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:02.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:02.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:02.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:02.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:02.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:02.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:02.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:02.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:02.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:02.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:02.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:02.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:02.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:02.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:02.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:02.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:02.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:02.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:02.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:02.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:02.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:02.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:02.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:03.007 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:07:03.480 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:07:03.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:03.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:03.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:03.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:03.953 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:07:04.420 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:07:04.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:04.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:04.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:04.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:04.888 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:07:04.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:04.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:04.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:04.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:04.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:04.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:04.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:04.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:04.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:04.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:04.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:04.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:05.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:05.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:05.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:05.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:05.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:05.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:05.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:05.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:05.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:05.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:05.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:05.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:05.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:05.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:05.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:05.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:05.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:05.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:05.358 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:07:05.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:05.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:05.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:05.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:05.831 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:07:06.303 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:07:06.774 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:07:07.245 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:07:07.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:07.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:07.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:07.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:07.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:07.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:07.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:07.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:07.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:07.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:07.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:07.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:07.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:07.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:07.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:07.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:07.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:07.715 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:07:07.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:07.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:07.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:07.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:07.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:07.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:07.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:07.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:07.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:07.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:07.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:07.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:07.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:08.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:08.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:08.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:08.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:08.186 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:07:08.657 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:07:09.128 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:07:09.598 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:07:10.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:10.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:10.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:10.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:10.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:10.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:10.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:10.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:10.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:10.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:10.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:10.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:10.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:10.068 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:07:10.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:10.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:10.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:10.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:10.540 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:07:10.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:10.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:10.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:10.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:10.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:10.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:10.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:10.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:10.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:10.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:10.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:10.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:10.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:10.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:10.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:10.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:10.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:11.010 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:07:11.481 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:07:11.954 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:07:12.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:12.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:12.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:12.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:12.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:12.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:12.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:12.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:12.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:12.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:12.402 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:12.402 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:12.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:12.422 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:07:12.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:12.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:12.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:12.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:12.894 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:07:13.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:13.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:13.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:13.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:13.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:13.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:13.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:13.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:13.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:13.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:13.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:13.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:13.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:13.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:13.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:13.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:13.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:13.364 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:07:13.838 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:07:14.310 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:07:14.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:14.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:14.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:14.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:14.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:14.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:14.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:14.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:14.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:14.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:14.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:14.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:14.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:14.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:14.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:14.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:14.782 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:07:15.253 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:07:15.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:15.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:15.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:15.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:15.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:15.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:15.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:15.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:15.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:15.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:15.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:15.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:15.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:15.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:15.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:15.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:15.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:15.724 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:07:16.197 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:07:16.669 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:07:17.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:17.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:17.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:17.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:17.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:17.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:17.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:17.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:17.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:17.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:17.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:17.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:17.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:17.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:17.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:17.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:17.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:17.141 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:07:17.612 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:07:17.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:17.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:17.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:17.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:17.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:17.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:17.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:17.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:17.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:17.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:17.712 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:17.712 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:17.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:17.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:17.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:17.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:17.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:18.084 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:07:18.557 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:07:19.029 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:07:19.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:19.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:19.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:19.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:19.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:19.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:19.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:19.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:19.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:19.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:19.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:19.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:19.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:07:19.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:07:19.439 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:07:19.440 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4272 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.440 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4272 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.440 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4272 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.440 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4272 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.440 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4273 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.440 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4273 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.441 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4273 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.441 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4273 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.441 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4273 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.441 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4273 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.441 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4273 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:19.441 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4273 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:24.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:07:24.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:07:24.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:24.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:24.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:24.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:24.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:24.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:07:24.450 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:24.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:07:24.451 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:07:24.455 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:07:24.456 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:07:24.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:07:24.456 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:24.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:24.456 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:07:24.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:07:24.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:07:24.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:24.460 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:07:24.460 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:07:24.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:07:24.460 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:24.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:24.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:07:24.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:07:24.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:07:24.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:24.463 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:07:24.464 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:07:24.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:07:24.464 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:24.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:24.464 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:07:24.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:07:24.464 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:07:24.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:24.468 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:07:24.468 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:07:24.468 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:07:24.469 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:24.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:24.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:24.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:24.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:24.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:24.473 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:07:24.949 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:07:24.999 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:07:25.001 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:07:25.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.003 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:07:25.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:25.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:25.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:25.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:25.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:25.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:25.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:25.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:25.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:25.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:25.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:25.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:25.416 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:07:25.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:25.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:25.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:25.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:25.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:25.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:25.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:25.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:25.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:25.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:25.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:25.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:25.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:25.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:25.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:25.887 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:07:26.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:26.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:26.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:26.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:26.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:26.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:26.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:26.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:26.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:26.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:26.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:26.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:26.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:26.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:26.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:26.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:26.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:26.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:26.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:26.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:26.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:26.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:26.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:26.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:26.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:26.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:26.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:26.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:26.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:26.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:26.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:26.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:26.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:26.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:26.357 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:07:26.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:26.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:26.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:26.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:26.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:26.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:26.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:26.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:26.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:26.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:26.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:26.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:26.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:07:26.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:07:26.457 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:07:26.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:26.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:26.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:26.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:26.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:26.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:31.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:07:31.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:07:31.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:31.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:31.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:31.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:31.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:31.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:07:31.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:31.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:07:31.475 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:07:31.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:07:31.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:07:31.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:07:31.477 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:31.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:31.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:07:31.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:07:31.478 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:07:31.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:31.480 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:07:31.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:07:31.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:07:31.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:31.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:31.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:07:31.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:07:31.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:07:31.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:31.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:07:31.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:07:31.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:07:31.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:31.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:31.483 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:07:31.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:07:31.483 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:07:31.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:31.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:07:31.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:07:31.488 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:07:31.488 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:31.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:31.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:31.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:07:31.970 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:07:32.022 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:07:32.022 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:07:32.023 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:07:32.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:32.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:32.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:32.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:32.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:32.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:32.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:32.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:32.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:32.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:32.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:32.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:32.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:32.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:32.438 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:07:32.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:32.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:32.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:32.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:32.909 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:07:32.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:32.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:32.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:32.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:32.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:32.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:32.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:32.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:32.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:32.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:32.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:32.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:32.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:32.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:32.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:32.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:32.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:33.380 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:07:33.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:33.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:33.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:33.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:33.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:33.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:33.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:33.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:33.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:33.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:33.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:33.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:33.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:33.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:33.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:33.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:33.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:33.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:33.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:33.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:33.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:33.851 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:07:34.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:34.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:34.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:34.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:34.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:34.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:34.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:34.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:34.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:34.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:34.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:34.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:34.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:34.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.321 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:07:34.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:34.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:34.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:34.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:34.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:34.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:34.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:34.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:34.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:34.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:34.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:34.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:34.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:34.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:34.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:34.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:34.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:34.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:34.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:34.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:34.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:34.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:34.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:34.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:34.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:34.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:34.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:34.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:34.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:34.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:34.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:34.791 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:07:35.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:35.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:35.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:35.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:35.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:35.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:35.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:35.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:35.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:35.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:35.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:35.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:35.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:35.262 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:07:35.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:35.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:35.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:35.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:35.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:35.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:35.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:35.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:35.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:35.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:35.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:35.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:35.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:35.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:35.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:35.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:35.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:35.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:35.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:35.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:35.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:35.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:35.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:35.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:35.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:35.733 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:07:36.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:36.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:36.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:36.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:36.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:36.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:36.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:36.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:36.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:36.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:36.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:07:36.138 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:07:36.138 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:07:36.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:36.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:36.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:36.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:36.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:36.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:36.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:36.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:36.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:36.138 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:41.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:07:41.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:07:41.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:41.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:41.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:41.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:41.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:41.152 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:07:41.152 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:41.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:07:41.153 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:07:41.156 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:07:41.156 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:07:41.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:07:41.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:41.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:41.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:07:41.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:07:41.158 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:07:41.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:41.160 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:07:41.161 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:07:41.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:07:41.161 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:41.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:41.161 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:07:41.161 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:07:41.161 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:07:41.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:41.164 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:07:41.164 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:07:41.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:07:41.164 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:41.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:41.164 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:07:41.164 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:07:41.164 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:07:41.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:41.167 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:07:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:07:41.168 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:07:41.168 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:07:41.168 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:41.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:41.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:41.173 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:07:41.649 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:07:41.698 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:07:41.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:41.701 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:07:41.704 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:07:41.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:41.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:41.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:41.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:41.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:41.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:41.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:41.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:41.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:41.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:41.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:41.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:41.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:41.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:41.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:41.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:41.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:41.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:41.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:41.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:41.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:41.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:41.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:41.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:41.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:41.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:41.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:41.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:41.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:41.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:41.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:41.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:41.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:41.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:41.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:41.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:41.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:41.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:41.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:41.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:41.908 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:41.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:41.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:41.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:41.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:41.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:42.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:42.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:42.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:42.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:42.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:42.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:42.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.117 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:07:42.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:42.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:42.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:42.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:42.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:42.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:42.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:42.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:42.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:42.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:42.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:42.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:42.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:42.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:42.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:42.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:42.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:42.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:42.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.588 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:07:42.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:42.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:42.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:42.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:42.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:42.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:42.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:42.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:42.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:42.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:42.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:42.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:42.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:42.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:42.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:42.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:42.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:42.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:42.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:42.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:42.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:42.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:42.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:42.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:42.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:07:42.995 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:07:42.995 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:07:42.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:42.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:42.995 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:42.995 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:42.995 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:42.996 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:42.996 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:42.996 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:07:47.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:07:47.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:07:47.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:47.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:47.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:47.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:48.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:48.006 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:07:48.007 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:48.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:07:48.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:07:48.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:07:48.010 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:07:48.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:07:48.010 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:48.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:48.011 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:07:48.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:07:48.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:07:48.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:48.012 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:07:48.012 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:07:48.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:07:48.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:48.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:48.013 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:07:48.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:07:48.013 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:07:48.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:48.014 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:07:48.014 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:07:48.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:07:48.015 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:07:48.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:07:48.015 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:07:48.015 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:07:48.015 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:07:48.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:48.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:07:48.018 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:07:48.018 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:07:48.018 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:48.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:07:48.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:48.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:07:48.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:07:48.022 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:07:48.499 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:07:48.546 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:07:48.548 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:07:48.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:48.549 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:07:48.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:48.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:48.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:48.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:48.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:48.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:48.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:48.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:48.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:48.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:48.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:48.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:48.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:48.972 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:07:49.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:49.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:49.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:49.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:49.443 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:07:49.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:49.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:49.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:49.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:49.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:49.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:49.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:49.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:49.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:49.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:49.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:49.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:49.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:49.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:49.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:49.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:49.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:49.914 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:07:50.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:50.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:50.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:50.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:50.384 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:07:50.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:50.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:50.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:50.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:50.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:50.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:50.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:50.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:50.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:50.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:50.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:50.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:50.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:50.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:50.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:50.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:50.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:50.855 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:07:51.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:51.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:51.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:51.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:51.328 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:07:51.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:51.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:51.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:51.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:51.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:51.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:51.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:51.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:51.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:51.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:51.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:51.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:51.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:51.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:51.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:51.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:51.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:51.800 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:07:52.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:52.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:52.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:52.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:52.272 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:07:52.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:52.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:52.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:52.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:52.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:52.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:52.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:52.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:52.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:52.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:52.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:52.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:52.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:52.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:52.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:52.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:52.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:52.743 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:07:53.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:53.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:53.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:53.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:53.214 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:07:53.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:53.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:53.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:53.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:53.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:53.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:53.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:53.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:53.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:53.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:53.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:53.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:53.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:53.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:53.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:53.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:53.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:53.684 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:07:54.155 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:07:54.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:54.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:54.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:54.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:54.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:54.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:54.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:54.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:54.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:54.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:54.228 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:54.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:54.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:54.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:54.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:54.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:54.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:54.628 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:07:55.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:55.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:55.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:55.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:55.101 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:07:55.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:55.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:55.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:07:55.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:55.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:55.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:55.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:07:55.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:07:55.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:55.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:07:55.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:07:55.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:55.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:55.572 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:07:56.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:07:56.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:07:56.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:07:56.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:07:56.044 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:07:56.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:07:56.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:07:56.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:07:56.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:07:56.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:07:56.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:07:56.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:07:56.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:07:56.049 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:07:56.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:07:56.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:01.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:01.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:01.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:01.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:01.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:01.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:01.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:01.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:01.062 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:01.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:01.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:08:01.064 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:08:01.064 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:08:01.064 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:01.064 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:01.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:01.064 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:08:01.065 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:01.065 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:08:01.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:01.067 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:08:01.067 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:08:01.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:01.067 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:01.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:01.068 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:08:01.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:01.068 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:08:01.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:01.070 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:08:01.070 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:08:01.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:01.070 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:01.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:01.071 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:08:01.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:01.071 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:08:01.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:01.075 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:01.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:01.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:01.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:08:01.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:08:01.077 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:08:01.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:08:01.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:01.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:01.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:01.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:08:01.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:01.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:01.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:01.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:01.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:01.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:08:01.559 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:08:01.606 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:08:01.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:01.609 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:08:01.611 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:08:01.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:01.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:01.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:01.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:01.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:01.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:01.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:01.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:01.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:01.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:01.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:01.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:01.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:01.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:01.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:01.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:01.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:01.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:01.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:01.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:01.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:01.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:01.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:01.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:01.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:01.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:01.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:01.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:01.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:01.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:01.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:01.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:01.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:01.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:01.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:01.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:01.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:01.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:01.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:01.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:01.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:01.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:01.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:01.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:01.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:01.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:02.026 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:08:02.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:02.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:02.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:02.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:02.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:02.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:02.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:02.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:02.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:02.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:02.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:02.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:02.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:02.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:02.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:02.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:02.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:02.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:02.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:02.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:02.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:02.493 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:08:02.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:02.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:02.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:02.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:02.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:02.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:02.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:02.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:02.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:02.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:02.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:02.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:02.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:02.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:02.667 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:08:02.667 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:02.667 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:02.667 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:02.668 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:02.668 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:02.668 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:07.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:07.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:07.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:07.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:07.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:07.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:07.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:07.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:07.675 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:07.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:07.675 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:08:07.678 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:08:07.678 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:08:07.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:07.679 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:07.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:07.679 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:08:07.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:07.679 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:08:07.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:07.681 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:08:07.681 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:08:07.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:07.682 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:07.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:07.682 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:08:07.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:07.682 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:08:07.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:07.684 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:08:07.684 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:08:07.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:07.684 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:07.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:07.684 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:08:07.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:07.684 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:08:07.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:07.687 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:08:07.687 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:08:07.687 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:08:07.688 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:07.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:07.692 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:08:08.170 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:08:08.225 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:08:08.227 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:08:08.229 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:08:08.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:08.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:08.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:08.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:08.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:08.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:08.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:08.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:08.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:08.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:08.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:08.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:08.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:08.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:08.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:08.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:08.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:08.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:08.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:08.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:08.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:08.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:08.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:08.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:08.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.640 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:08:08.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:08.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:08.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:08.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:08.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:08.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:08.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:08.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:08.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:08.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:08.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:08.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:08.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:08.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:08.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:08.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:08.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:08.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:08.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:08.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:08.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:08.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:08.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:08.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:08.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:08.877 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:08.877 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:08.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:08.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:08.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:08.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:08.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:09.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:08:09.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:09.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:09.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:09.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:09.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:09.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:09.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:09.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:09.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:09.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:09.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:09.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:09.281 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:08:09.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:09.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:14.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:14.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:14.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:14.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:14.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:14.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:14.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:14.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:14.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:14.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:14.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:08:14.318 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:08:14.318 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:08:14.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:14.319 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:14.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:14.319 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:08:14.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:14.320 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:08:14.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:14.321 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:08:14.321 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:08:14.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:14.321 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:14.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:14.321 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:08:14.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:14.321 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:08:14.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:14.323 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:08:14.323 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:08:14.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:14.323 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:14.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:14.323 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:08:14.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:14.323 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:08:14.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:14.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:08:14.326 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:08:14.326 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:08:14.326 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:14.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:14.330 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:08:14.806 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:08:14.856 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:08:14.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:14.860 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:08:14.862 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:08:14.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:14.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:14.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:14.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:14.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:14.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:14.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:14.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:14.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:14.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:14.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:14.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:14.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:15.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:15.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:15.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:15.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:15.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:15.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:15.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:15.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:15.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:15.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:15.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:15.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:15.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:15.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:15.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:15.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:15.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:15.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:15.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:15.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:15.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:15.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:15.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:15.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:15.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:15.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.278 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:08:15.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:15.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:15.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:15.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:15.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:15.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:15.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:15.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:15.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:15.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:15.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:15.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:15.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:15.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:15.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:15.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:15.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:15.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.749 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:08:15.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:15.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:15.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:15.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:15.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:15.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:15.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:15.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:15.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:15.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:15.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:15.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:15.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:15.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:15.918 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:08:20.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:20.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:20.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:20.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:20.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:20.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:20.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:20.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:20.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:20.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:20.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:08:20.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:08:20.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:08:20.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:20.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:20.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:20.940 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:08:20.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:20.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:08:20.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:20.941 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:08:20.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:08:20.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:20.942 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:20.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:20.942 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:08:20.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:20.942 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:08:20.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:20.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:08:20.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:08:20.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:20.945 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:20.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:20.945 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:08:20.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:20.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:08:20.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:20.948 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:08:20.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:08:20.949 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:08:20.949 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:08:20.949 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:08:20.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:20.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:20.954 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:08:21.431 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:08:21.476 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:08:21.478 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:08:21.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:21.480 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:08:21.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:21.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:21.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:21.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:21.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:21.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:21.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:21.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:21.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:21.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:21.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:21.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:21.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:21.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:21.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:21.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:21.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:21.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:21.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:21.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:21.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:21.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:21.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:21.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:21.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:21.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:21.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:21.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:21.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:21.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:21.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:21.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:21.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:21.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:21.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:21.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:21.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:21.902 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:08:21.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:21.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:21.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:21.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:22.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:22.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:22.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:22.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:22.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:22.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:22.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:22.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:22.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:22.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:22.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:22.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:22.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:22.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:22.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:22.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:22.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:22.371 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:08:22.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:22.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:22.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:22.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:22.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:22.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:22.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:22.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:22.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:22.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:22.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:22.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:22.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:22.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:22.540 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:08:22.540 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:22.540 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:22.540 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:22.540 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:22.540 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:22.540 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:27.547 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:27.547 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:27.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:27.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:27.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:27.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:27.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:27.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:27.555 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:27.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:27.556 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:08:27.557 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:08:27.558 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:08:27.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:27.558 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:27.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:27.558 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:08:27.558 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:27.558 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:08:27.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:27.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:08:27.560 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:08:27.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:27.560 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:27.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:27.560 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:08:27.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:27.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:08:27.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:27.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:08:27.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:08:27.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:27.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:27.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:27.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:08:27.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:27.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:08:27.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:27.563 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:08:27.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:08:27.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:08:27.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:08:27.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:08:27.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:08:27.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:08:27.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:08:27.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:27.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:27.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:27.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:27.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:08:28.046 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:08:28.083 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:08:28.085 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:08:28.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:28.087 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:08:28.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:28.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:28.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:28.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:28.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:28.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:28.118 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:28.118 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:28.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:28.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:28.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:28.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:28.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:28.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:28.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:28.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:28.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:28.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:28.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:28.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:28.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:28.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:28.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:28.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:28.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:28.514 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:08:28.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:28.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:28.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:28.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:28.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:28.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:28.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:28.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:28.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:28.979 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:08:28.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:28.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:28.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:28.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:29.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:29.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:29.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:29.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:29.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:29.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:29.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:29.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:29.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:29.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:29.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:29.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:29.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:29.450 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:08:29.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:29.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:29.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:29.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:29.921 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:08:30.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:30.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:30.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:30.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:30.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:30.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:30.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:30.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:30.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:30.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:30.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:30.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:30.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:30.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:30.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:30.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:30.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:30.392 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:08:30.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:30.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:30.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:30.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:30.863 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:08:31.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:31.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:31.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:31.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:31.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:31.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:31.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:31.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:31.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:31.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:31.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:31.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:31.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:31.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:31.197 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:08:36.201 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:36.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:36.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:36.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:36.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:36.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:36.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:36.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:36.210 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:36.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:36.211 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:08:36.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:08:36.214 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:08:36.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:36.214 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:36.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:36.215 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:08:36.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:36.215 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:08:36.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:36.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:08:36.216 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:08:36.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:36.216 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:36.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:36.217 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:08:36.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:36.217 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:08:36.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:36.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:08:36.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:08:36.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:36.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:36.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:36.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:08:36.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:36.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:08:36.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:36.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:08:36.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:08:36.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:08:36.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:08:36.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:08:36.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:08:36.222 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:08:36.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:36.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:36.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:36.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:08:36.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:08:36.751 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:08:36.753 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:08:36.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:36.755 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:08:36.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:36.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:36.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:36.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:36.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:36.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:36.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:36.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:36.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:36.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:36.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:36.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:36.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:37.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:37.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:37.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:37.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:37.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:37.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:37.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:37.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:37.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:37.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:37.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:37.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:37.176 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:08:37.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:37.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:37.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:37.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:37.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:37.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:37.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:37.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:37.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:37.648 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:08:37.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:37.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:37.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:37.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:37.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:37.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:37.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:37.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:37.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:37.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:37.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:37.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:37.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:37.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:37.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:37.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:37.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:38.119 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:08:38.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:38.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:38.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:38.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:38.591 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:08:38.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:38.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:38.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:38.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:38.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:38.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:38.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:38.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:38.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:38.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:38.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:38.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:38.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:38.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:38.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:38.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:38.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:39.064 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:08:39.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:39.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:39.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:39.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:39.536 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:08:39.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:39.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:39.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:39.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:39.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:39.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:39.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:39.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:39.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:39.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:39.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:39.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:39.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:39.865 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:08:39.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:44.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:44.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:44.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:44.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:44.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:44.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:44.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:44.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:44.882 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:44.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:44.883 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:08:44.887 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:08:44.887 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:08:44.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:44.888 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:44.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:44.889 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:08:44.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:44.889 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:08:44.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:44.892 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:08:44.893 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:08:44.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:44.893 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:44.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:44.894 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:08:44.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:44.894 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:08:44.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:44.896 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:08:44.896 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:08:44.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:44.896 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:44.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:44.896 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:08:44.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:44.897 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:08:44.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:44.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:08:44.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:08:44.901 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:08:44.901 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:44.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:44.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:44.905 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:08:45.381 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:08:45.429 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:08:45.431 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:08:45.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:45.433 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:08:45.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:45.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:45.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:45.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:45.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:45.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:45.457 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:45.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:45.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:45.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:45.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:45.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:45.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:45.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:45.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:45.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:45.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:45.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:45.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:45.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:45.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:45.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:45.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:45.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:45.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:45.849 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:08:45.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:45.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:45.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:45.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:45.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:45.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:45.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:45.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:45.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:46.320 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:08:46.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:46.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:46.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:46.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:46.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:46.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:46.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:46.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:46.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:46.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:46.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:46.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:46.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:46.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:46.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:46.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:46.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:46.790 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:08:46.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:46.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:46.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:46.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:47.261 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:08:47.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:47.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:47.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:47.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:47.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:47.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:47.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:47.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:47.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:47.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:47.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:47.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:47.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:47.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:47.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:47.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:47.732 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:08:47.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:47.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:47.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:47.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:48.202 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:08:48.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:48.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:48.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:48.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:48.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:48.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:48.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:48.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:48.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:48.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:48.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:48.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:48.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:48.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:48.537 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:08:53.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:53.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:53.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:53.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:53.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:53.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:53.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:53.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:53.549 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:53.550 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:08:53.550 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:08:53.552 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:08:53.552 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:08:53.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:53.552 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:53.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:53.552 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:08:53.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:08:53.552 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:08:53.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:53.555 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:08:53.555 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:08:53.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:53.555 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:53.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:53.555 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:08:53.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:08:53.555 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:08:53.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:53.558 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:08:53.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:08:53.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:53.558 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:08:53.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:53.558 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:08:53.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:08:53.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:08:53.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:53.563 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:08:53.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:08:53.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:08:53.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:08:53.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:08:53.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:53.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:08:53.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:08:53.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:08:53.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:53.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:08:53.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:08:53.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:08:54.046 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:08:54.088 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:08:54.088 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:08:54.090 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:08:54.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:54.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:54.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:54.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:54.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:54.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:54.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:54.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:54.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:54.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:54.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:54.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:54.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:54.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:54.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:54.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:54.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:54.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:54.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:54.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:54.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:54.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:54.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:54.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:54.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:54.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:54.518 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:08:54.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:54.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:54.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:54.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:54.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:54.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:54.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:54.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:54.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:54.989 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:08:55.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:55.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:55.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:55.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:55.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:55.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:55.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:55.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:55.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:55.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:55.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:55.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:55.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:55.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:55.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:55.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:55.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:55.460 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:08:55.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:55.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:55.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:55.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:55.933 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:08:56.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:56.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:56.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:56.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:56.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:56.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:56.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:08:56.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:56.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:56.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:56.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:08:56.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:08:56.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:56.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:08:56.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:08:56.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:56.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:56.401 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:08:56.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:56.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:56.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:56.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:56.872 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:08:57.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:08:57.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:08:57.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:08:57.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:08:57.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:08:57.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:08:57.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:08:57.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:08:57.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:08:57.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:08:57.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:08:57.209 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:08:57.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:08:57.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:08:57.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:08:57.210 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:57.210 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:57.211 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:57.211 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:57.211 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:08:57.211 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:02.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:02.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:02.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:02.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:02.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:02.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:02.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:02.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:02.211 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:02.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:02.211 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:09:02.212 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:09:02.212 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:09:02.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:02.212 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:02.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:02.212 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:09:02.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:02.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:09:02.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:02.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:09:02.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:09:02.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:02.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:02.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:02.213 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:09:02.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:02.213 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:09:02.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:02.214 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:09:02.214 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:09:02.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:02.214 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:02.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:02.214 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:09:02.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:02.214 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:09:02.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:09:02.216 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:09:02.216 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:09:02.216 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:02.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:02.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:02.221 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:09:02.686 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:09:02.736 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:09:02.739 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:09:02.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:02.741 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:09:02.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:02.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:02.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:02.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:02.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:02.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:02.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:02.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:02.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:02.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:02.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:02.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:02.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:02.755 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:09:02.755 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:02.755 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:02.756 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:02.756 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:02.756 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:02.756 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:02.756 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:07.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:07.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:07.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:07.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:07.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:07.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:07.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:07.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:07.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:07.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:07.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:09:07.762 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:09:07.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:09:07.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:07.763 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:07.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:07.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:09:07.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:07.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:09:07.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:07.763 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:09:07.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:09:07.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:07.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:07.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:07.764 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:09:07.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:07.764 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:09:07.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:07.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:09:07.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:09:07.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:07.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:07.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:07.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:09:07.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:07.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:09:07.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:09:07.767 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:09:07.767 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:09:07.767 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:07.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:07.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:07.772 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:09:08.236 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:09:08.280 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:09:08.280 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:09:08.280 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:09:08.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:08.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:08.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:08.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:08.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:08.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:08.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:08.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:08.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:08.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:08.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:08.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:08.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:08.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:08.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:08.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:08.301 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:09:08.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:08.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:08.302 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:08.302 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:08.302 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:08.302 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:08.302 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:08.302 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:13.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:13.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:13.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:13.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:13.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:13.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:13.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:13.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:13.320 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:13.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:13.320 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:09:13.322 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:09:13.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:09:13.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:13.323 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:13.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:13.323 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:09:13.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:13.323 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:09:13.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:13.325 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:09:13.325 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:09:13.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:13.325 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:13.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:13.325 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:09:13.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:13.325 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:09:13.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:13.327 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:09:13.327 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:09:13.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:13.327 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:13.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:13.327 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:09:13.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:13.327 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:09:13.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:09:13.330 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:09:13.330 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:13.330 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:13.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:13.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:13.335 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:09:13.803 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:09:13.858 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:09:13.859 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:09:13.860 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:09:13.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:13.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:13.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:13.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:13.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:13.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:13.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:13.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:13.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:13.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:13.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:13.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:13.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:13.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:13.882 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:09:13.882 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:13.882 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:13.882 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:13.882 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:13.882 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:13.882 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:18.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:18.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:18.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:18.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:18.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:18.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:18.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:18.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:18.883 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:18.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:18.884 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:09:18.885 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:09:18.885 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:09:18.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:18.885 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:18.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:18.885 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:09:18.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:18.885 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:09:18.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:18.886 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:09:18.886 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:09:18.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:18.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:18.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:18.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:09:18.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:18.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:09:18.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:18.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:09:18.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:09:18.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:18.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:18.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:18.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:09:18.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:18.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:09:18.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:09:18.890 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:09:18.890 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:09:18.890 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:18.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:18.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:18.891 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:09:23.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:23.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:23.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:23.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:23.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:23.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:23.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:23.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:23.907 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:23.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:23.908 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:09:23.910 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:09:23.910 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:09:23.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:23.911 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:23.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:23.911 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:09:23.911 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:23.911 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:09:23.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:23.914 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:09:23.914 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:09:23.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:23.914 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:23.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:23.915 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:09:23.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:23.915 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:09:23.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:23.918 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:09:23.918 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:09:23.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:23.918 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:23.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:23.919 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:09:23.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:23.919 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:09:23.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:23.924 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:09:23.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:09:23.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:09:23.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:09:23.924 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:09:23.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:09:23.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:09:23.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:23.925 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:09:23.925 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:09:23.925 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:09:23.925 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:23.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:23.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:23.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:23.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:23.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:23.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:23.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:23.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:23.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:23.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:23.930 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:09:24.406 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:09:24.458 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:09:24.460 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:09:24.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:24.461 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:09:24.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:24.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:24.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:24.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:24.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:24.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:24.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:24.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:24.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:24.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:24.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:24.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:24.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:24.874 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:09:24.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:24.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:24.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:24.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:25.338 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:09:25.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:25.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:25.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:25.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:25.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:25.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:25.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:25.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:25.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:25.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:25.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:25.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:25.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:25.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:25.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:25.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:25.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:25.804 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:09:25.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:25.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:25.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:25.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:26.272 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:09:26.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:26.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:26.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:26.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:26.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:26.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:26.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:26.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:26.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:26.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:26.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:26.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:26.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:26.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:26.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:26.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:26.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:26.739 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:09:26.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:26.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:26.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:26.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:27.203 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:09:27.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:27.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:27.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:27.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:27.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:27.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:27.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:27.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:27.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:27.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:27.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:27.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:27.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:27.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:27.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:27.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:27.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:27.667 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:09:27.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:27.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:27.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:27.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:28.129 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:09:28.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:28.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:28.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:28.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:28.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:28.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:28.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:28.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:28.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:28.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:28.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:28.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:28.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:28.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:28.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:28.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:28.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:28.594 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:09:28.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:28.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:28.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:28.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:28.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:28.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:28.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:28.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:28.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:28.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:28.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:28.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:28.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:28.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:28.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:28.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:28.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:28.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:28.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:28.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:28.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:29.062 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:09:29.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:29.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:29.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:29.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:29.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:29.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:29.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:29.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:29.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:29.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:29.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:29.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:29.530 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:09:29.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:29.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:29.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:29.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:29.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:29.997 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:09:30.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:30.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:30.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:30.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:30.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:30.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:30.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:30.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:30.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:30.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:30.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:30.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:30.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:30.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:30.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:30.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:30.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:30.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:30.465 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:09:30.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:30.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:30.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:30.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:30.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:30.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:30.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:30.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:30.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:30.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:30.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:30.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:30.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:30.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:30.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:30.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:30.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:30.934 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:09:31.402 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:09:31.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:31.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:31.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:31.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:31.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:31.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:31.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:31.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:31.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:31.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:31.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:31.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:31.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:31.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:31.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:31.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:31.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:31.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:31.869 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:09:31.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:31.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:31.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:31.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:31.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:31.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:31.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:31.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:31.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:31.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:31.998 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:31.998 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:32.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:32.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:32.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:32.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:32.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:32.337 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:09:32.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:32.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:32.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:32.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:32.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:32.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:32.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:32.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:32.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:32.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:32.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:32.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:32.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:32.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:32.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:32.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:32.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:32.801 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:09:33.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:33.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:33.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:33.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:33.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:33.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:33.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:33.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:33.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:33.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:33.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:33.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:33.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:33.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:33.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:33.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:33.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:33.274 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:09:33.746 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:09:34.212 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:09:34.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:34.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:34.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:34.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:34.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:34.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:34.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:34.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:34.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:34.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:34.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:34.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:34.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:34.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:34.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:34.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:34.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:34.679 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:09:35.144 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:09:35.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:35.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:35.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:35.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:35.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:35.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:35.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:35.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:35.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:35.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:35.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:35.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:35.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:35.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:35.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:35.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:35.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:35.613 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:09:36.077 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:09:36.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:36.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:36.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:36.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:36.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:36.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:36.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:36.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:36.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:36.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:36.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:36.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:36.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:36.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:36.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:36.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:36.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:36.541 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:09:37.003 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:09:37.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:37.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:37.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:37.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:37.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:37.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:37.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:37.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:37.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:37.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:37.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:37.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:37.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:37.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:37.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:37.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:37.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:37.466 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:09:37.930 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:09:38.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:38.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:38.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:38.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:38.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:38.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:38.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:38.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:38.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:38.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:38.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:38.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:38.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:38.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:38.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:38.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:38.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:38.396 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:09:38.863 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:09:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:38.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:38.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:38.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:38.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:38.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:38.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:38.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:38.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:38.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:38.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:38.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:38.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:38.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:38.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:38.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:38.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:39.331 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:09:39.801 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:09:39.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:39.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:39.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:39.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:39.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:39.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:39.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:39.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:39.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:39.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:39.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:39.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:39.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:39.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:39.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:39.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:39.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:40.267 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:09:40.733 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:09:40.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:40.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:40.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:40.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:40.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:40.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:40.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:40.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:40.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:40.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:40.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:40.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:40.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:40.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:40.876 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:09:40.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3705 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:40.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3705 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:40.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3705 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:40.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3705 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:40.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3705 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:40.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3705 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:40.876 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3705 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:09:45.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:45.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:45.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:45.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:45.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:45.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:45.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:45.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:45.892 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:45.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:45.892 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:09:45.894 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:09:45.894 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:09:45.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:45.894 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:45.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:45.894 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:09:45.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:45.894 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:09:45.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:45.897 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:09:45.897 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:09:45.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:45.897 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:45.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:45.897 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:09:45.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:45.897 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:09:45.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:45.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:09:45.899 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:09:45.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:45.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:45.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:45.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:09:45.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:45.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:09:45.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:09:45.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:09:45.902 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:09:45.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:45.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:45.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:45.907 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:09:46.377 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:09:46.432 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:09:46.434 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:09:46.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:46.436 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:09:46.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:46.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:46.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:46.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:46.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:46.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:46.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:46.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:46.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:46.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:46.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:46.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:46.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:46.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:46.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:46.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:46.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:46.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:46.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:46.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:46.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:46.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:46.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:46.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:46.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:46.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:46.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:46.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:46.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:46.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:46.843 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:09:46.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:46.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:46.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:46.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:46.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:46.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:46.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:46.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:46.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:46.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:46.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:46.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:46.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:46.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:46.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:46.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:47.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:47.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:47.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:47.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:47.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:47.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:47.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:47.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:47.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:47.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:47.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:47.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:09:47.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:47.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:47.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:47.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:09:47.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:09:47.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:47.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:09:47.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:09:47.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:47.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:47.308 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:09:47.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:09:47.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:09:47.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:09:47.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:09:47.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:47.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:47.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:47.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:47.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:47.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:47.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:47.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:47.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:47.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:47.493 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:09:52.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:09:52.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:09:52.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:52.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:52.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:52.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:52.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:09:52.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:52.514 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:52.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:09:52.514 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:09:52.516 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:09:52.516 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:09:52.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:52.516 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:52.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:09:52.516 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:09:52.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:09:52.517 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:09:52.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:09:52.518 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:09:52.518 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:09:52.518 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:52.518 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:52.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:09:52.518 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:09:52.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:09:52.519 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:09:52.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:09:52.522 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:09:52.522 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:09:52.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:52.522 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:09:52.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:09:52.522 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:09:52.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:09:52.522 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:09:52.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:52.528 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:09:52.529 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:09:52.529 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:09:52.529 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:52.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:52.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:52.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:52.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:09:52.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:09:52.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:52.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:09:52.534 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:09:53.000 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:09:53.464 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:09:53.931 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:09:54.397 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:09:54.865 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:09:55.330 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:09:55.797 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:09:56.262 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:09:56.730 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:09:57.194 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:09:57.658 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:09:58.128 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:09:58.604 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:09:59.075 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:09:59.551 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:10:00.023 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:10:00.496 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:10:00.969 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:10:01.441 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:10:01.914 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:10:02.387 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:10:02.859 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:10:03.331 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:10:03.805 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:10:04.276 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:10:04.750 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:10:05.223 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:10:05.694 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:10:06.170 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:10:06.642 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:10:07.113 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:10:07.588 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:10:08.056 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:10:08.519 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:10:08.984 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:10:09.450 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:10:09.920 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:10:10.390 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:10:10.858 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:10:11.326 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:10:11.798 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:10:12.264 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:10:12.735 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:10:13.202 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:10:13.672 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:10:14.139 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:10:14.610 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:10:15.078 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:10:15.550 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:10:16.020 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:10:16.491 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:10:16.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:10:16.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:10:16.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:10:16.559 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:10:16.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:10:16.559 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:10:16.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:10:16.559 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:10:16.559 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:10:16.560 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:10:16.560 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:10:16.560 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:10:16.560 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:10:16.560 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:10:21.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:10:21.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:10:21.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:10:21.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:10:21.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:10:21.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:10:21.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:10:21.569 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:10:21.569 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:10:21.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:10:21.570 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:10:21.572 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:10:21.572 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:10:21.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:10:21.573 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:10:21.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:10:21.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:10:21.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:10:21.574 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:10:21.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:10:21.575 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:10:21.575 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:10:21.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:10:21.575 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:10:21.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:10:21.575 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:10:21.575 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:10:21.575 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:10:21.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:10:21.577 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:10:21.577 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:10:21.577 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:10:21.577 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:10:21.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:10:21.578 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:10:21.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:10:21.578 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:10:21.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:10:21.580 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:10:21.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:10:21.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:10:21.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:10:21.580 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:10:21.581 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:10:21.581 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:10:21.581 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:10:21.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:10:21.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:10:21.586 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:10:22.056 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:10:22.526 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:10:22.991 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:10:23.459 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:10:23.925 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:10:24.397 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:10:24.868 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:10:25.339 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:10:25.804 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:10:26.271 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:10:26.742 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:10:27.212 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:10:27.682 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:10:28.152 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:10:28.624 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:10:29.094 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:10:29.566 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:10:30.036 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:10:30.506 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:10:30.978 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:10:31.448 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:10:31.917 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:10:32.404 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:10:32.875 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:10:33.339 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:10:33.805 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:10:34.269 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:10:34.734 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:10:35.207 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:10:35.678 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:10:36.146 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:10:36.619 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:10:37.091 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:10:37.563 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:10:38.036 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:10:38.507 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:10:38.980 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:10:39.452 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:10:39.927 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:10:40.399 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:10:40.874 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:10:41.346 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:10:41.822 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:10:42.294 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:10:42.769 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:10:43.241 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:10:43.716 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:10:44.188 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:10:44.663 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:10:45.137 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:10:45.610 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:10:46.082 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:10:46.558 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:10:47.030 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:10:47.505 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:10:47.970 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:10:48.438 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:10:48.909 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:10:49.381 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:10:49.851 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:10:50.321 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:10:50.797 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:10:51.268 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:10:51.740 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:10:52.215 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:10:52.687 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:10:53.162 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:10:53.634 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:10:54.109 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:10:54.581 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:10:55.056 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:10:55.528 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:10:56.001 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:10:56.474 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:10:56.946 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:10:57.419 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 04:10:57.892 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 04:10:58.364 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 04:10:58.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:10:58.837 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 04:10:59.310 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 04:10:59.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:10:59.781 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 04:11:00.251 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 04:11:00.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:00.723 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 04:11:01.195 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 04:11:01.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:01.670 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 04:11:02.138 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 04:11:02.613 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 04:11:02.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:03.085 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 04:11:03.560 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 04:11:03.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:03.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:11:03.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:11:03.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:11:03.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:11:03.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:11:03.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:11:03.618 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:11:08.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:11:08.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:11:08.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:11:08.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:11:08.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:11:08.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:11:08.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:11:08.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:11:08.639 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:11:08.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:11:08.640 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:11:08.643 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:11:08.643 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:11:08.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:11:08.643 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:11:08.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:11:08.644 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:11:08.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:11:08.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:11:08.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:08.647 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:11:08.647 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:11:08.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:11:08.647 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:11:08.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:11:08.648 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:11:08.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:11:08.648 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:11:08.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:08.650 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:11:08.650 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:11:08.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:11:08.650 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:11:08.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:11:08.651 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:11:08.651 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:11:08.651 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:11:08.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:11:08.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:11:08.656 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:11:08.656 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:11:08.656 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:08.661 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:11:09.138 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:11:09.180 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:11:09.182 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:09.184 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:11:09.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:09.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:09.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:09.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:11:09.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:09.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:09.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:09.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:11:09.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:11:09.232 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:09.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:09.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:09.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:09.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:09.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:09.606 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:11:09.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:09.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:09.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:09.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:10.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:11:10.091 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:10.550 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:11:10.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:10.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:10.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:10.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:11.023 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:11:11.495 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:11:11.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:11.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:11.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:11.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:11.966 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:11:12.437 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:11:12.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:12.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:12.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:12.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:12.910 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:11:12.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:12.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:12.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:12.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:13.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:13.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:13.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:11:13.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:13.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:13.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:13.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:11:13.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:11:13.046 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:13.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:13.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:13.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:13.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:13.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:13.382 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:11:13.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:13.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:13.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:13.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:13.854 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:11:14.183 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:14.326 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:11:14.797 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:11:15.268 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:11:15.738 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:11:16.209 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:11:16.681 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:11:17.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:17.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:17.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:17.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:17.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:17.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:17.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:11:17.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:17.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:17.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:17.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:11:17.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:11:17.094 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:17.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:17.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:17.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:17.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:17.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:17.153 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:11:17.590 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:17.625 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:11:18.096 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:11:18.569 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:11:19.042 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:11:19.514 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:11:19.986 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:11:20.458 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:11:20.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:20.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:20.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:20.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:20.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:20.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:20.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:11:20.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:20.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:20.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:20.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:11:20.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:11:20.921 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:20.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:20.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:20.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:20.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:20.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:20.929 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:11:21.397 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:11:21.786 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:21.868 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:11:22.257 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:22.341 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:11:22.813 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:11:23.203 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:23.285 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:11:23.755 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:11:24.227 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:11:24.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:24.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:24.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:24.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:24.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:24.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:24.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:24.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:24.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:11:24.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:11:24.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:11:24.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:11:24.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:11:24.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:11:24.634 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:11:24.634 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3456 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:11:24.634 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:11:24.634 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:11:24.634 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:11:24.634 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:11:29.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:11:29.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:11:29.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:11:29.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:11:29.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:11:29.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:11:29.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:11:29.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:11:29.646 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:11:29.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:11:29.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:11:29.649 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:11:29.649 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:11:29.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:11:29.649 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:11:29.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:11:29.650 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:11:29.650 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:11:29.650 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:11:29.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:29.653 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:11:29.653 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:11:29.653 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:11:29.653 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:11:29.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:11:29.654 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:11:29.654 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:11:29.654 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:11:29.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:29.657 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:11:29.657 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:11:29.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:11:29.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:11:29.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:11:29.658 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:11:29.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:11:29.658 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:11:29.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:29.663 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:11:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:11:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:11:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:11:29.663 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:11:29.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:11:29.665 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:11:29.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:29.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:29.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:11:29.669 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:11:30.147 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:11:30.197 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:11:30.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:30.201 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:30.203 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:11:30.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:30.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:30.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:11:30.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:30.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:30.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:30.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:11:30.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:11:30.241 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:30.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:30.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:30.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:30.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:30.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:30.620 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:11:30.625 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:30.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:30.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:30.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:30.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:31.091 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:11:31.105 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:31.107 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:31.561 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:11:31.585 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:31.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:31.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:31.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:31.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:32.035 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:11:32.065 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:32.508 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:11:32.551 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:32.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:32.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:32.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:32.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:32.980 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:11:33.031 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:33.451 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:11:33.511 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:33.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:33.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:33.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:33.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:33.922 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:11:33.991 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:34.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:11:34.471 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:34.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:11:34.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:11:34.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:11:34.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:11:34.868 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:11:34.958 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:35.340 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:11:35.437 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:35.811 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:11:35.917 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:36.281 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:11:36.397 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:36.753 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:11:36.877 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:37.223 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:11:37.357 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:37.694 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:11:37.837 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:37.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:37.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:37.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:37.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:37.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:37.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:37.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:11:37.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:37.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:37.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:37.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:11:37.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:11:37.874 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:37.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:37.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:37.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:37.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:37.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:38.164 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:11:38.559 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:38.635 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:11:39.038 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:39.041 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:39.106 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:11:39.518 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:39.578 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:11:39.998 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:40.049 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:11:40.478 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:40.518 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:11:40.958 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:40.989 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:11:41.438 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:41.462 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:11:41.917 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:41.935 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:11:42.404 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:42.407 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:11:42.878 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:11:42.884 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:43.351 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:11:43.364 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:43.821 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:11:43.843 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:44.290 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:11:44.324 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:44.761 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:11:44.804 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:45.232 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:11:45.284 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:45.703 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:11:45.764 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:45.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:45.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:45.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:45.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:45.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:45.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:45.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:11:45.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:45.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:45.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:45.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:11:45.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:11:45.791 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:45.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:45.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:45.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:45.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:45.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:46.137 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:46.173 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:11:46.607 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:46.609 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:46.644 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:11:47.078 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:47.115 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:11:47.549 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:47.586 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:11:48.020 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:48.056 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:11:48.491 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:48.530 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:11:48.961 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:49.002 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:11:49.438 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:49.469 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:11:49.904 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:49.941 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:11:50.375 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:50.414 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:11:50.846 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:50.887 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:11:51.322 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:51.359 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:11:51.793 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:51.830 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:11:52.264 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:52.300 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:11:52.734 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:52.771 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:11:53.205 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:53.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:53.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:53.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:53.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:53.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:11:53.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:11:53.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:11:53.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:53.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:53.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:53.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:11:53.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:11:53.237 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:53.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:11:53.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:11:53.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:11:53.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:53.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:11:53.241 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:11:53.631 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:53.712 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:11:54.101 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:54.104 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:54.183 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:11:54.572 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:54.575 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:54.654 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:11:55.043 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:55.127 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:11:55.514 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:55.516 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:11:55.600 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:11:55.990 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:56.072 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:11:56.461 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:56.543 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:11:56.932 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:57.016 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:11:57.402 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:57.489 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:11:57.879 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:57.961 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:11:58.350 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:58.432 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:11:58.820 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:58.905 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:11:59.291 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:59.377 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:11:59.767 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:11:59.849 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:12:00.238 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:12:00.329 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:12:00.719 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:12:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:00.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:00.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:00.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:00.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:00.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:00.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:00.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:00.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:00.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:00.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:00.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:00.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:00.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:00.743 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:12:00.743 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:00.743 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:00.743 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:00.743 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:00.743 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:00.743 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:05.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:05.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:05.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:05.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:05.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:05.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:05.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:05.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:05.753 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:05.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:05.753 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:12:05.756 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:12:05.756 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:12:05.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:05.756 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:05.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:05.757 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:12:05.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:05.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:12:05.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:05.760 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:12:05.760 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:12:05.761 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:05.761 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:05.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:05.761 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:12:05.761 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:05.761 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:12:05.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:05.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:12:05.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:12:05.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:05.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:05.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:05.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:12:05.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:05.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:12:05.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:05.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:12:05.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:12:05.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:12:05.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:12:05.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:12:05.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:12:05.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:12:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:12:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:12:05.772 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:12:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:05.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:05.772 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:12:05.772 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:12:05.772 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:12:05.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:12:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:12:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:05.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:05.777 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:12:06.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:12:06.309 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:12:06.310 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:12:06.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:06.312 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:12:06.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:06.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:06.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:06.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:06.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:06.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:06.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:06.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:06.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:06.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:06.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:06.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:06.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:06.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:12:06.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:06.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:06.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:06.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:07.197 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:12:07.667 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:12:07.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:07.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:07.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:07.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:08.138 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:12:08.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:08.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:08.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:08.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:08.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:08.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:08.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:08.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:08.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:08.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:08.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:08.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:08.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:08.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:08.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:08.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:08.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:08.605 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:12:08.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:08.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:08.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:08.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:09.075 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:12:09.546 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:12:09.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:09.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:09.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:09.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:10.017 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:12:10.490 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:12:10.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:10.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:10.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:10.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:10.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:10.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:10.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:10.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:10.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:10.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:10.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:10.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:10.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:10.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:10.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:10.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:10.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:10.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:10.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:10.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:10.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:10.958 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:12:11.429 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:12:11.900 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:12:12.373 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:12:12.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:12.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:12.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:12.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:12.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:12.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:12.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:12.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:12.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:12.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:12.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:12.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:12.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:12.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:12.786 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:12:12.786 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:12.786 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:12.786 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:12.786 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:12.786 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:12.786 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:17.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:17.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:17.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:17.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:17.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:17.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:17.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:17.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:17.797 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:17.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:17.798 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:12:17.800 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:12:17.800 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:12:17.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:17.800 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:17.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:17.800 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:12:17.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:17.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:12:17.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:17.803 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:12:17.803 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:12:17.803 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:17.803 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:17.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:17.803 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:12:17.803 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:17.803 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:12:17.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:17.805 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:12:17.805 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:12:17.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:17.805 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:17.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:17.805 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:12:17.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:17.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:12:17.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:17.807 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:12:17.808 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:12:17.808 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:12:17.808 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:17.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:17.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:17.813 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:12:18.291 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:12:18.335 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:12:18.337 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:12:18.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:18.341 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:12:18.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:18.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:18.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:18.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:18.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:18.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:18.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:18.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:18.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:18.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:18.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:18.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:18.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:18.763 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:12:18.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:18.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:18.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:18.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:19.234 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:12:19.705 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:12:19.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:19.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:19.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:19.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:20.176 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:12:20.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:20.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:20.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:20.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:20.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:20.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:20.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:20.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:20.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:20.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:20.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:20.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:20.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:20.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:20.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:20.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:20.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:20.648 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:12:20.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:20.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:20.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:20.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:21.121 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:12:21.593 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:12:21.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:21.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:21.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:21.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:22.064 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:12:22.536 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:12:22.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:22.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:22.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:22.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:22.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:22.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:22.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:22.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:22.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:22.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:22.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:22.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:22.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:22.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:22.666 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:12:27.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:27.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:27.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:27.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:27.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:27.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:27.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:27.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:27.680 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:27.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:27.680 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:12:27.681 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:12:27.681 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:12:27.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:27.681 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:27.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:27.681 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:12:27.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:27.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:12:27.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:27.682 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:12:27.682 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:12:27.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:27.682 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:27.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:27.683 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:12:27.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:27.683 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:12:27.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:27.684 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:12:27.684 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:12:27.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:27.684 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:27.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:27.684 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:12:27.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:27.684 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:12:27.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:27.687 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:12:27.688 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:12:27.688 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:12:27.688 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:27.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:27.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:27.692 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:12:28.169 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:12:28.217 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:12:28.219 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:12:28.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:28.221 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:12:28.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:28.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:28.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:28.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:28.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:28.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:28.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:28.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:28.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:28.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:28.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:28.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:28.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:28.642 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:12:28.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:28.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:28.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:28.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:29.115 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:12:29.586 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:12:29.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:29.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:29.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:29.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:30.058 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:12:30.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:30.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:30.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:30.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:30.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:30.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:30.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:30.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:30.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:30.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:30.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:30.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:30.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:30.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:30.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:30.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:30.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:30.528 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:12:30.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:30.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:30.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:30.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:30.997 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:12:31.467 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:12:31.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:31.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:31.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:31.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:31.938 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:12:32.411 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:12:32.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:32.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:32.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:32.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:32.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:32.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:32.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:32.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:32.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:32.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:32.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:32.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:32.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:32.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:32.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:32.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:32.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:32.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:32.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:32.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:32.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:32.880 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:12:33.351 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:12:33.823 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:12:34.297 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:12:34.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:34.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:34.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:34.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:34.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:34.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:34.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:34.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:34.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:34.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:34.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:34.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:34.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:34.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:34.610 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:12:39.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:39.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:39.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:39.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:39.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:39.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:39.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:39.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:39.629 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:39.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:39.629 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:12:39.631 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:12:39.632 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:12:39.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:39.632 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:39.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:39.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:12:39.633 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:39.633 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:12:39.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:39.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:12:39.634 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:12:39.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:39.634 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:39.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:39.634 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:12:39.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:39.634 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:12:39.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:39.635 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:12:39.635 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:12:39.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:39.635 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:39.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:39.635 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:12:39.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:39.636 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:12:39.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:39.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:12:39.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:12:39.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:12:39.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:12:39.637 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:12:39.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:12:39.638 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:12:39.638 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:12:39.638 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:39.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:39.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:12:40.119 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:12:40.162 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:12:40.162 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:12:40.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:40.163 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:12:40.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:40.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:40.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:40.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:40.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:40.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:40.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:40.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:40.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:40.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:40.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:40.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:40.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:40.592 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:12:40.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:40.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:40.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:40.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:41.063 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:12:41.534 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:12:41.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:41.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:41.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:41.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:42.004 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:12:42.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:42.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:42.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:42.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:42.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:42.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:42.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:42.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:42.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:42.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:42.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:42.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:42.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:42.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:42.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:42.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:42.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:42.474 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:12:42.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:42.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:42.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:42.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:42.946 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:12:43.416 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:12:43.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:43.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:43.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:43.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:43.887 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:12:44.361 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:12:44.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:44.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:44.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:44.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:44.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:44.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:44.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:44.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:44.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:44.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:44.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:44.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:44.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:44.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:44.508 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:12:49.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:49.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:49.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:49.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:49.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:49.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:49.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:49.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:49.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:49.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:49.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:12:49.529 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:12:49.530 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:12:49.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:49.530 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:49.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:49.531 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:12:49.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:49.531 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:12:49.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:49.534 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:12:49.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:12:49.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:49.534 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:49.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:49.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:12:49.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:49.535 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:12:49.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:49.537 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:12:49.537 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:12:49.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:49.537 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:49.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:49.538 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:12:49.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:49.538 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:12:49.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:49.541 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:12:49.542 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:12:49.542 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:12:49.542 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:49.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:49.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:49.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:49.546 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:12:50.023 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:12:50.069 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:12:50.070 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:12:50.071 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:12:50.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:50.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:50.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:50.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:50.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:50.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:50.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:50.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:50.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:50.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:50.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:50.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:50.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:50.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:50.491 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:12:50.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:50.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:50.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:50.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:50.962 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:12:51.432 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:12:51.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:51.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:51.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:51.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:51.903 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:12:52.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:52.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:52.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:52.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:52.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:52.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:52.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:52.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:52.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:52.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:52.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:52.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:52.296 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:12:52.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:52.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:52.296 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:52.296 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:52.296 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:52.296 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:52.296 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:52.296 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:12:57.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:12:57.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:12:57.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:57.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:57.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:57.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:57.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:12:57.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:57.303 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:57.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:12:57.303 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:12:57.305 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:12:57.306 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:12:57.306 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:57.306 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:57.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:12:57.307 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:12:57.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:12:57.307 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:12:57.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:57.309 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:12:57.309 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:12:57.309 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:57.309 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:57.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:12:57.309 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:12:57.309 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:12:57.309 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:12:57.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:57.312 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:12:57.312 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:12:57.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:57.312 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:12:57.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:12:57.312 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:12:57.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:12:57.312 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:12:57.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:57.316 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:12:57.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:12:57.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:12:57.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:12:57.316 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:12:57.317 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:12:57.317 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:12:57.317 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:12:57.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:57.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:12:57.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:12:57.322 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:12:57.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:12:57.852 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:12:57.855 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:12:57.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:57.857 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:12:57.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:12:57.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:12:57.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:12:57.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:57.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:57.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:57.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:12:57.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:12:57.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:12:57.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:12:57.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:12:57.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:57.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:12:58.271 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:12:58.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:58.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:58.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:58.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:58.742 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:12:59.213 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:12:59.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:12:59.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:12:59.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:12:59.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:12:59.684 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:13:00.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:00.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:00.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:00.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:00.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:00.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:00.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:00.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:00.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:00.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:00.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:00.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:00.106 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:13:00.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:00.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:05.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:05.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:05.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:05.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:05.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:05.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:05.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:05.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:05.122 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:05.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:05.122 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:13:05.125 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:13:05.125 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:13:05.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:05.125 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:05.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:05.126 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:13:05.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:05.126 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:13:05.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:05.128 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:13:05.129 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:13:05.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:05.129 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:05.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:05.129 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:13:05.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:05.129 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:13:05.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:05.131 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:13:05.131 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:13:05.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:05.131 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:05.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:05.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:13:05.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:05.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:13:05.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:13:05.135 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:13:05.135 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:13:05.135 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:05.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:05.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:05.140 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:13:05.617 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:13:05.666 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:13:05.668 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:13:05.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:05.669 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:13:05.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:05.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:05.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:05.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:05.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:05.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:05.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:05.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:05.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:05.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:05.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:05.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:05.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:06.084 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:13:06.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:06.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:06.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:06.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:06.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:06.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:06.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:06.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:06.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:06.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:06.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:06.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:06.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:06.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:06.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:06.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:06.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:06.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:06.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:06.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:06.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:06.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:06.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:06.555 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:13:06.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:06.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:06.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:06.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:06.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:06.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:06.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:06.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:06.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:06.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:06.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:06.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:06.567 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:13:11.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:11.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:11.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:11.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:11.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:11.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:11.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:11.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:11.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:11.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:11.588 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:13:11.591 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:13:11.591 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:13:11.591 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:11.591 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:11.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:11.592 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:13:11.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:11.592 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:13:11.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:11.594 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:13:11.594 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:13:11.594 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:11.594 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:11.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:11.594 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:13:11.594 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:11.594 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:13:11.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:11.596 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:13:11.596 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:13:11.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:11.596 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:11.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:11.596 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:13:11.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:11.597 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:13:11.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:13:11.599 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:13:11.599 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:13:11.599 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:11.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:11.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:11.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:11.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:11.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:11.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:11.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:11.604 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:13:12.079 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:13:12.120 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:13:12.121 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:13:12.122 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:13:12.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:12.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:12.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:12.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:12.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:12.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:12.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:12.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:12.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:12.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:12.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:12.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:12.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:12.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:12.547 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:13:12.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:12.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:12.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:12.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:12.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:12.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:12.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:12.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:12.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:12.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:12.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:12.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:12.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:12.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:12.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:12.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:12.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:12.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:12.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:12.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:12.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:13.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:13.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:13.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:13.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:13.018 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:13:13.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:13.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:13.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:13.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:13.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:13.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:13.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:13.026 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:13:13.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:13.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:13.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:13.026 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:13.026 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:13.026 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:13.026 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:13.026 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:13.026 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:18.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:18.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:18.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:18.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:18.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:18.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:18.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:18.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:18.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:18.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:18.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:13:18.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:13:18.039 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:13:18.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:18.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:18.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:18.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:13:18.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:18.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:13:18.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:18.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:13:18.042 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:13:18.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:18.042 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:18.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:18.042 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:13:18.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:18.043 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:13:18.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:18.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:13:18.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:13:18.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:18.045 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:18.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:18.045 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:13:18.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:18.045 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:13:18.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:18.048 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:13:18.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:13:18.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:13:18.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:13:18.049 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:13:18.049 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:13:18.049 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:18.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:18.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:18.054 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:13:18.531 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:13:18.578 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:13:18.580 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:13:18.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:18.581 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:13:18.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:18.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:18.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:18.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:18.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:18.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:18.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:18.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:18.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:18.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:18.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:18.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:18.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:18.999 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:13:19.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:19.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:19.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:19.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:19.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:19.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:19.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:19.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:19.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:19.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:19.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:19.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:19.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:19.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:19.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:19.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:19.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:19.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:19.468 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:13:19.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:19.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:19.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:19.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:19.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:19.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:19.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:19.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:19.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:19.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:19.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:19.521 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:13:19.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:19.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:19.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:19.521 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=320 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:19.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=320 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:19.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=320 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:19.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=320 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:19.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=320 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:19.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=320 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:19.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=320 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:24.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:24.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:24.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:24.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:24.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:24.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:24.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:24.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:24.534 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:24.535 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:24.535 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:13:24.538 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:13:24.538 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:13:24.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:24.539 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:24.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:24.539 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:13:24.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:24.540 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:13:24.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:24.541 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:13:24.541 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:13:24.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:24.541 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:24.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:24.542 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:13:24.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:24.542 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:13:24.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:24.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:13:24.544 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:13:24.544 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:24.544 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:24.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:24.544 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:13:24.544 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:24.544 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:13:24.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:24.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:13:24.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:13:24.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:13:24.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:13:24.547 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:13:24.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:13:24.548 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:13:24.548 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:13:24.548 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:24.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:24.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:24.553 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:13:25.030 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:13:25.072 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:13:25.075 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:13:25.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:25.077 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:13:25.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:25.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:25.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:25.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:25.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:25.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:25.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:25.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:25.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:25.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:25.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:25.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:25.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:25.499 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:13:25.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:25.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:25.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:25.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:25.969 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:13:26.440 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:13:26.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:26.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:26.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:26.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:26.912 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:13:27.385 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:13:27.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:27.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:27.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:27.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:27.857 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:13:28.328 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:13:28.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:28.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:28.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:28.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:28.799 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:13:29.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:29.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:29.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:29.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:29.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:29.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:29.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:29.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:29.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:29.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:29.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:29.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:29.186 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:13:34.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:34.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:34.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:34.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:34.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:34.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:34.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:34.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:34.204 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:34.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:34.204 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:13:34.209 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:13:34.210 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:13:34.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:34.210 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:34.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:34.211 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:13:34.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:34.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:13:34.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:34.214 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:13:34.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:13:34.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:34.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:34.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:34.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:13:34.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:34.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:13:34.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:34.219 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:13:34.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:13:34.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:34.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:34.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:34.220 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:13:34.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:34.220 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:13:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:34.224 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:13:34.224 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:13:34.224 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:13:34.225 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:34.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:34.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:34.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:34.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:34.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:34.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:34.229 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:13:34.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:13:34.756 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:13:34.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:34.760 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:13:34.763 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:13:34.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:34.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:34.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:34.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:34.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:34.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:34.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:34.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:34.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:34.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:34.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:34.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:34.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:35.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:35.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:35.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:35.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:35.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:35.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:35.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:35.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:35.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:35.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:35.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:35.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:35.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:35.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:35.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:35.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:35.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:35.177 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:13:35.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:35.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:35.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:35.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:35.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:35.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:35.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:35.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:35.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:35.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:35.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:35.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:35.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:35.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:35.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:35.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:35.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:35.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:35.358 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:13:35.358 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:35.358 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:35.358 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:35.358 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:35.358 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:35.358 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:35.358 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:35.358 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:40.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:40.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:40.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:40.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:40.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:40.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:40.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:40.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:40.368 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:40.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:40.368 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:13:40.373 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:13:40.373 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:13:40.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:40.373 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:40.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:40.373 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:13:40.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:40.374 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:13:40.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:40.376 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:13:40.376 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:13:40.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:40.377 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:40.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:40.377 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:13:40.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:40.377 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:13:40.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:40.379 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:13:40.379 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:13:40.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:40.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:40.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:40.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:13:40.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:40.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:13:40.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:40.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:13:40.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:13:40.384 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:13:40.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:40.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:40.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:40.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:40.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:40.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:40.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:40.388 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:13:40.866 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:13:40.916 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:13:40.919 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:13:40.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:40.922 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:13:40.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:40.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:40.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:40.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:40.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:40.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:40.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:40.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:41.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:41.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:41.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:41.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:41.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:41.338 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:13:41.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:41.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:41.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:41.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:41.810 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:13:42.283 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:13:42.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:42.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:42.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:42.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:42.755 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:13:43.222 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:13:43.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:43.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:43.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:43.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:43.693 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:13:44.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:13:44.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:44.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:44.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:44.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:44.635 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:13:45.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:45.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:45.018 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=1003 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:45.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:45.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:45.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:45.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:45.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:45.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:45.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:45.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:45.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:45.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:45.025 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:13:45.025 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1004 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:50.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:50.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:50.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:50.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:50.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:50.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:50.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:50.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:50.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:50.037 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:50.037 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:13:50.039 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:13:50.039 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:13:50.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:50.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:50.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:50.040 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:13:50.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:50.040 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:13:50.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:50.041 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:13:50.041 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:13:50.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:50.041 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:50.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:50.042 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:13:50.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:50.042 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:13:50.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:50.043 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:13:50.043 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:13:50.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:50.043 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:50.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:50.043 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:13:50.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:50.043 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:13:50.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:50.045 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:13:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:13:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:13:50.046 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:13:50.046 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:13:50.046 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:50.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:50.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:50.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:50.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:50.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:50.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:50.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:50.051 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:13:50.528 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:13:50.576 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:13:50.578 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:13:50.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:50.581 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:13:50.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:50.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:50.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:50.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:50.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:50.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:50.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:50.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:50.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:50.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:50.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:50.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:50.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:50.996 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:13:51.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:51.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:51.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:51.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:51.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:51.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:51.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:51.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:51.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:51.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:51.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:51.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:51.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:51.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:51.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:51.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:51.401 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:13:51.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:51.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:51.401 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:51.402 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:51.402 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:51.402 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:51.402 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:51.402 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:56.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:56.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:56.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:56.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:56.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:56.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:56.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:56.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:56.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:56.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:13:56.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:13:56.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:13:56.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:13:56.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:56.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:56.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:56.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:13:56.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:13:56.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:13:56.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:56.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:13:56.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:13:56.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:56.419 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:56.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:56.419 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:13:56.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:13:56.419 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:13:56.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:56.421 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:13:56.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:13:56.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:56.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:13:56.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:56.421 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:13:56.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:13:56.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:13:56.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:56.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:13:56.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:13:56.424 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:13:56.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:13:56.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:13:56.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:13:56.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:13:56.954 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:13:56.956 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:13:56.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:56.959 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:13:56.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:56.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:56.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:13:57.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:57.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:57.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:57.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:13:57.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:13:57.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:57.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:13:57.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:13:57.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:57.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:57.378 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:13:57.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:57.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:57.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:57.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:57.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:13:57.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:13:57.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:13:57.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:13:57.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:13:57.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:13:57.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:13:57.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:13:57.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:13:57.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:13:57.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:13:57.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:13:57.805 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:13:57.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:13:57.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:13:57.805 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=298 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:57.806 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=298 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:57.806 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=298 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:57.806 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=298 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:57.806 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=298 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:13:57.806 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=298 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:02.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:02.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:02.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:02.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:02.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:02.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:02.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:02.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:02.813 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:02.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:02.813 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:14:02.815 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:14:02.815 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:14:02.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:02.816 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:02.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:02.816 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:14:02.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:02.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:14:02.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:02.818 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:14:02.818 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:14:02.818 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:02.818 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:02.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:02.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:14:02.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:02.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:14:02.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:02.822 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:14:02.822 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:14:02.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:02.822 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:02.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:02.822 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:14:02.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:02.823 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:14:02.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:02.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:14:02.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:14:02.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:14:02.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:14:02.827 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:14:02.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:02.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:14:02.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:14:02.828 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:14:02.829 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:02.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:02.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:02.833 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:14:03.311 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:14:03.372 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:14:03.374 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:14:03.376 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:14:03.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:03.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:03.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:03.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:14:03.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:03.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:03.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:03.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:14:03.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:14:03.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:03.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:03.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:03.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:03.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:03.782 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:14:03.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:03.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:03.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:03.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:04.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:04.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:04.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:04.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:04.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:04.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:04.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:04.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:04.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:04.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:04.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:04.184 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:14:04.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:04.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:04.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:04.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:04.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:04.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:04.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:04.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:04.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:09.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:09.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:09.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:09.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:09.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:09.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:09.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:09.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:09.194 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:09.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:09.195 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:14:09.197 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:14:09.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:14:09.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:09.198 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:09.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:09.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:14:09.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:09.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:14:09.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:09.200 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:14:09.201 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:14:09.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:09.201 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:09.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:09.201 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:14:09.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:09.201 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:14:09.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:09.203 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:14:09.203 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:14:09.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:09.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:09.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:09.203 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:14:09.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:09.204 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:14:09.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:09.206 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:14:09.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:14:09.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:14:09.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:14:09.206 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:14:09.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:14:09.207 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:14:09.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:09.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:09.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:09.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:14:09.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:14:09.732 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:14:09.734 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:14:09.736 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:14:09.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:09.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:09.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:09.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:14:09.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:09.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:09.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:09.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:14:09.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:14:09.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:09.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:09.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:09.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:09.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:10.160 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:14:10.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:10.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:10.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:10.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:10.632 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:14:10.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:10.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:10.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:10.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:10.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:10.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:10.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:10.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:10.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:10.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:10.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:10.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:10.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:10.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:10.707 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:14:10.708 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:10.708 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:10.708 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:10.708 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:10.708 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:10.708 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:15.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:15.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:15.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:15.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:15.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:15.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:15.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:15.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:15.717 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:15.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:15.717 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:14:15.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:14:15.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:14:15.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:15.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:15.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:15.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:14:15.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:15.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:14:15.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:15.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:14:15.722 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:14:15.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:15.722 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:15.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:15.722 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:14:15.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:15.722 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:14:15.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:15.724 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:14:15.724 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:14:15.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:15.724 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:15.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:15.724 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:14:15.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:15.724 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:14:15.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:15.726 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:14:15.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:14:15.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:14:15.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:14:15.726 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:14:15.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:14:15.727 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:14:15.727 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:14:15.727 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:15.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:15.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:15.732 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:14:16.208 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:14:16.260 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:14:16.262 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:14:16.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:16.264 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:14:16.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:16.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:16.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:14:16.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:16.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:16.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:16.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:14:16.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:14:16.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:16.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:16.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:16.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:16.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:16.675 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:14:16.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:16.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:16.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:16.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:17.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:17.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:17.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:17.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:17.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:17.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:17.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:17.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:17.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:17.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:17.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:17.079 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:17.079 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:14:17.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:17.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:22.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:22.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:22.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:22.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:22.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:22.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:22.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:22.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:22.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:22.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:22.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:14:22.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:14:22.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:14:22.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:22.100 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:22.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:22.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:14:22.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:22.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:14:22.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:22.104 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:14:22.104 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:14:22.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:22.104 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:22.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:22.104 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:14:22.105 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:22.105 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:14:22.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:22.108 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:14:22.108 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:14:22.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:22.108 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:22.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:22.108 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:14:22.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:22.109 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:14:22.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:22.113 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:14:22.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:14:22.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:14:22.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:14:22.113 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:14:22.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:14:22.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:14:22.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:14:22.114 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:14:22.114 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:14:22.114 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:14:22.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:22.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:22.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:22.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:22.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:22.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:22.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:22.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:22.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:22.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:22.119 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:14:22.597 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:14:22.646 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:14:22.649 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:14:22.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:22.651 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:14:22.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:22.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:22.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:14:22.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:22.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:22.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:22.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:14:22.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:14:22.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:22.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:22.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:22.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:22.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:23.064 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:14:23.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:23.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:23.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:23.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:23.531 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:14:23.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:23.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:23.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:23.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:23.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:23.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:23.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:23.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:23.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:23.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:23.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:23.601 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:14:23.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:23.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:23.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:23.601 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:23.601 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:23.601 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:23.601 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:23.602 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:23.602 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:28.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:28.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:28.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:28.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:28.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:28.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:28.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:28.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:28.613 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:28.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:28.613 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:14:28.618 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:14:28.618 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:14:28.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:28.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:28.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:28.619 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:14:28.619 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:28.619 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:14:28.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:28.622 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:14:28.622 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:14:28.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:28.622 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:28.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:28.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:14:28.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:28.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:14:28.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:28.625 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:14:28.625 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:14:28.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:28.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:28.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:28.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:14:28.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:28.626 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:14:28.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:28.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:14:28.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:14:28.630 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:28.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:28.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:28.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:28.634 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:14:29.112 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:14:29.158 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:14:29.159 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:14:29.160 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:14:29.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:29.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:29.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:29.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:14:29.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:29.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:29.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:29.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:14:29.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:14:29.583 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:14:29.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:29.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:29.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:29.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:30.055 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:14:30.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:30.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:30.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:30.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:30.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:30.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:30.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:14:30.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:30.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:30.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:30.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:14:30.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:14:30.525 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:14:30.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:30.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:30.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:30.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:30.996 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:14:31.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:14:31.470 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:14:31.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:14:31.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:31.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:31.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:31.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:31.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:31.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:31.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:31.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:31.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:31.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:31.517 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:14:31.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:31.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:31.517 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:31.517 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:31.517 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:31.517 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:31.517 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:31.517 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:14:36.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:36.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:36.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:36.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:36.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:36.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:36.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:36.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:36.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:36.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:14:36.526 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:14:36.528 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:14:36.528 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:14:36.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:36.529 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:36.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:36.529 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:14:36.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:14:36.530 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:14:36.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:36.531 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:14:36.531 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:14:36.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:36.531 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:36.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:36.531 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:14:36.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:14:36.531 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:14:36.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:36.533 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:14:36.533 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:14:36.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:36.533 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:14:36.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:36.534 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:14:36.534 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:14:36.534 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:14:36.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:36.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:14:36.537 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:14:36.537 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:14:36.537 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:36.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:36.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:36.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:36.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:14:36.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:14:36.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:36.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:36.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:36.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:14:36.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:14:36.541 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:14:37.019 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:14:37.065 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:14:37.068 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:14:37.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:14:37.070 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:14:37.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:37.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:37.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:14:37.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:37.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:37.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:37.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:14:37.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:14:37.491 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:14:37.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:37.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:37.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:37.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:37.963 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:14:38.433 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:14:38.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:38.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:38.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:38.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:38.904 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:14:39.375 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:14:39.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:39.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:39.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:39.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:39.848 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:14:40.321 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:14:40.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:40.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:40.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:40.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:40.792 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:14:41.263 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:14:41.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:41.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:41.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:41.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:41.736 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:14:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:14:41.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:14:41.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:14:41.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:41.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:42.209 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:14:42.680 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:14:43.148 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:14:43.618 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:14:44.082 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:14:44.551 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:14:45.022 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:14:45.493 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:14:45.963 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:14:46.434 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:14:46.904 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:14:47.375 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:14:47.849 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:14:48.322 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:14:48.794 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:14:49.267 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:14:49.740 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:14:50.212 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:14:50.683 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:14:51.153 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:14:51.624 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:14:52.097 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:14:52.570 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:14:53.042 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:14:53.512 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:14:53.979 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:14:54.445 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:14:54.916 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:14:55.389 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:14:55.862 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:14:56.332 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:14:56.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:14:56.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:14:56.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:14:56.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:14:56.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:14:56.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:14:56.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:14:56.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:14:56.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:14:56.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:14:56.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:14:56.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:14:56.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:14:56.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:14:56.664 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:15:01.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:15:01.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:15:01.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:01.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:01.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:01.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:01.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:01.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:15:01.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:01.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:15:01.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:15:01.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:15:01.681 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:15:01.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:15:01.681 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:01.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:01.682 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:15:01.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:15:01.682 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:15:01.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:01.683 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:15:01.684 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:15:01.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:15:01.684 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:01.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:01.684 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:15:01.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:15:01.684 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:15:01.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:01.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:15:01.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:15:01.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:15:01.686 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:01.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:01.686 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:15:01.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:15:01.686 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:15:01.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:01.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:15:01.690 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:15:01.690 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:15:01.690 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:01.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:01.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:01.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:01.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:01.694 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:15:02.171 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:15:02.217 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:15:02.218 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:15:02.219 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:15:02.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:15:02.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:15:02.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:15:02.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:15:02.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:02.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:15:02.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:15:02.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:15:02.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:15:02.638 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:15:02.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:02.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:02.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:02.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:03.109 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:15:03.577 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:15:03.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:03.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:03.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:03.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:04.046 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:15:04.517 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:15:04.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:04.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:04.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:04.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:04.989 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:15:05.459 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:15:05.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:05.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:05.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:05.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:05.929 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:15:06.401 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:15:06.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:06.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:06.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:06.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:06.871 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:15:07.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:15:07.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:15:07.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:15:07.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:07.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:07.343 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:15:07.816 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:15:08.288 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:15:08.758 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:15:09.230 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:15:09.702 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:15:10.173 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:15:10.647 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:15:11.119 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:15:11.591 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:15:12.062 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:15:12.533 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:15:13.003 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:15:13.474 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:15:13.947 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:15:14.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:15:14.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:14.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:15:14.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:15:14.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:14.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:14.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:14.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:14.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:14.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:14.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:15:14.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:15:14.134 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:15:14.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:14.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:14.134 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2695 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:15:14.134 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2695 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:15:14.135 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2695 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:15:14.135 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2695 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:15:14.135 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2695 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:15:14.135 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2695 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:15:14.135 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2695 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:15:14.135 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2695 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:15:19.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:15:19.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:15:19.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:19.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:19.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:19.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:19.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:19.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:15:19.160 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:19.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:15:19.160 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:15:19.166 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:15:19.167 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:15:19.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:15:19.167 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:19.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:19.168 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:15:19.168 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:15:19.168 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:15:19.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:19.172 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:15:19.173 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:15:19.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:15:19.173 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:19.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:19.173 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:15:19.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:15:19.174 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:15:19.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:19.176 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:15:19.176 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:15:19.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:15:19.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:19.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:19.176 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:15:19.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:15:19.177 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:15:19.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:19.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:15:19.180 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:15:19.180 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:15:19.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:19.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:19.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:19.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:19.185 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:15:19.663 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:15:19.711 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:15:19.714 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:15:19.716 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:15:19.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:15:19.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:15:19.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:15:19.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:15:19.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:19.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:15:19.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:15:19.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:15:19.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:15:20.135 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:15:20.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:20.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:20.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:20.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:20.606 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:15:21.077 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:15:21.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:21.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:21.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:21.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:21.550 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:15:22.023 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:15:22.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:22.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:22.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:22.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:22.495 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:15:22.968 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:15:23.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:23.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:23.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:23.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:23.440 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:15:23.912 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:15:24.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:24.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:24.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:24.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:24.383 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:15:24.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:15:24.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:15:24.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:15:24.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:24.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:24.853 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:15:25.324 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:15:25.795 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:15:26.266 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:15:26.737 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:15:27.207 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:15:27.678 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:15:28.149 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:15:28.620 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:15:29.090 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:15:29.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:15:29.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:29.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:15:29.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:15:29.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:29.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:29.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:29.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:29.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:29.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:29.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:29.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:29.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:15:29.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:15:29.242 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:15:34.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:15:34.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:15:34.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:34.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:34.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:34.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:34.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:34.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:15:34.277 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:34.278 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:15:34.278 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:15:34.285 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:15:34.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:15:34.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:15:34.286 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:34.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:34.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:15:34.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:15:34.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:15:34.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:34.292 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:15:34.292 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:15:34.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:15:34.292 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:34.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:34.293 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:15:34.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:15:34.293 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:15:34.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:34.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:15:34.297 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:15:34.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:15:34.297 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:34.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:34.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:15:34.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:15:34.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:15:34.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:34.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:15:34.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:15:34.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:15:34.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:15:34.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:15:34.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:15:34.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:15:34.303 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:15:34.303 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:15:34.303 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:34.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:34.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:34.308 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:15:34.785 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:15:34.839 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:15:34.841 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:15:34.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:15:34.843 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:15:34.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:15:34.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:15:34.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:15:34.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:34.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:15:34.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:15:34.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:15:34.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:15:35.253 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:15:35.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:35.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:35.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:35.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:35.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:15:36.197 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:15:36.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:36.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:36.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:36.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:36.670 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:15:37.142 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:15:37.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:37.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:37.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:37.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:37.613 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:15:38.086 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:15:38.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:38.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:38.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:38.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:38.556 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:15:39.029 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:15:39.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:39.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:39.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:39.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:39.501 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:15:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:15:39.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:15:39.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:15:39.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:39.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:39.973 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:15:40.443 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:15:40.909 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:15:41.379 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:15:41.850 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:15:42.321 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:15:42.787 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:15:43.253 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:15:43.717 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:15:44.182 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:15:44.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:15:44.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:44.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:15:44.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:15:44.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:44.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:44.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:44.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:44.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:44.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:44.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:15:44.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:15:44.318 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:15:44.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:44.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:49.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:15:49.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:15:49.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:49.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:49.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:49.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:49.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:49.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:15:49.334 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:49.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:15:49.335 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:15:49.339 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:15:49.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:15:49.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:15:49.340 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:49.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:49.340 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:15:49.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:15:49.340 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:15:49.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:49.344 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:15:49.344 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:15:49.344 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:15:49.344 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:49.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:49.344 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:15:49.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:15:49.345 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:15:49.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:49.347 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:15:49.348 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:15:49.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:15:49.348 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:15:49.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:15:49.348 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:15:49.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:15:49.348 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:15:49.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:49.353 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:15:49.353 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:15:49.353 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:15:49.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:49.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:49.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:15:49.358 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:15:49.835 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:15:49.885 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:15:49.887 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:15:49.889 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:15:49.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:15:49.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:15:49.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:15:49.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:15:49.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:49.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:15:49.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:15:49.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:15:49.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:15:50.306 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:15:50.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:50.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:50.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:50.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:50.774 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:15:51.244 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:15:51.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:51.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:51.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:51.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:51.715 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:15:52.188 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:15:52.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:52.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:52.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:52.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:52.661 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:15:53.133 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:15:53.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:53.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:53.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:53.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:53.603 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:15:54.075 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:15:54.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:54.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:54.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:54.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:54.548 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:15:54.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:15:54.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:15:54.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:15:54.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:54.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:55.020 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:15:55.492 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:15:55.963 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:15:56.434 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:15:56.904 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:15:57.375 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:15:57.849 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:15:58.319 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:15:58.792 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:15:59.264 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:15:59.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:15:59.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:15:59.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:15:59.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:15:59.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:15:59.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:15:59.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:15:59.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:15:59.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:15:59.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:15:59.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:15:59.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:15:59.404 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:15:59.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:15:59.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:04.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:04.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:04.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:04.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:04.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:04.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:04.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:04.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:04.436 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:04.437 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:04.437 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:16:04.444 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:16:04.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:16:04.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:04.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:04.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:04.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:16:04.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:04.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:16:04.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:04.450 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:16:04.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:16:04.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:04.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:04.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:04.452 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:16:04.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:04.452 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:16:04.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:04.456 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:16:04.457 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:16:04.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:04.457 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:04.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:04.457 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:16:04.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:04.458 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:16:04.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:04.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:16:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:16:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:04.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:04.465 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:16:04.465 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:16:04.465 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:16:04.465 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:16:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:04.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:04.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:04.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:04.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:04.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:04.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:04.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:04.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:04.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:04.470 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:16:04.945 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:16:04.998 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:16:05.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:16:05.002 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:16:05.004 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:16:05.417 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:16:05.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:05.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:05.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:05.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:05.892 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:16:06.361 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:16:06.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:06.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:06.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:06.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:06.829 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:16:07.295 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:16:07.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:07.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:07.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:07.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:07.767 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:16:08.239 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:16:08.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:08.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:08.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:08.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:08.710 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:16:09.185 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:16:09.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:09.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:09.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:09.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:09.657 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:16:10.132 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:16:10.604 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:16:11.079 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:16:11.551 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:16:12.026 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:16:12.498 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:16:12.974 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:16:13.446 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:16:13.921 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:16:14.393 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:16:14.868 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:16:15.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:15.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:15.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:15.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:15.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:15.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:15.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:15.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:15.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:15.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:15.020 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:16:20.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:20.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:20.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:20.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:20.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:20.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:20.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:20.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:20.029 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:20.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:20.029 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:16:20.032 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:16:20.032 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:16:20.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:20.032 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:20.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:20.033 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:16:20.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:20.033 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:16:20.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:20.034 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:16:20.035 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:16:20.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:20.035 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:20.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:20.035 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:16:20.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:20.035 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:16:20.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:20.037 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:16:20.037 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:16:20.037 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:20.037 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:20.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:20.037 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:16:20.037 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:20.037 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:16:20.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:20.040 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:16:20.040 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:16:20.040 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:16:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:20.040 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:16:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:20.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:16:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:20.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:20.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:20.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:20.042 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:16:20.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:25.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:25.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:25.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:25.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:25.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:25.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:25.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:25.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:25.058 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:25.059 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:25.059 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:16:25.061 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:16:25.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:16:25.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:25.062 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:25.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:25.062 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:16:25.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:25.062 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:16:25.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:25.063 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:16:25.064 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:16:25.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:25.064 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:25.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:25.064 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:16:25.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:25.064 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:16:25.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:25.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:16:25.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:16:25.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:25.066 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:25.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:25.066 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:16:25.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:25.066 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:16:25.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:25.068 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:16:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:16:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:16:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:16:25.068 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:16:25.069 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:16:25.069 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:25.074 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:16:25.550 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:16:25.599 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:16:25.601 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:16:25.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:16:25.604 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:16:25.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:16:25.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:16:25.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:16:25.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:16:25.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:16:25.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:16:25.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:16:25.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:16:26.023 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:16:26.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:26.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:26.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:26.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:26.494 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:16:26.967 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:16:27.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:27.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:27.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:27.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:27.440 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:16:27.912 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:16:28.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:28.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:28.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:28.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:28.383 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:16:28.856 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:16:29.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:29.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:29.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:29.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:29.329 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:16:29.801 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:16:30.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:30.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:30.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:30.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:30.272 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:16:30.742 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:16:31.215 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:16:31.688 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:16:32.159 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:16:32.631 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:16:33.104 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:16:33.576 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:16:33.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:16:33.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:16:33.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:33.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:33.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:33.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:33.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:33.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:33.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:33.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:33.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:33.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:33.654 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:16:38.658 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:38.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:38.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:38.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:38.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:38.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:38.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:38.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:38.667 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:38.667 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:38.667 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:16:38.670 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:16:38.671 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:16:38.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:38.671 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:38.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:38.671 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:16:38.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:38.672 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:16:38.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:38.674 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:16:38.674 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:16:38.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:38.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:38.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:38.675 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:16:38.675 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:38.675 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:16:38.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:38.677 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:16:38.677 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:16:38.677 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:38.677 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:38.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:38.677 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:16:38.677 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:38.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:16:38.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:38.680 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:16:38.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:16:38.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:16:38.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:16:38.680 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:16:38.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:16:38.681 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:16:38.681 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:16:38.681 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:38.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:38.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:38.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:38.682 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:16:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:43.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:43.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:43.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:43.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:43.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:43.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:43.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:43.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:43.698 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:43.699 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:43.699 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:16:43.703 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:16:43.703 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:16:43.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:43.704 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:43.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:43.704 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:16:43.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:43.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:16:43.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:43.708 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:16:43.708 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:16:43.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:43.708 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:43.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:43.709 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:16:43.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:43.709 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:16:43.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:43.712 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:16:43.712 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:16:43.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:43.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:43.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:43.713 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:16:43.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:43.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:16:43.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:43.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:43.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:43.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:16:43.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:16:43.720 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:16:43.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:16:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:16:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:43.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:43.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:43.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:43.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:16:44.201 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:16:44.252 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:16:44.254 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:16:44.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:16:44.257 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:16:44.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:16:44.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:16:44.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:16:44.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:16:44.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:16:44.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:16:44.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:16:44.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:16:44.668 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:16:44.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:44.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:44.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:44.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:45.139 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:16:45.610 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:16:45.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:45.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:45.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:45.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:46.081 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:16:46.554 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:16:46.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:46.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:46.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:46.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:47.026 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:16:47.498 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:16:47.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:47.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:47.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:47.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:47.969 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:16:48.442 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:16:48.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:48.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:48.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:48.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:48.915 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:16:49.387 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:16:49.857 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:16:50.331 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:16:50.803 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:16:51.275 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:16:51.746 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:16:52.217 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:16:52.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:16:52.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:16:52.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:52.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:52.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:52.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:52.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:52.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:52.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:52.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:52.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:52.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:52.302 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:16:57.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:57.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:57.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:57.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:57.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:57.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:57.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:57.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:57.321 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:57.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:16:57.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:16:57.324 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:16:57.324 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:16:57.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:57.324 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:57.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:57.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:16:57.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:16:57.324 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:16:57.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:16:57.326 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:16:57.326 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:16:57.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:57.326 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:57.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:57.327 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:16:57.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:16:57.327 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:16:57.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:16:57.328 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:16:57.328 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:16:57.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:57.328 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:16:57.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:57.329 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:16:57.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:16:57.329 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:16:57.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:16:57.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:16:57.331 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:16:57.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:57.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:16:57.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:57.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:16:57.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:16:57.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:16:57.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:16:57.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:16:57.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:16:57.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:16:57.333 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:17:02.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:02.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:02.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:02.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:02.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:02.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:02.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:02.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:02.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:02.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:02.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:17:02.347 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:17:02.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:17:02.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:02.348 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:02.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:02.349 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:17:02.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:02.349 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:17:02.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:02.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:17:02.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:17:02.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:02.350 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:02.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:02.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:17:02.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:02.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:17:02.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:02.353 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:17:02.353 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:17:02.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:02.353 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:02.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:02.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:17:02.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:02.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:17:02.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:17:02.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:17:02.356 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:17:02.356 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:02.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:02.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:02.361 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:17:02.838 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:17:02.885 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:17:02.890 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:17:02.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:17:02.893 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:17:02.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:17:02.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:17:02.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:17:02.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:17:02.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:17:02.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:17:02.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:17:02.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:17:03.308 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:17:03.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:03.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:03.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:03.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:03.781 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:17:04.253 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:17:04.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:04.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:04.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:04.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:04.723 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:17:05.194 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:17:05.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:05.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:05.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:05.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:05.667 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:17:06.140 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:17:06.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:06.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:06.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:06.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:06.612 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:17:07.083 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:17:07.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:07.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:07.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:07.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:07.555 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:17:08.028 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:17:08.500 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:17:08.971 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:17:09.444 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:17:09.917 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:17:10.389 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:17:10.862 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:17:10.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:17:10.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:17:10.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:10.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:10.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:10.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:10.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:10.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:10.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:10.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:10.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:10.935 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:17:10.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:15.937 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:15.937 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:15.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:15.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:15.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:15.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:15.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:15.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:15.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:15.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:15.944 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:17:15.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:17:15.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:17:15.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:15.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:15.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:15.945 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:17:15.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:15.945 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:17:15.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:15.946 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:17:15.946 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:17:15.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:15.946 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:15.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:15.946 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:17:15.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:15.946 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:17:15.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:15.947 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:17:15.947 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:17:15.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:15.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:15.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:15.947 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:17:15.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:15.947 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:17:15.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:15.949 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:17:15.950 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:17:15.950 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:17:15.950 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:15.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:15.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:15.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:15.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:15.952 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:17:15.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:20.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:20.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:20.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:20.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:20.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:20.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:20.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:20.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:20.958 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:20.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:20.958 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:17:20.960 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:17:20.960 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:17:20.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:20.960 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:20.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:20.960 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:17:20.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:20.960 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:17:20.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:20.961 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:17:20.961 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:17:20.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:20.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:20.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:20.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:17:20.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:20.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:17:20.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:20.962 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:17:20.962 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:17:20.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:20.963 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:20.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:20.963 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:17:20.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:20.963 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:17:20.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:20.964 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:17:20.965 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:17:20.965 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:17:20.965 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:20.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:20.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:20.970 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:17:21.434 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:17:21.482 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:17:21.483 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:17:21.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:17:21.484 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:17:21.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:17:21.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:17:21.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:17:21.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:17:21.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:17:21.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:17:21.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:17:21.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:17:21.897 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:17:21.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:21.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:21.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:21.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:22.360 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:17:22.823 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:17:22.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:22.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:22.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:22.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:23.286 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:17:23.750 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:17:23.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:23.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:23.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:23.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:24.214 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:17:24.678 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:17:24.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:24.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:24.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:24.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:25.141 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:17:25.604 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:17:25.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:25.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:25.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:25.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:26.068 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:17:26.531 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:17:26.996 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:17:27.459 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:17:27.922 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:17:28.387 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:17:28.850 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:17:29.314 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:17:29.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:17:29.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:17:29.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:29.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:29.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:29.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:29.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:29.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:29.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:29.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:29.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:29.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:29.527 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:17:34.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:34.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:34.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:34.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:34.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:34.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:34.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:34.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:34.533 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:34.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:34.533 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:17:34.535 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:17:34.535 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:17:34.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:34.535 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:34.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:34.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:17:34.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:34.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:17:34.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:34.538 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:17:34.538 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:17:34.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:34.538 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:34.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:34.538 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:17:34.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:34.538 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:17:34.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:34.540 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:17:34.541 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:17:34.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:34.541 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:34.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:34.541 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:17:34.541 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:34.541 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:17:34.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:17:34.545 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:17:34.545 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:17:34.545 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:17:34.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:34.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:34.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:34.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:17:34.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:34.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:34.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:34.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:34.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:34.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:34.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:34.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:34.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:34.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:34.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:34.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:34.548 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:17:34.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:39.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:39.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:39.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:39.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:39.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:39.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:39.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:39.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:39.555 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:39.555 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:39.555 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:17:39.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:17:39.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:17:39.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:39.557 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:39.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:39.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:17:39.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:39.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:17:39.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:39.558 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:17:39.558 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:17:39.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:39.558 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:39.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:39.558 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:17:39.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:39.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:17:39.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:39.559 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:17:39.559 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:17:39.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:39.559 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:39.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:39.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:17:39.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:39.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:17:39.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:39.561 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:17:39.561 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:17:39.561 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:39.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:39.566 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:17:40.029 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:17:40.079 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:17:40.080 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:17:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:17:40.080 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:17:40.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:17:40.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:17:40.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:17:40.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:17:40.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:17:40.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:17:40.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:17:40.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:17:40.492 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:17:40.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:40.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:40.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:40.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:40.955 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:17:41.418 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:17:41.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:41.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:41.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:41.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:41.882 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:17:42.345 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:17:42.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:42.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:42.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:42.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:42.808 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:17:43.272 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:17:43.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:43.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:43.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:43.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:43.736 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:17:44.203 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:17:44.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:44.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:44.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:44.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:44.668 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:17:45.134 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:17:45.597 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:17:46.060 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:17:46.523 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:17:46.986 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:17:47.449 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:17:47.913 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:17:48.376 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:17:48.840 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:17:49.304 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:17:49.768 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:17:50.231 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:17:50.694 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:17:51.157 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:17:51.619 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:17:52.083 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:17:52.545 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:17:53.008 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:17:53.472 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:17:53.935 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:17:54.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:17:54.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:17:54.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:54.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:54.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:54.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:54.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:54.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:54.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:54.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:54.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:54.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:54.122 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:17:59.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:59.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:59.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:59.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:59.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:59.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:59.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:59.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:59.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:59.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:17:59.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:17:59.130 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:17:59.130 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:17:59.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:59.131 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:59.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:59.131 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:17:59.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:17:59.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:17:59.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:17:59.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:17:59.132 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:17:59.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:59.132 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:59.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:59.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:17:59.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:17:59.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:17:59.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:17:59.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:17:59.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:17:59.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:59.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:17:59.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:59.134 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:17:59.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:17:59.134 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:17:59.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:17:59.138 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:17:59.138 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:17:59.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:59.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:17:59.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:17:59.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:17:59.139 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:18:04.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:04.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:04.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:04.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:04.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:04.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:04.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:04.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:04.147 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:04.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:04.148 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:18:04.149 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:18:04.150 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:18:04.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:04.150 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:04.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:04.150 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:18:04.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:04.150 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:18:04.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:04.151 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:18:04.152 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:18:04.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:04.152 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:04.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:04.152 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:18:04.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:04.152 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:18:04.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:04.153 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:18:04.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:18:04.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:04.154 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:04.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:04.154 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:18:04.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:04.154 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:18:04.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:04.157 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:18:04.157 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:18:04.158 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:04.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:04.163 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:18:04.627 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:18:04.676 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:18:04.676 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:18:04.676 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:18:04.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:18:04.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:18:04.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:18:04.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:18:04.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:18:04.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:18:04.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:18:04.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:18:04.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:18:05.090 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:18:05.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:05.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:05.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:05.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:05.554 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:18:06.020 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:18:06.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:06.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:06.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:06.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:06.484 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:18:06.947 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:18:07.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:07.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:07.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:07.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:07.410 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:18:07.873 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:18:08.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:08.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:08.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:08.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:08.336 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:18:08.798 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:18:09.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:09.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:09.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:09.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:09.261 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:18:09.724 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:18:10.187 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:18:10.651 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:18:11.119 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:18:11.588 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:18:12.059 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:18:12.523 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:18:12.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:18:12.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:18:12.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:12.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:12.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:12.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:12.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:12.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:12.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:12.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:12.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:12.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:12.731 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:18:12.731 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1883 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:12.732 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1883 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:12.732 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1883 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:12.732 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1883 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:12.732 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1883 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:12.732 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1883 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:17.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:17.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:17.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:17.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:17.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:17.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:17.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:17.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:17.731 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:17.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:17.731 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:18:17.732 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:18:17.732 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:18:17.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:17.732 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:17.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:17.732 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:18:17.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:17.732 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:18:17.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:17.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:18:17.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:18:17.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:17.733 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:17.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:17.733 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:18:17.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:17.733 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:18:17.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:17.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:18:17.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:18:17.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:17.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:17.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:17.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:18:17.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:17.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:18:17.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:17.736 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:18:17.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:18:17.737 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:18:17.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:17.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:17.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:17.738 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:18:17.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:22.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:22.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:22.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:22.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:22.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:22.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:22.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:22.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:22.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:22.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:22.744 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:18:22.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:18:22.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:18:22.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:22.745 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:22.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:22.746 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:18:22.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:22.746 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:18:22.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:22.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:18:22.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:18:22.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:22.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:22.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:22.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:18:22.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:22.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:18:22.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:22.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:18:22.748 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:18:22.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:22.748 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:22.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:22.748 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:18:22.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:22.748 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:18:22.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:22.749 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:18:22.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:18:22.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:18:22.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:18:22.750 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:18:22.750 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:22.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:22.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:22.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:18:23.221 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:18:23.262 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:18:23.262 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:18:23.262 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:18:23.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:18:23.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:18:23.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:18:23.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:18:23.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:18:23.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:18:23.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:18:23.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:18:23.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:18:23.686 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:18:23.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:23.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:23.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:23.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:24.149 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:18:24.613 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:18:24.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:24.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:24.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:24.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:25.077 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:18:25.543 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:18:25.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:25.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:25.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:25.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:26.009 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:18:26.479 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:18:26.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:26.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:26.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:26.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:26.951 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:18:27.423 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:18:27.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:27.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:27.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:27.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:27.892 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:18:28.357 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:18:28.824 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:18:29.296 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:18:29.768 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:18:30.239 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:18:30.712 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:18:31.185 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:18:31.656 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:18:32.128 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:18:32.601 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:18:33.073 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:18:33.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:18:33.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:18:33.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:33.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:33.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:33.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:33.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:33.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:33.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:33.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:33.327 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:18:33.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:33.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:33.327 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2300 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:33.327 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2300 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:33.327 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2300 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:33.327 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2300 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:33.327 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2300 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:33.327 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2300 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:18:38.329 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:38.329 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:38.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:38.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:38.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:38.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:38.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:38.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:38.337 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:38.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:38.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:18:38.341 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:18:38.341 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:18:38.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:38.341 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:38.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:38.341 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:18:38.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:38.342 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:18:38.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:38.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:18:38.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:18:38.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:38.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:38.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:38.346 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:18:38.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:38.346 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:18:38.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:38.349 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:18:38.349 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:18:38.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:38.349 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:38.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:38.349 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:18:38.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:38.349 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:18:38.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:38.352 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:18:38.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:18:38.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:18:38.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:18:38.352 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:18:38.353 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:18:38.353 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:18:38.353 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:38.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:38.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:38.354 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:18:38.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:43.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:43.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:43.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:43.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:43.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:43.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:43.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:43.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:43.370 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:43.371 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:43.371 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:18:43.373 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:18:43.373 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:18:43.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:43.374 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:43.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:43.374 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:18:43.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:43.375 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:18:43.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:43.376 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:18:43.376 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:18:43.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:43.376 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:43.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:43.376 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:18:43.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:43.376 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:18:43.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:43.378 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:18:43.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:18:43.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:43.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:43.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:43.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:18:43.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:43.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:18:43.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:43.381 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:18:43.381 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:18:43.381 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:18:43.381 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:18:43.386 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:18:43.864 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:18:43.910 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:18:43.913 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:18:43.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:18:43.915 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:18:43.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:18:43.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:18:43.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:18:43.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:18:43.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:18:43.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:18:43.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:18:43.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:18:44.332 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:18:44.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:44.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:44.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:44.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:44.803 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:18:45.273 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:18:45.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:45.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:45.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:45.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:45.744 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:18:46.218 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:18:46.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:46.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:46.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:46.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:46.690 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:18:47.162 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:18:47.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:47.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:47.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:47.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:47.634 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:18:48.104 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:18:48.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:48.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:48.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:48.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:48.575 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:18:49.048 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:18:49.520 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:18:49.992 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:18:50.463 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:18:50.936 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:18:51.409 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:18:51.881 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:18:52.352 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:18:52.825 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:18:53.297 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:18:53.769 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:18:54.240 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:18:54.713 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:18:54.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:18:54.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:18:54.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:54.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:54.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:54.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:54.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:54.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:54.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:54.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:54.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:54.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:54.962 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:18:59.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:59.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:59.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:59.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:59.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:59.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:59.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:59.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:59.984 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:59.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:18:59.985 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:18:59.989 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:18:59.989 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:18:59.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:59.989 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:59.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:18:59.989 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:18:59.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:18:59.990 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:18:59.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:18:59.992 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:18:59.992 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:18:59.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:59.992 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:59.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:18:59.993 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:18:59.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:18:59.993 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:18:59.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:18:59.995 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:18:59.995 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:18:59.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:59.995 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:18:59.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:18:59.995 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:18:59.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:18:59.995 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:18:59.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:18:59.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:18:59.998 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:59.998 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:59.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:59.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:18:59.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:59.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:59.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:18:59.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:18:59.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:18:59.999 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:18:59.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:18:59.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:18:59.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:05.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:19:05.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:19:05.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:05.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:05.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:05.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:05.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:05.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:19:05.015 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:05.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:19:05.015 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:19:05.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:19:05.017 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:19:05.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:19:05.017 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:05.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:05.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:19:05.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:19:05.018 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:19:05.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:05.020 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:19:05.020 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:19:05.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:19:05.020 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:05.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:05.020 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:19:05.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:19:05.020 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:19:05.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:05.022 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:19:05.022 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:19:05.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:19:05.022 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:05.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:05.022 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:19:05.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:19:05.022 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:19:05.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:05.024 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:19:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:19:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:19:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:19:05.024 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:19:05.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:19:05.025 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:19:05.025 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:05.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:05.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:05.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:05.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:05.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:05.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:05.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:05.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:05.030 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:19:05.505 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:19:05.553 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:19:05.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:19:05.555 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:19:05.556 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:19:05.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:19:05.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:19:05.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:19:05.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:19:05.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:19:05.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:19:05.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:19:05.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:19:05.976 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:19:06.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:06.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:06.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:06.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:06.448 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:19:06.921 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:19:07.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:07.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:07.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:07.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:07.394 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:19:07.866 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:19:08.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:08.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:08.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:08.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:08.337 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:19:08.808 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:19:09.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:09.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:09.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:09.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:09.281 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:19:09.753 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:19:10.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:10.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:10.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:10.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:10.225 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:19:10.696 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:19:11.170 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:19:11.642 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:19:12.114 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:19:12.585 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:19:13.056 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:19:13.527 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:19:14.000 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:19:14.472 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:19:14.944 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:19:15.415 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:19:15.888 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:19:16.361 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:19:16.832 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:19:17.304 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:19:17.777 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:19:18.249 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:19:18.721 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:19:19.192 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:19:19.665 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:19:20.138 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:19:20.610 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:19:21.083 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:19:21.556 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:19:22.027 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:19:22.499 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:19:22.972 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:19:23.444 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:19:23.916 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:19:24.390 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:19:24.862 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:19:25.329 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:19:25.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:19:25.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:19:25.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:25.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:25.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:25.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:25.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:25.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:25.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:19:25.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:19:25.608 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:19:25.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:25.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:30.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:19:30.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:19:30.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:30.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:30.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:30.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:30.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:30.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:19:30.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:30.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:19:30.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:19:30.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:19:30.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:19:30.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:19:30.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:30.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:30.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:19:30.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:19:30.624 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:19:30.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:30.627 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:19:30.627 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:19:30.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:19:30.627 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:30.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:30.627 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:19:30.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:19:30.627 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:19:30.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:30.629 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:19:30.629 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:19:30.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:19:30.629 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:30.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:30.630 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:19:30.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:19:30.630 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:19:30.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:30.632 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:19:30.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:19:30.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:19:30.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:19:30.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:19:30.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:19:30.633 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:19:30.633 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:19:30.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:30.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:30.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:30.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:30.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:30.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:30.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:19:30.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:19:30.635 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:19:30.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:30.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:35.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:19:35.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:19:35.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:35.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:35.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:35.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:35.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:35.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:19:35.652 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:35.652 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:19:35.652 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:19:35.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:19:35.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:19:35.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:19:35.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:35.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:35.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:19:35.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:19:35.656 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:19:35.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:35.658 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:19:35.659 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:19:35.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:19:35.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:35.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:35.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:19:35.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:19:35.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:19:35.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:35.661 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:19:35.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:19:35.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:19:35.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:35.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:35.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:19:35.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:19:35.662 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:19:35.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:35.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:19:35.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:19:35.665 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:19:35.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:35.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:35.670 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:19:36.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:19:36.193 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:19:36.195 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:19:36.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:19:36.197 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:19:36.616 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:19:36.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:36.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:36.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:36.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:37.085 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:19:37.557 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:19:37.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:37.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:37.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:37.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:38.029 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:19:38.499 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:19:38.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:38.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:38.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:38.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:38.971 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:19:39.440 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:19:39.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:39.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:39.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:39.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:39.907 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:19:40.370 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:19:40.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:40.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:40.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:40.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:40.840 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:19:41.304 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:19:41.767 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:19:42.238 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:19:42.714 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:19:43.186 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:19:43.656 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:19:44.132 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:19:44.604 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:19:45.077 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:19:45.550 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:19:46.016 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:19:46.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:46.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:46.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:46.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:46.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:46.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:46.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:46.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:46.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:19:46.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:19:46.213 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:19:46.213 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:19:46.213 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:19:46.213 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:19:46.213 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:19:46.213 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:19:46.213 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:19:51.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:19:51.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:19:51.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:51.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:51.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:51.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:51.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:51.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:19:51.229 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:51.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:19:51.229 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:19:51.235 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:19:51.235 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:19:51.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:19:51.235 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:51.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:51.236 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:19:51.236 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:19:51.236 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:19:51.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:51.239 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:19:51.239 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:19:51.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:19:51.239 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:51.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:51.240 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:19:51.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:19:51.240 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:19:51.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:51.242 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:19:51.242 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:19:51.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:19:51.242 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:51.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:51.243 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:19:51.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:19:51.243 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:19:51.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:51.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:19:51.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:19:51.246 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:19:51.247 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:19:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:51.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:51.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:19:51.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:19:51.248 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:19:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:56.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:19:56.255 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:19:56.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:56.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:56.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:56.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:56.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:19:56.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:19:56.263 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:56.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:19:56.263 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:19:56.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:19:56.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:19:56.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:19:56.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:56.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:19:56.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:19:56.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:19:56.267 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:19:56.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:56.268 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:19:56.268 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:19:56.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:19:56.268 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:56.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:19:56.269 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:19:56.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:19:56.269 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:19:56.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:56.270 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:19:56.270 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:19:56.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:19:56.271 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:19:56.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:19:56.271 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:19:56.271 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:19:56.271 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:19:56.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:19:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:19:56.274 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:19:56.274 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:19:56.274 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:56.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:19:56.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:56.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:56.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:56.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:56.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:56.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:19:56.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:19:56.278 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:19:56.755 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:19:56.797 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:19:56.799 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:19:56.800 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:19:56.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:19:57.227 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:19:57.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:57.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:57.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:57.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:57.699 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:19:58.173 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:19:58.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:58.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:58.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:58.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:58.645 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:19:59.121 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:19:59.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:19:59.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:19:59.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:19:59.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:19:59.593 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:20:00.068 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:20:00.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:00.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:00.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:00.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:00.540 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:20:01.011 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:20:01.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:01.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:01.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:01.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:01.486 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:20:01.958 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:20:02.433 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:20:02.906 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:20:03.380 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:20:03.852 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:20:04.328 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:20:04.800 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:20:05.275 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:20:05.747 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:20:06.221 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:20:06.693 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:20:07.169 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:20:07.641 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:20:08.116 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:20:08.587 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:20:08.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:08.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:08.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:08.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:08.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:08.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:08.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:08.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:08.816 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:20:08.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:08.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:13.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:13.822 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:13.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:13.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:13.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:13.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:13.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:13.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:13.832 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:13.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:13.832 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:20:13.837 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:20:13.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:20:13.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:13.838 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:13.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:13.838 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:20:13.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:13.838 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:20:13.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:13.842 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:20:13.842 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:20:13.842 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:13.842 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:13.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:13.842 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:20:13.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:13.843 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:20:13.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:13.846 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:20:13.846 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:20:13.846 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:13.846 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:13.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:13.846 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:20:13.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:13.847 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:20:13.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:20:13.852 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:20:13.852 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:13.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:13.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:13.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:13.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:13.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:13.854 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:13.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:18.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:18.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:18.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:18.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:18.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:18.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:18.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:18.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:18.869 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:18.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:18.869 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:20:18.872 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:20:18.872 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:20:18.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:18.872 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:18.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:18.872 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:20:18.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:18.873 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:20:18.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:18.875 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:20:18.875 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:20:18.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:18.876 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:18.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:18.876 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:20:18.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:18.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:20:18.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:18.879 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:20:18.880 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:20:18.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:18.880 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:18.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:18.880 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:20:18.880 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:18.880 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:20:18.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:18.886 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:20:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:20:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:20:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:20:18.886 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:20:18.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:20:18.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:20:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:20:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:20:18.887 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:20:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:18.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:18.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:18.887 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:20:18.887 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:20:18.887 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:20:18.888 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:20:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:18.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:18.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:20:18.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:18.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:18.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:18.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:18.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:18.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:18.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:18.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:18.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:18.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:18.893 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:20:19.370 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:20:19.429 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:20:19.431 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:20:19.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:20:19.433 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:20:19.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:20:19.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:20:19.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:20:19.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:20:19.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:20:19.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:20:19.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:20:19.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:20:19.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:20:19.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:20:19.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:20:19.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:20:19.842 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:20:19.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:19.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:19.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:19.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:20.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:20:20.787 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:20:20.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:20.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:20.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:20.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:21.259 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:20:21.731 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:20:21.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:21.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:21.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:21.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:22.205 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:20:22.677 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:20:22.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:22.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:22.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:22.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:23.150 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:20:23.620 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:20:23.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:23.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:23.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:23.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:24.091 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:20:24.562 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:20:25.035 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:20:25.507 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:20:25.979 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:20:26.450 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:20:26.923 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:20:27.396 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:20:27.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:20:27.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:20:27.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:27.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:27.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:27.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:27.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:27.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:27.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:27.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:27.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:27.469 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:20:27.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:32.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:32.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:32.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:32.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:32.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:32.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:32.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:32.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:32.491 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:32.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:32.491 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:20:32.498 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:20:32.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:20:32.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:32.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:32.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:32.499 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:20:32.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:32.499 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:20:32.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:32.503 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:20:32.503 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:20:32.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:32.503 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:32.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:32.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:20:32.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:32.504 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:20:32.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:32.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:20:32.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:20:32.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:32.507 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:32.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:32.507 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:20:32.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:32.507 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:20:32.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:32.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:20:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:20:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:20:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:20:32.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:20:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:32.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:32.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:20:32.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:20:32.514 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:20:32.514 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:20:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:32.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:32.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:20:32.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:32.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:32.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:32.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:32.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:32.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:32.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:32.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:32.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:32.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:32.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:32.518 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:20:32.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:37.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:37.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:37.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:37.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:37.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:37.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:37.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:37.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:37.533 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:37.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:37.533 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:20:37.536 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:20:37.537 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:20:37.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:37.537 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:37.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:37.538 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:20:37.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:37.538 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:20:37.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:37.540 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:20:37.540 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:20:37.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:37.541 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:37.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:37.541 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:20:37.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:37.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:20:37.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:37.543 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:20:37.543 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:20:37.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:37.543 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:37.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:37.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:20:37.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:37.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:20:37.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:37.546 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:20:37.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:20:37.547 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:20:37.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:37.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:37.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:20:38.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:20:38.075 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:20:38.077 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:20:38.078 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:20:38.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:20:38.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:20:38.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:20:38.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:20:38.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:20:38.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:20:38.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:20:38.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:20:38.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:20:38.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:20:38.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:20:38.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:20:38.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:20:38.502 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:20:38.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:38.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:38.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:38.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:38.974 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:20:39.446 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:20:39.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:39.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:39.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:39.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:39.917 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:20:40.390 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:20:40.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:40.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:40.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:40.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:40.862 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:20:41.334 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:20:41.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:41.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:41.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:41.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:41.805 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:20:42.278 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:20:42.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:42.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:42.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:42.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:42.751 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:20:43.223 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:20:43.694 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:20:44.167 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:20:44.639 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:20:45.112 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:20:45.585 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:20:46.057 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:20:46.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:20:46.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:20:46.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:46.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:46.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:46.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:46.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:46.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:46.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:46.135 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:20:46.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:46.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:46.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:46.136 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:20:46.136 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:20:46.136 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:20:46.136 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:20:46.136 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:20:46.136 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:20:51.137 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:51.137 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:51.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:51.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:51.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:51.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:51.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:51.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:51.148 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:51.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:51.149 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:20:51.151 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:20:51.151 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:20:51.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:51.151 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:51.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:51.151 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:20:51.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:51.152 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:20:51.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:51.153 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:20:51.153 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:20:51.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:51.153 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:51.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:51.153 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:20:51.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:51.153 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:20:51.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:51.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:20:51.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:20:51.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:51.154 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:51.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:51.154 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:20:51.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:51.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:20:51.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:51.156 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:20:51.157 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:20:51.157 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:20:51.157 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:51.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:51.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:51.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:51.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:51.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:51.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:51.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:51.158 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:20:51.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:51.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:51.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:56.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:20:56.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:20:56.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:56.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:56.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:56.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:56.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:20:56.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:56.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:56.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:20:56.174 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:20:56.178 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:20:56.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:20:56.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:56.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:56.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:20:56.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:20:56.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:20:56.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:20:56.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:56.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:20:56.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:20:56.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:56.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:56.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:20:56.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:20:56.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:20:56.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:20:56.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:56.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:20:56.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:20:56.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:56.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:20:56.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:20:56.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:20:56.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:20:56.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:20:56.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:20:56.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:20:56.187 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:20:56.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:56.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:20:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:20:56.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:20:56.670 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:20:56.714 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:20:56.716 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:20:56.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:20:56.718 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:20:56.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:20:56.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:20:56.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:20:56.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:20:56.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:20:56.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:20:56.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:20:56.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:20:56.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:20:56.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:20:56.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:20:56.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:20:57.142 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:20:57.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:57.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:57.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:57.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:57.613 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:20:58.087 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:20:58.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:58.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:58.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:58.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:58.559 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:20:59.030 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:20:59.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:20:59.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:20:59.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:20:59.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:20:59.502 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:20:59.975 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:21:00.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:00.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:00.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:00.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:00.447 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:21:00.919 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:21:01.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:01.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:01.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:01.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:01.390 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:21:01.861 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:21:02.332 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:21:02.805 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:21:03.278 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:21:03.750 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:21:04.221 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:21:04.694 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:21:04.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:21:04.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:21:04.766 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=1854 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:04.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:04.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:04.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:04.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:04.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:04.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:04.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:04.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:04.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:04.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:04.773 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:21:04.773 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:04.773 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:04.773 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:04.773 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:04.773 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:04.773 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:09.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:09.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:09.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:09.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:09.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:09.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:09.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:09.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:09.784 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:09.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:09.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:21:09.785 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:21:09.785 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:21:09.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:09.785 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:09.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:09.785 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:21:09.786 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:09.786 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:21:09.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:09.786 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:21:09.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:21:09.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:09.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:09.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:09.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:21:09.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:09.786 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:21:09.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:09.787 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:21:09.787 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:21:09.787 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:09.787 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:09.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:09.788 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:21:09.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:09.788 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:21:09.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:21:09.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:21:09.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:21:09.790 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:21:09.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:09.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:09.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:09.791 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:21:09.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:14.799 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:14.799 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:14.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:14.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:14.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:14.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:14.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:14.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:14.807 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:14.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:14.807 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:21:14.810 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:21:14.810 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:21:14.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:14.810 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:14.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:14.811 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:21:14.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:14.811 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:21:14.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:14.812 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:21:14.812 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:21:14.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:14.813 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:14.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:14.813 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:21:14.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:14.813 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:21:14.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:14.814 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:21:14.815 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:21:14.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:14.815 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:14.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:14.815 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:21:14.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:14.815 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:21:14.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:21:14.817 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:21:14.818 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:21:14.818 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:21:14.818 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:14.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:14.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:21:15.300 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:21:15.344 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:21:15.346 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:21:15.348 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:21:15.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:21:15.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:21:15.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:21:15.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:21:15.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:21:15.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:21:15.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:21:15.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:21:15.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:21:15.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:21:15.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:21:15.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:21:15.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:21:15.772 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:21:15.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:15.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:15.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:15.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:16.243 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:21:16.714 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:21:16.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:16.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:16.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:16.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:17.185 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:21:17.656 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:21:17.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:17.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:17.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:17.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:18.128 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:21:18.601 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:21:18.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:18.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:18.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:18.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:19.073 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:21:19.544 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:21:19.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:19.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:19.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:19.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:20.017 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:21:20.489 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:21:20.962 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:21:21.434 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:21:21.907 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:21:22.379 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:21:22.850 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:21:23.321 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:21:23.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:21:23.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:21:23.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:23.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:23.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:23.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:23.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:23.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:23.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:23.406 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:21:23.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:23.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:23.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:23.407 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:23.407 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:23.407 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:23.407 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:23.407 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:23.407 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:28.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:28.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:28.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:28.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:28.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:28.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:28.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:28.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:28.418 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:28.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:28.418 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:21:28.420 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:21:28.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:21:28.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:28.421 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:28.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:28.422 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:21:28.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:28.422 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:21:28.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:28.423 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:21:28.423 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:21:28.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:28.423 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:28.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:28.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:21:28.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:28.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:21:28.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:28.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:21:28.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:21:28.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:28.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:28.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:28.426 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:21:28.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:28.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:21:28.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:21:28.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:21:28.429 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:21:28.429 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:21:28.429 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:28.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:28.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:28.430 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:21:28.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:33.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:33.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:33.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:33.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:33.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:33.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:33.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:33.446 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:33.447 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:33.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:33.447 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:21:33.450 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:21:33.450 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:21:33.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:33.450 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:33.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:33.451 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:21:33.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:33.451 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:21:33.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:33.452 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:21:33.452 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:21:33.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:33.453 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:33.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:33.453 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:21:33.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:33.453 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:21:33.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:33.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:21:33.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:21:33.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:33.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:33.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:33.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:21:33.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:33.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:21:33.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:33.457 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:21:33.458 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:21:33.458 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:21:33.458 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:33.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:33.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:33.463 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:21:33.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:21:33.989 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:21:33.991 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:21:33.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:21:33.993 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:21:33.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:21:33.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:21:33.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:21:33.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:21:33.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:21:33.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:21:33.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:21:33.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:21:34.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:21:34.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:21:34.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:21:34.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:21:34.408 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:21:34.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:34.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:34.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:34.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:34.880 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:21:35.350 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:21:35.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:35.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:35.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:35.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:35.821 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:21:36.291 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:21:36.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:36.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:36.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:36.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:36.763 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:21:37.233 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:21:37.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:37.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:37.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:37.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:37.704 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:21:38.176 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:21:38.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:38.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:38.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:38.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:38.645 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:21:39.116 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:21:39.587 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:21:40.060 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:21:40.532 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:21:41.004 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:21:41.475 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:21:41.948 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:21:42.421 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:21:42.893 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:21:43.364 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:21:43.838 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:21:44.310 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:21:44.781 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:21:45.255 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:21:45.727 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:21:46.199 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:21:46.670 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:21:47.143 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:21:47.616 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:21:48.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:21:48.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:21:48.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:48.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:48.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:48.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:48.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:48.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:48.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:48.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:48.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:48.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:48.047 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:21:48.047 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3155 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:48.047 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3155 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:48.047 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3155 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:48.048 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3155 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:48.048 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3155 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:48.048 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3155 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:21:53.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:53.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:53.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:53.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:53.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:53.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:53.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:53.056 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:53.056 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:53.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:53.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:21:53.060 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:21:53.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:21:53.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:53.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:53.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:53.062 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:21:53.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:53.062 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:21:53.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:53.064 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:21:53.064 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:21:53.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:53.065 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:53.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:53.065 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:21:53.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:53.065 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:21:53.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:53.067 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:21:53.067 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:21:53.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:53.067 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:53.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:53.068 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:21:53.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:53.068 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:21:53.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:53.071 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:21:53.071 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:21:53.071 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:21:53.072 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:21:53.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:53.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:53.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:53.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:21:53.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:53.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:53.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:53.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:53.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:53.073 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:21:58.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:21:58.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:21:58.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:58.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:58.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:58.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:58.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:21:58.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:58.090 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:58.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:21:58.090 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:21:58.093 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:21:58.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:21:58.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:58.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:58.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:21:58.095 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:21:58.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:21:58.096 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:21:58.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:58.097 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:21:58.098 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:21:58.098 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:58.098 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:58.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:21:58.098 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:21:58.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:21:58.099 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:21:58.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:58.100 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:21:58.100 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:21:58.100 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:58.100 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:21:58.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:21:58.101 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:21:58.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:21:58.101 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:21:58.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:58.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:21:58.105 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:21:58.105 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:21:58.105 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:58.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:21:58.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:21:58.109 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:21:58.586 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:21:58.636 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:21:58.638 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:21:58.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:21:58.640 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:21:58.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:21:58.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:21:58.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:21:58.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:21:58.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:21:58.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:21:58.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:21:58.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:21:58.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:21:58.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:21:58.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:21:58.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:21:59.058 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:21:59.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:21:59.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:21:59.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:21:59.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:21:59.529 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:22:00.000 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:22:00.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:00.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:00.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:00.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:00.474 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:22:00.946 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:22:01.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:01.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:01.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:01.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:01.418 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:22:01.888 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:22:02.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:02.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:02.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:02.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:02.362 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:22:02.834 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:22:03.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:03.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:03.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:03.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:03.305 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:22:03.777 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:22:04.250 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:22:04.723 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:22:05.195 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:22:05.666 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:22:06.139 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:22:06.611 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:22:06.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:22:06.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:22:06.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:06.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:06.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:06.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:06.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:06.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:06.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:06.690 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:22:06.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:06.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:06.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:06.691 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:06.691 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:06.691 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:06.691 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:06.691 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:06.691 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:11.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:11.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:11.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:11.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:11.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:11.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:11.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:11.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:11.704 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:11.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:11.704 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:22:11.706 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:22:11.706 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:22:11.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:11.707 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:11.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:11.707 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:22:11.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:11.708 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:22:11.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:11.709 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:22:11.709 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:22:11.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:11.709 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:11.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:11.709 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:22:11.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:11.709 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:22:11.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:11.711 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:22:11.711 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:22:11.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:11.711 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:11.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:11.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:22:11.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:11.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:22:11.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:11.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:22:11.714 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:22:11.714 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:22:11.714 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:11.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:11.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:11.715 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:22:11.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:16.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:16.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:16.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:16.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:16.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:16.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:16.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:16.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:16.733 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:16.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:16.734 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:22:16.736 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:22:16.737 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:22:16.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:16.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:16.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:16.738 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:22:16.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:16.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:22:16.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:16.740 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:22:16.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:22:16.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:16.740 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:16.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:16.740 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:22:16.741 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:16.741 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:22:16.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:16.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:22:16.742 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:22:16.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:16.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:16.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:16.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:22:16.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:16.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:22:16.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:16.746 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:22:16.746 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:22:16.746 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:22:16.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:16.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:16.751 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:22:17.229 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:22:17.277 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:22:17.278 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:22:17.279 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:22:17.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:22:17.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:22:17.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:22:17.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:22:17.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:22:17.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:22:17.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:22:17.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:22:17.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:22:17.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:22:17.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:22:17.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:22:17.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:22:17.701 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:22:17.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:17.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:17.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:17.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:18.173 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:22:18.646 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:22:18.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:18.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:18.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:18.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:19.118 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:22:19.590 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:22:19.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:19.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:19.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:19.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:20.061 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:22:20.535 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:22:20.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:20.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:20.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:20.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:21.007 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:22:21.476 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:22:21.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:21.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:21.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:21.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:21.948 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:22:22.416 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:22:22.887 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:22:23.358 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:22:23.825 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:22:24.295 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:22:24.765 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:22:25.237 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:22:25.709 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:22:26.178 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:22:26.649 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:22:27.122 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:22:27.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:22:27.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:22:27.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:27.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:27.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:27.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:27.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:27.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:27.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:27.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:27.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:27.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:27.333 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:22:32.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:32.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:32.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:32.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:32.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:32.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:32.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:32.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:32.347 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:32.347 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:32.347 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:22:32.351 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:22:32.351 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:22:32.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:32.352 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:32.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:32.353 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:22:32.353 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:32.353 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:22:32.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:32.355 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:22:32.355 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:22:32.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:32.355 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:32.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:32.356 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:22:32.356 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:32.356 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:22:32.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:32.358 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:22:32.358 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:22:32.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:32.358 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:32.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:32.358 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:22:32.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:32.358 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:22:32.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:22:32.362 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:22:32.362 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:22:32.362 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:32.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:32.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:32.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:22:32.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:32.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:32.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:32.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:32.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:32.364 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:22:32.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:37.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:37.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:37.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:37.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:37.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:37.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:37.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:37.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:37.380 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:37.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:37.381 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:22:37.383 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:22:37.383 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:22:37.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:37.383 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:37.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:37.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:22:37.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:37.384 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:22:37.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:37.385 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:22:37.385 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:22:37.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:37.386 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:37.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:37.386 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:22:37.386 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:37.386 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:22:37.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:37.387 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:22:37.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:22:37.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:37.388 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:37.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:37.388 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:22:37.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:37.388 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:22:37.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:37.390 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:22:37.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:22:37.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:22:37.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:22:37.390 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:22:37.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:22:37.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:22:37.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:22:37.391 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:22:37.391 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:22:37.391 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:37.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:37.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:37.395 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:22:37.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:22:37.923 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:22:37.925 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:22:37.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:22:37.927 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:22:37.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:22:37.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:22:37.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:22:37.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:22:37.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:22:37.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:22:37.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:22:37.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:22:37.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:22:37.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:22:37.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:22:37.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:22:38.345 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:22:38.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:38.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:38.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:38.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:38.816 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:22:39.287 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:22:39.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:39.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:39.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:39.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:39.758 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:22:40.228 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:22:40.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:40.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:40.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:40.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:40.702 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:22:41.173 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:22:41.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:41.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:41.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:41.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:41.646 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:22:42.116 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:22:42.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:42.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:42.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:42.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:42.590 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:22:43.062 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:22:43.534 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:22:44.005 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:22:44.478 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:22:44.951 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:22:45.423 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:22:45.894 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:22:46.365 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:22:46.835 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:22:47.306 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:22:47.779 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:22:48.252 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:22:48.719 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:22:48.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:22:48.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:22:48.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:48.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:48.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:48.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:48.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:48.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:48.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:48.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:48.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:48.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:48.977 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:22:48.977 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2506 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:48.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2506 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:48.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2506 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:48.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2506 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:48.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2506 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:48.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2506 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:48.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2506 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:48.979 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2506 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:22:53.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:53.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:53.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:53.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:53.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:53.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:53.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:53.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:53.988 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:53.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:53.988 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:22:53.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:22:53.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:22:53.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:53.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:53.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:53.990 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:22:53.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:53.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:22:53.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:53.992 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:22:53.992 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:22:53.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:53.993 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:53.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:53.993 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:22:53.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:53.993 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:22:53.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:53.994 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:22:53.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:22:53.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:53.995 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:53.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:53.995 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:22:53.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:53.995 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:22:53.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:53.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:22:53.998 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:22:53.998 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:22:53.998 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:53.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:53.998 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:53.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:59.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:22:59.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:22:59.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:59.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:59.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:59.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:59.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:22:59.021 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:59.021 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:59.021 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:22:59.021 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:22:59.022 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:22:59.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:22:59.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:59.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:59.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:22:59.022 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:22:59.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:22:59.022 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:22:59.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:22:59.023 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:22:59.023 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:22:59.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:59.023 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:59.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:22:59.023 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:22:59.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:22:59.024 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:22:59.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:22:59.024 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:22:59.025 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:22:59.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:59.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:22:59.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:22:59.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:22:59.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:22:59.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:22:59.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:22:59.026 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:22:59.027 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:22:59.027 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:22:59.027 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:59.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:22:59.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:22:59.032 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:22:59.498 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:22:59.568 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:22:59.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:22:59.570 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:22:59.572 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:22:59.969 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:23:00.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:00.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:00.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:00.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:00.438 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:23:00.907 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:23:01.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:01.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:01.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:01.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:01.375 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:23:01.844 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:23:02.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:02.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:02.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:02.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:02.310 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:23:02.781 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:23:03.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:03.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:03.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:03.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:03.250 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:23:03.716 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:23:04.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:04.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:04.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:04.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:04.180 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:23:04.645 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:23:05.110 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:23:05.577 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:23:06.046 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:23:06.509 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:23:06.973 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:23:07.437 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:23:07.901 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:23:08.366 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:23:08.830 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:23:09.296 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:23:09.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:09.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:09.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:09.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:09.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:09.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:09.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:09.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:09.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:23:09.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:23:09.584 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:23:09.584 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2309 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:09.584 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2309 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:09.584 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2309 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:09.584 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2309 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:09.584 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2309 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:09.584 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2309 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:14.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:23:14.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:23:14.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:14.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:14.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:14.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:14.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:14.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:23:14.588 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:14.588 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:23:14.588 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:23:14.589 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:23:14.589 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:23:14.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:23:14.589 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:14.589 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:14.589 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:23:14.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:23:14.589 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:23:14.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:14.591 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:23:14.591 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:23:14.591 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:23:14.591 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:14.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:14.591 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:23:14.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:23:14.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:23:14.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:14.593 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:23:14.593 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:23:14.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:23:14.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:14.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:14.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:23:14.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:23:14.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:23:14.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:23:14.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:23:14.597 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:23:14.597 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:14.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:14.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:23:14.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:23:14.599 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:23:14.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:19.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:23:19.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:23:19.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:19.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:19.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:19.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:19.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:19.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:23:19.608 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:19.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:23:19.608 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:23:19.610 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:23:19.610 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:23:19.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:23:19.610 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:19.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:19.610 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:23:19.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:23:19.610 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:23:19.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:19.612 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:23:19.612 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:23:19.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:23:19.612 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:19.612 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:23:19.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:19.613 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:23:19.613 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:23:19.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:19.614 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:23:19.614 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:23:19.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:23:19.614 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:19.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:19.614 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:23:19.614 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:23:19.614 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:23:19.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:19.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:23:19.617 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:23:19.617 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:23:19.617 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:19.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:19.621 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:23:20.086 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:23:20.133 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:23:20.133 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:23:20.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:23:20.134 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:23:20.556 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:23:20.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:20.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:20.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:20.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:21.025 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:23:21.490 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:23:21.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:21.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:21.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:21.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:21.954 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:23:22.418 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:23:22.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:22.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:22.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:22.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:22.883 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:23:23.347 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:23:23.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:23.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:23.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:23.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:23.811 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:23:24.276 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:23:24.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:24.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:24.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:24.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:24.743 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:23:25.209 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:23:25.674 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:23:26.138 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:23:26.603 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:23:27.068 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:23:27.535 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:23:27.999 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:23:28.467 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:23:28.939 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:23:29.411 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:23:29.886 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:23:30.358 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:23:30.833 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:23:31.304 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:23:31.776 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:23:32.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:32.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:32.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:32.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:32.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:32.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:32.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:32.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:32.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:23:32.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:23:32.145 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:23:32.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2734 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:32.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2734 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:32.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2734 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:32.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2734 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:32.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2734 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:32.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2734 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:32.145 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2734 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:23:37.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:23:37.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:23:37.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:37.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:37.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:37.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:37.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:37.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:23:37.159 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:37.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:23:37.159 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:23:37.163 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:23:37.163 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:23:37.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:23:37.163 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:37.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:37.163 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:23:37.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:23:37.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:23:37.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:37.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:23:37.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:23:37.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:23:37.166 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:37.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:37.167 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:23:37.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:23:37.167 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:23:37.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:37.168 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:23:37.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:23:37.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:23:37.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:37.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:37.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:23:37.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:23:37.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:23:37.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:23:37.172 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:23:37.172 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:37.172 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:23:37.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:37.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:37.177 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:23:37.655 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:23:37.699 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:23:37.702 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:23:37.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:23:37.704 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:23:37.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:23:37.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:23:37.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:23:37.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:23:37.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:23:37.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:23:37.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:23:37.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:23:38.127 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:23:38.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:38.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:38.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:38.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:38.598 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:23:39.069 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:23:39.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:39.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:39.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:39.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:39.540 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:23:40.013 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:23:40.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:40.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:40.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:40.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:40.485 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:23:40.958 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:23:41.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:41.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:41.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:41.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:41.431 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:23:41.903 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:23:42.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:42.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:42.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:42.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:42.376 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:23:42.846 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:23:43.319 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:23:43.792 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:23:44.264 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:23:44.735 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:23:45.208 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:23:45.681 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:23:46.152 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:23:46.624 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:23:47.097 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:23:47.570 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:23:48.042 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:23:48.513 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:23:48.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:23:48.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:23:48.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:48.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:48.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:48.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:48.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:48.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:48.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:23:48.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:23:48.754 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:23:48.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:48.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:53.760 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:23:53.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:23:53.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:53.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:53.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:53.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:53.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:23:53.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:23:53.770 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:53.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:23:53.770 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:23:53.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:23:53.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:23:53.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:23:53.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:53.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:23:53.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:23:53.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:23:53.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:23:53.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:53.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:23:53.775 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:23:53.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:23:53.775 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:53.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:23:53.775 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:23:53.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:23:53.775 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:23:53.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:53.776 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:23:53.776 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:23:53.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:23:53.776 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:23:53.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:23:53.776 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:23:53.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:23:53.776 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:23:53.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:53.778 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:23:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:23:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:23:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:23:53.778 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:23:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:23:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:23:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:23:53.779 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:23:53.779 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:23:53.779 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:23:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:23:53.783 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:23:54.261 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:23:54.306 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:23:54.308 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:23:54.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:23:54.310 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:23:54.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:23:54.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:23:54.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:23:54.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:23:54.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:23:54.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:23:54.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:23:54.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:23:54.734 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:23:54.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:54.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:54.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:54.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:55.205 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:23:55.678 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:23:55.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:55.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:55.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:55.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:56.151 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:23:56.623 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:23:56.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:56.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:56.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:56.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:57.094 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:23:57.566 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:23:57.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:57.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:57.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:57.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:58.039 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:23:58.511 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:23:58.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:23:58.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:23:58.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:23:58.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:23:58.982 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:23:59.456 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:23:59.928 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:24:00.400 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:24:00.871 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:24:01.344 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:24:01.817 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:24:02.289 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:24:02.760 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:24:03.233 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:24:03.705 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:24:04.178 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:24:04.651 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:24:05.123 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:24:05.595 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:24:06.066 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:24:06.540 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:24:07.012 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:24:07.484 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:24:07.955 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:24:08.425 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:24:08.897 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:24:09.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:09.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:09.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:09.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:09.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:09.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:09.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:09.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:09.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:09.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:09.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:24:09.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:24:09.360 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:24:14.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:24:14.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:24:14.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:14.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:14.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:14.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:14.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:14.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:24:14.375 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:14.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:24:14.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:24:14.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:24:14.378 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:24:14.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:24:14.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:14.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:14.379 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:24:14.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:24:14.379 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:24:14.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:14.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:24:14.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:24:14.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:24:14.381 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:14.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:14.381 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:24:14.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:24:14.381 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:24:14.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:14.383 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:24:14.383 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:24:14.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:24:14.383 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:14.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:14.383 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:24:14.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:24:14.383 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:24:14.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:14.385 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:24:14.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:24:14.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:24:14.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:24:14.385 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:24:14.386 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:24:14.386 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:24:14.386 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:14.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:14.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:14.391 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:24:14.869 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:24:14.913 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:24:14.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:14.915 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:24:14.918 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:24:14.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:14.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:14.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:14.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:14.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:14.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:14.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:14.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:14.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:14.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:14.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:14.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:14.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:14.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:14.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:14.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:14.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:14.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:14.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:24:14.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:24:14.976 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:24:14.977 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.977 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.977 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.977 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.977 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.977 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.978 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:14.979 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:19.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:24:19.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:24:19.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:19.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:19.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:19.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:19.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:19.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:24:19.988 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:19.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:24:19.988 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:24:19.991 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:24:19.991 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:24:19.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:24:19.991 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:19.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:19.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:24:19.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:24:19.992 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:24:19.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:19.994 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:24:19.994 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:24:19.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:24:19.994 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:19.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:19.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:24:19.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:24:19.994 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:24:19.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:19.996 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:24:19.996 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:24:19.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:24:19.996 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:19.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:19.996 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:24:19.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:24:19.996 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:24:19.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:19.999 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:24:19.999 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:24:19.999 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:24:20.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:20.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:20.004 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:24:20.480 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:24:20.520 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:24:20.520 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:24:20.521 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:24:20.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:20.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:20.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:20.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:20.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:20.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:20.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:20.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:20.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:20.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:20.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:20.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:20.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:20.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:20.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:20.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:20.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:20.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:20.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:20.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:20.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:20.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:20.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:20.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:20.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:20.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:20.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:20.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:20.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:20.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:20.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:20.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:20.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:20.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:20.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:20.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:20.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:20.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:20.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:20.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:20.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:20.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:20.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:20.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:20.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:20.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:20.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:20.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:20.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:20.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:20.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:20.908 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:20.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:20.948 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:24:20.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:20.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:20.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:20.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:21.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:21.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:21.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:21.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:21.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:21.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:21.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:21.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:21.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:21.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:21.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:21.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:21.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:21.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:21.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:21.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:21.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:21.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:21.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:21.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:21.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:21.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:21.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:21.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:21.418 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:24:21.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:21.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:21.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:21.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:21.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:21.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:21.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:21.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:21.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:21.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:21.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:24:21.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:24:21.758 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:24:21.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:21.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:21.759 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=381 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:21.759 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=381 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:21.759 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:21.759 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:21.759 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:21.760 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:26.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:24:26.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:24:26.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:26.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:26.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:26.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:26.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:26.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:24:26.766 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:26.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:24:26.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:24:26.770 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:24:26.770 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:24:26.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:24:26.771 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:26.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:26.771 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:24:26.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:24:26.771 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:24:26.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:26.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:24:26.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:24:26.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:24:26.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:26.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:26.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:24:26.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:24:26.775 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:24:26.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:26.777 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:24:26.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:24:26.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:24:26.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:26.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:26.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:24:26.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:24:26.778 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:24:26.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:26.781 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:24:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:24:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:24:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:24:26.781 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:24:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:24:26.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:24:26.782 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:24:26.782 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:24:26.782 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:26.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:26.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:26.787 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:24:27.266 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:24:27.314 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:24:27.316 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:24:27.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:27.319 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:24:27.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:27.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:27.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:27.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:27.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:27.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:27.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:27.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:27.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:27.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:27.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:27.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:27.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:27.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:27.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:27.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:27.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:24:27.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:27.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:27.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:27.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:28.206 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:24:28.676 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:24:28.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:28.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:28.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:28.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:29.147 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:24:29.618 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:24:29.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:29.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:29.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:29.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:30.091 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:24:30.564 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:24:30.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:30.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:30.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:30.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:31.034 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:24:31.505 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:24:31.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:31.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:31.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:31.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:31.976 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:24:32.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:32.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:32.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:32.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:32.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:32.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:32.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:32.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:32.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:32.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:32.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:32.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:32.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:32.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:32.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:32.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:32.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:32.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:32.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:32.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:32.447 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:24:32.917 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:24:33.389 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:24:33.860 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:24:34.332 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:24:34.804 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:24:35.277 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:24:35.748 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:24:36.219 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:24:36.690 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:24:37.160 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:24:37.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:37.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:37.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:37.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:37.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:37.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:37.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:37.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:37.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:37.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:37.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:37.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:37.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:37.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:37.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:37.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:37.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:37.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:37.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:37.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:37.630 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:24:38.101 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:24:38.572 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:24:39.043 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:24:39.514 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:24:39.992 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:24:40.459 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:24:40.930 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:24:41.401 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:24:41.872 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:24:42.343 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:24:42.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:42.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:42.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:42.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:42.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:42.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:42.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:42.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:42.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:42.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:42.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:42.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:42.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:42.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:42.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:42.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:42.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:42.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:42.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:42.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:42.813 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:24:43.284 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:24:43.754 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:24:44.225 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:24:44.697 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:24:45.167 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:24:45.641 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:24:46.113 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:24:46.585 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:24:47.056 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:24:47.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:47.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:47.529 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:24:47.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:47.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:47.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:47.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:47.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:47.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:47.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:47.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:47.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:24:47.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:24:47.546 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:24:47.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:47.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:47.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:47.547 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:47.547 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:47.547 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:47.547 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:47.547 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:24:52.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:24:52.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:24:52.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:52.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:52.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:52.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:52.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:24:52.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:24:52.558 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:52.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:24:52.558 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:24:52.562 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:24:52.562 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:24:52.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:24:52.562 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:52.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:24:52.563 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:24:52.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:24:52.564 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:24:52.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:52.565 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:24:52.565 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:24:52.565 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:24:52.566 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:52.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:24:52.566 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:24:52.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:24:52.566 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:24:52.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:52.568 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:24:52.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:24:52.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:24:52.568 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:24:52.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:24:52.568 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:24:52.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:24:52.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:24:52.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:52.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:24:52.572 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:24:52.572 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:24:52.572 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:52.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:52.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:24:52.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:24:52.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:52.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:52.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:52.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:52.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:52.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:24:52.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:24:52.576 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:24:53.055 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:24:53.100 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:24:53.101 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:24:53.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:53.103 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:24:53.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:53.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:53.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:53.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:53.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:53.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:53.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:53.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:53.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:53.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:53.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:53.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:53.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:53.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:53.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:53.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:53.523 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:24:53.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:53.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:53.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:53.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:53.993 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:24:54.464 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:24:54.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:54.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:54.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:54.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:54.937 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:24:55.405 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:24:55.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:55.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:55.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:55.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:55.877 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:24:56.350 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:24:56.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:56.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:56.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:56.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:56.823 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:24:57.295 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:24:57.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:24:57.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:24:57.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:24:57.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:24:57.766 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:24:58.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:58.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:58.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:58.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:58.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:58.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:58.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:58.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:24:58.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:24:58.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:24:58.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:24:58.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:58.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:58.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:58.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:24:58.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:24:58.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:24:58.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:24:58.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:58.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:24:58.236 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:24:58.707 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:24:59.178 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:24:59.651 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:25:00.124 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:25:00.596 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:25:01.069 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:25:01.542 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:25:02.014 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:25:02.484 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:25:02.956 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:25:03.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:03.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:03.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:03.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:03.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:03.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:03.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:03.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:03.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:03.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:03.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:03.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:03.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:03.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:03.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:25:03.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:25:03.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:03.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:03.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:03.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:03.423 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:25:03.892 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:25:04.359 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:25:04.823 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:25:05.287 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:25:05.751 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:25:06.217 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:25:06.689 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:25:07.161 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:25:07.632 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:25:08.103 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:25:08.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:08.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:08.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:08.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:08.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:08.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:08.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:08.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:08.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:08.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:08.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:08.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:08.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:08.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:08.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:25:08.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:25:08.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:08.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:08.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:08.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:08.573 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:25:09.047 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:25:09.519 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:25:09.991 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:25:10.462 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:25:10.936 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:25:11.408 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:25:11.875 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:25:12.344 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:25:12.816 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:25:13.288 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:25:13.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:13.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:13.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:13.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:13.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:13.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:13.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:13.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:13.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:25:13.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:25:13.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:25:13.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:25:13.361 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:25:13.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:25:13.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:25:13.362 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4505 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.362 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4505 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.362 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4505 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.362 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4505 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.362 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4505 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.363 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4505 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.363 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4506 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.363 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4506 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.363 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4506 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.363 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4506 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.363 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4506 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4506 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4506 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:13.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4506 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:18.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:25:18.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:25:18.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:25:18.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:25:18.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:25:18.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:25:18.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:25:18.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:25:18.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:25:18.374 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:25:18.374 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:25:18.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:25:18.379 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:25:18.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:25:18.379 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:25:18.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:25:18.380 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:25:18.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:25:18.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:25:18.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:18.382 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:25:18.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:25:18.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:25:18.383 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:25:18.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:25:18.383 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:25:18.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:25:18.384 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:25:18.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:18.385 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:25:18.386 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:25:18.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:25:18.386 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:25:18.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:25:18.386 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:25:18.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:25:18.386 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:25:18.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:25:18.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:25:18.390 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:25:18.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:18.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:18.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:18.395 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:25:18.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:25:18.917 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:25:18.919 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:25:18.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:18.921 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:25:18.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:18.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:18.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:18.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:18.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:18.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:18.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:18.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:18.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:18.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:18.966 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:25:18.967 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:25:19.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:19.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:19.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:19.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:19.340 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:25:19.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:19.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:19.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:19.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:19.811 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:25:20.282 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:25:20.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:20.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:20.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:20.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:20.753 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:25:21.223 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:25:21.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:21.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:21.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:21.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:21.694 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:25:22.165 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:25:22.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:22.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:22.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:22.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:22.636 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:25:23.109 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:25:23.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:23.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:23.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:23.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:23.582 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:25:24.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:24.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:24.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:24.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:24.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:24.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:24.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:24.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:24.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:24.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:24.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:24.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:24.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:24.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:24.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:25:24.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:25:24.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:24.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:24.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:24.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:24.053 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:25:24.525 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:25:24.995 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:25:25.466 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:25:25.939 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:25:26.412 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:25:26.884 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:25:27.356 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:25:27.829 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:25:28.301 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:25:28.773 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:25:29.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:29.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:29.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:29.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:29.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:29.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:29.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:29.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:29.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:29.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:29.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:29.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:29.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:29.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:29.084 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:25:29.084 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:25:29.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:29.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:29.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:29.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:29.243 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:25:29.715 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:25:30.188 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:25:30.661 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:25:31.129 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:25:31.599 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:25:32.070 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:25:32.543 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:25:33.016 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:25:33.488 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:25:33.959 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:25:34.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:34.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:34.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:34.107 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=3400 tn=3 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:25:34.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:34.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:34.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:34.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:34.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:34.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:34.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:34.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:34.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:34.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:34.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:25:34.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:25:34.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:34.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:34.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:34.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:34.430 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:25:34.903 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:25:35.375 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:25:35.847 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:25:36.318 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:25:36.791 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:25:37.264 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:25:37.736 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:25:38.207 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:25:38.676 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:25:39.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:39.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:39.143 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:25:39.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:39.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:39.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:39.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:39.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:39.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:39.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:25:39.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:25:39.155 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:25:39.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:25:39.155 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:25:39.155 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:25:39.155 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:25:44.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:25:44.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:25:44.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:25:44.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:25:44.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:25:44.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:25:44.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:25:44.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:25:44.169 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:25:44.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:25:44.169 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:25:44.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:25:44.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:25:44.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:25:44.172 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:25:44.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:25:44.172 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:25:44.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:25:44.172 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:25:44.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:44.173 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:25:44.174 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:25:44.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:25:44.174 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:25:44.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:25:44.174 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:25:44.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:25:44.174 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:25:44.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:44.177 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:25:44.178 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:25:44.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:25:44.178 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:25:44.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:25:44.178 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:25:44.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:25:44.178 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:25:44.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:44.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:25:44.184 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:25:44.184 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:25:44.184 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:44.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:44.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:25:44.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:25:44.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:44.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:25:44.189 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:25:44.667 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:25:44.712 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:25:44.715 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:25:44.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:44.717 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:25:44.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:44.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:44.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:44.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:44.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:44.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:44.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:44.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:44.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:44.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:44.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:25:44.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:25:44.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:44.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:44.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:44.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:45.139 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:25:45.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:45.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:45.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:45.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:45.610 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:25:46.081 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:25:46.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:46.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:46.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:46.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:46.554 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:25:47.027 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:25:47.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:47.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:47.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:47.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:47.499 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:25:47.973 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:25:48.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:48.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:48.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:48.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:48.441 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:25:48.912 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:25:49.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:25:49.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:25:49.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:25:49.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:25:49.382 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:25:49.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:49.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:49.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:49.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:49.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:49.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:49.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:49.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:49.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:49.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:49.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:49.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:49.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:49.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:49.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:25:49.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:25:49.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:49.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:49.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:49.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:49.853 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:25:50.324 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:25:50.795 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:25:51.266 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:25:51.737 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:25:52.210 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:25:52.682 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:25:53.155 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:25:53.625 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:25:54.096 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:25:54.567 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:25:54.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:54.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:54.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:54.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:54.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:54.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:54.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:54.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:54.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:54.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:54.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:54.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:54.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:54.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:54.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:25:54.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:25:54.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:54.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:54.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:54.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:55.037 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:25:55.509 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:25:55.979 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:25:56.452 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:25:56.925 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:25:57.396 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:25:57.868 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:25:58.338 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:25:58.809 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:25:59.280 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:25:59.751 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:25:59.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:59.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:59.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:59.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:59.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:59.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:59.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:59.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:25:59.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:25:59.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:25:59.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:25:59.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:59.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:59.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:59.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:25:59.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:25:59.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:25:59.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:25:59.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:25:59.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:00.221 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:26:00.692 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:26:01.166 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:26:01.638 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:26:02.110 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:26:02.581 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:26:03.055 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:26:03.525 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:26:03.997 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:26:04.469 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:26:04.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:04.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:04.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:04.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:04.940 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:26:04.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:04.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:04.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:04.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:04.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:26:04.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:26:04.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:26:04.955 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:26:04.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:26:04.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:26:04.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:26:04.956 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:04.956 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:04.956 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:04.956 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:04.956 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:04.956 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:09.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:26:09.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:26:09.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:26:09.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:26:09.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:26:09.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:26:09.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:26:09.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:26:09.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:26:09.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:26:09.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:26:09.969 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:26:09.969 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:26:09.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:26:09.969 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:26:09.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:26:09.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:26:09.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:26:09.970 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:26:09.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:09.973 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:26:09.973 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:26:09.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:26:09.973 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:26:09.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:26:09.974 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:26:09.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:26:09.974 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:26:09.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:09.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:26:09.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:26:09.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:26:09.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:26:09.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:26:09.977 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:26:09.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:26:09.978 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:26:09.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:09.982 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:26:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:26:09.982 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:26:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:26:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:26:09.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:26:09.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:26:09.983 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:26:09.983 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:09.983 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:09.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:09.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:09.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:09.988 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:26:10.464 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:26:10.510 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:26:10.512 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:26:10.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:10.515 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:26:10.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:10.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:10.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:10.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:10.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:10.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:10.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:10.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:10.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:10.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:10.567 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:26:10.567 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:26:10.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:10.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:10.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:10.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:10.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:10.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:10.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:10.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:10.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:10.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:10.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:10.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:10.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:10.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:10.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:10.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:10.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:10.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:10.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:26:10.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:26:10.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:10.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:10.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:10.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:10.936 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:26:10.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:10.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:10.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:10.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:11.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:11.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:11.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:11.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:11.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:11.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:11.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:11.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:11.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:11.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:11.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:11.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:11.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:11.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:11.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:26:11.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:26:11.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:11.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:11.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:11.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:11.407 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:26:11.878 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:26:11.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:11.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:11.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:11.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:12.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:12.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:12.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:12.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:12.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:12.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:12.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:12.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:12.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:12.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:12.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:12.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:12.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:12.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:12.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:26:12.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:26:12.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:12.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:12.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:12.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:12.349 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:26:12.822 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:26:12.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:12.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:12.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:12.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:12.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:12.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:12.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:12.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:12.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:26:12.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:26:12.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:26:12.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:26:12.920 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:26:12.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:26:12.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:26:12.920 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:12.920 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:12.920 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=636 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:12.920 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=636 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:12.920 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=636 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:12.920 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=636 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:26:17.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:26:17.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:26:17.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:26:17.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:26:17.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:26:17.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:26:17.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:26:17.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:26:17.938 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:26:17.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:26:17.938 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:26:17.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:26:17.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:26:17.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:26:17.941 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:26:17.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:26:17.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:26:17.941 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:26:17.941 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:26:17.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:17.942 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:26:17.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:26:17.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:26:17.942 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:26:17.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:26:17.943 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:26:17.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:26:17.943 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:26:17.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:17.944 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:26:17.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:26:17.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:26:17.944 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:26:17.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:26:17.944 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:26:17.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:26:17.944 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:26:17.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:26:17.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:26:17.946 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:26:17.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:17.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:26:17.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:26:17.951 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:26:18.428 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:26:18.472 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:26:18.475 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:26:18.477 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:26:18.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:18.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:18.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:18.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:18.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:18.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:18.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:18.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:18.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:18.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:18.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:18.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:26:18.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:26:18.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:18.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:18.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:18.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:18.898 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:26:18.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:18.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:18.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:18.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:19.371 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:26:19.843 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:26:19.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:19.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:19.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:19.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:20.316 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:26:20.789 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:26:20.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:20.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:20.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:20.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:21.261 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:26:21.734 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:26:21.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:21.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:21.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:21.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:22.207 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:26:22.677 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:26:22.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:26:22.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:26:22.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:26:22.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:26:23.148 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:26:23.618 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:26:24.091 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:26:24.564 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:26:25.034 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:26:25.507 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:26:25.980 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:26:26.452 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:26:26.923 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:26:27.396 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:26:27.869 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:26:28.341 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:26:28.812 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:26:29.285 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:26:29.758 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:26:30.230 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:26:30.701 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:26:31.173 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:26:31.643 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:26:32.116 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:26:32.588 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:26:33.061 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:26:33.534 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:26:34.007 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:26:34.479 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:26:34.950 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:26:35.421 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:26:35.894 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:26:36.365 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:26:36.833 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:26:37.304 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:26:37.774 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:26:38.245 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:26:38.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:38.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:38.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:38.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:38.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:38.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:38.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:38.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:38.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:38.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:38.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:38.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:38.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:38.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:38.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:26:38.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:26:38.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:38.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:38.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:38.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:38.714 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:26:39.182 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:26:39.653 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:26:40.124 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:26:40.595 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:26:41.066 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:26:41.536 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:26:42.007 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:26:42.478 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:26:42.948 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:26:43.419 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:26:43.890 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:26:44.361 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:26:44.832 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:26:45.302 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:26:45.774 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:26:46.247 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:26:46.719 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:26:47.190 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:26:47.662 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:26:48.133 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:26:48.603 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:26:49.075 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:26:49.547 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:26:50.020 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:26:50.492 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:26:50.966 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:26:51.438 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:26:51.910 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:26:52.383 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:26:52.856 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:26:53.328 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:26:53.799 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 04:26:54.270 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 04:26:54.740 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 04:26:55.211 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 04:26:55.682 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 04:26:56.180 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 04:26:56.652 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 04:26:57.123 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 04:26:57.596 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 04:26:58.069 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 04:26:58.541 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 04:26:58.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:58.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:58.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:58.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:58.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:58.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:58.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:58.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:26:58.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:26:58.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:26:58.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:26:58.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:58.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:58.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:58.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:26:58.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:26:58.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:26:58.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:26:58.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:58.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:26:59.012 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 04:26:59.483 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 04:26:59.956 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 04:27:00.428 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 04:27:00.900 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 04:27:01.371 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 04:27:01.842 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 04:27:02.309 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 04:27:02.781 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 04:27:03.244 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 04:27:03.709 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 04:27:04.182 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 04:27:04.654 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 04:27:05.117 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 04:27:05.581 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 04:27:06.044 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 04:27:06.511 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 04:27:06.980 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 04:27:07.443 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 04:27:07.907 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 04:27:08.374 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 04:27:08.837 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 04:27:09.299 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 04:27:09.763 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 04:27:10.230 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 04:27:10.696 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 04:27:11.162 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 04:27:11.628 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 04:27:12.093 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 04:27:12.560 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 04:27:13.031 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 04:27:13.502 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 04:27:13.972 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 04:27:14.442 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 04:27:14.913 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 04:27:15.380 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 04:27:15.851 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 04:27:16.317 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 04:27:16.788 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 04:27:17.258 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 04:27:17.729 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 04:27:18.198 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 04:27:18.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:18.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:18.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:18.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:18.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:18.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:18.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:18.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:18.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:18.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:18.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:18.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:18.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:18.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:18.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:18.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:18.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:18.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:18.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:18.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:18.663 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 04:27:19.127 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 04:27:19.591 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 04:27:20.056 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 04:27:20.522 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 04:27:20.993 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 04:27:21.459 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 04:27:21.923 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 04:27:22.387 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 04:27:22.854 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 04:27:23.319 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 04:27:23.783 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 04:27:24.250 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 04:27:24.722 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 04:27:25.193 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 04:27:25.660 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 04:27:26.127 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 04:27:26.592 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 04:27:27.059 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 04:27:27.523 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 04:27:27.989 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 04:27:28.452 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 04:27:28.917 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 04:27:29.383 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 04:27:29.854 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 04:27:30.321 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 04:27:30.791 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 04:27:31.262 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 04:27:31.732 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 04:27:32.203 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 04:27:32.669 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 04:27:33.133 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 04:27:33.598 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 04:27:34.062 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 04:27:34.529 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 04:27:34.995 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 04:27:35.466 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 04:27:35.937 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 04:27:36.408 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 04:27:36.874 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 04:27:37.342 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 04:27:37.808 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 04:27:38.277 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 04:27:38.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:38.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:38.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:38.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:38.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:27:38.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:27:38.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:27:38.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:27:38.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:27:38.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:27:38.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:27:38.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:27:38.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:27:38.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:27:38.681 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:27:43.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:27:43.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:27:43.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:27:43.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:27:43.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:27:43.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:27:43.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:27:43.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:27:43.697 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:27:43.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:27:43.697 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:27:43.698 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:27:43.698 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:27:43.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:27:43.699 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:27:43.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:27:43.699 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:27:43.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:27:43.699 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:27:43.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:27:43.700 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:27:43.700 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:27:43.700 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:27:43.700 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:27:43.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:27:43.700 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:27:43.700 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:27:43.700 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:27:43.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:27:43.701 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:27:43.701 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:27:43.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:27:43.701 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:27:43.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:27:43.701 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:27:43.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:27:43.701 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:27:43.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:27:43.703 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:27:43.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:27:43.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:27:43.703 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:27:43.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:27:43.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:27:43.704 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:27:43.704 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:27:43.704 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:43.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:43.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:43.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:27:43.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:27:43.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:27:43.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:27:43.706 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:27:43.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:27:43.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:27:48.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:27:48.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:27:48.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:27:48.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:27:48.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:27:48.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:27:48.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:27:48.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:27:48.725 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:27:48.725 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:27:48.725 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:27:48.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:27:48.728 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:27:48.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:27:48.728 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:27:48.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:27:48.729 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:27:48.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:27:48.729 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:27:48.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:27:48.731 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:27:48.731 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:27:48.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:27:48.731 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:27:48.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:27:48.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:27:48.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:27:48.732 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:27:48.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:27:48.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:27:48.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:27:48.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:27:48.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:27:48.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:27:48.735 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:27:48.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:27:48.735 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:27:48.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:48.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:27:48.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:27:48.738 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:27:48.738 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:48.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:27:48.743 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:27:49.221 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:27:49.270 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:27:49.272 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:27:49.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:49.275 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:27:49.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:49.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:49.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:49.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:49.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:49.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:49.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:49.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:49.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:49.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:49.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:49.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:49.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:49.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:49.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:49.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:49.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:49.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:49.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:49.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:49.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:49.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:49.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:49.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:49.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:49.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:49.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:49.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:49.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:49.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:49.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:49.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:49.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:49.688 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:27:49.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:27:49.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:27:49.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:27:49.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:27:49.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:49.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:49.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:49.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:49.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:49.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:49.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:49.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:49.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:49.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:49.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:49.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:49.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:49.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:49.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:49.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:49.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:50.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:50.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:50.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:50.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:50.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:50.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:50.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:50.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:50.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:50.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:50.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:50.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:50.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:50.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:50.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:50.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.159 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:27:50.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:50.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:50.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:50.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:50.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:50.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:50.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:50.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:50.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:50.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:50.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:50.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:50.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:50.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.630 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:27:50.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:27:50.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:27:50.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:27:50.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:27:50.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:50.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:50.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:50.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:50.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:50.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:50.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:50.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:50.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:50.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:50.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:50.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:50.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:50.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:50.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:51.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:51.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:51.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:51.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:51.101 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:27:51.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:51.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:51.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:51.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:51.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:51.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:51.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:51.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:51.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:51.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:51.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:51.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:51.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:51.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:51.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:51.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:51.572 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:27:51.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:27:51.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:27:51.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:27:51.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:27:52.043 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:27:52.513 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:27:52.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:27:52.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:27:52.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:27:52.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:27:52.984 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:27:53.454 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:27:53.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:53.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:53.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:53.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:53.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:53.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:53.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:53.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:53.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:53.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:53.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:53.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:53.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:53.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:53.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:53.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:53.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:53.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:27:53.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:27:53.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:27:53.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:27:53.919 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:27:54.384 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:27:54.850 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:27:55.319 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:27:55.788 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:27:56.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:56.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:56.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:56.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:56.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:56.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:56.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:56.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:56.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:56.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:56.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:56.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:56.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:56.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:56.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:56.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:56.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:56.257 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:27:56.722 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:27:57.184 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:27:57.647 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:27:58.114 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:27:58.582 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:27:58.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:58.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:58.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:58.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:58.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:58.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:58.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:58.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:27:58.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:27:58.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:27:58.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:27:58.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:58.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:58.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:58.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:27:58.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:27:58.762 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:27:58.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:27:58.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:58.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:27:59.044 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:27:59.506 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:27:59.970 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:28:00.433 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:28:00.895 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:28:01.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:01.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:01.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:01.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:01.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:01.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:01.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:01.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:01.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:01.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:01.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:01.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:01.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:01.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:01.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:01.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:01.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:01.358 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:28:01.824 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:28:02.288 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:28:02.751 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:28:03.214 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:28:03.677 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:28:03.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:03.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:03.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:03.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:03.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:03.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:03.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:03.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:03.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:03.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:03.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:03.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:03.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:03.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:03.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:03.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:03.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:04.139 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:28:04.602 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:28:05.065 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:28:05.529 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:28:05.992 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:28:06.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:06.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:06.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:06.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:06.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:06.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:06.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:06.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:06.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:28:06.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:28:06.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:28:06.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:28:06.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:28:06.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:28:06.310 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:28:11.312 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:28:11.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:28:11.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:28:11.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:28:11.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:28:11.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:28:11.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:28:11.315 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:28:11.315 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:11.315 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:28:11.315 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:28:11.316 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:28:11.316 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:28:11.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:28:11.316 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:11.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:28:11.316 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:28:11.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:28:11.316 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:28:11.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:11.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:28:11.317 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:28:11.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:28:11.317 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:11.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:28:11.317 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:28:11.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:28:11.317 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:28:11.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:11.318 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:28:11.318 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:28:11.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:28:11.318 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:11.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:28:11.318 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:28:11.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:28:11.318 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:28:11.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:11.320 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:28:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:28:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:28:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:28:11.320 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:28:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:28:11.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:28:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:28:11.321 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:28:11.321 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:28:11.321 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:11.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:11.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:11.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:11.325 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:28:11.789 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:28:11.836 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:28:11.836 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:28:11.837 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:28:11.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:11.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:11.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:11.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:11.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:11.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:11.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:11.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:11.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:11.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:11.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:11.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:11.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:11.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:11.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:11.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:11.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:12.253 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:28:12.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:12.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:12.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:12.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:12.715 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:28:13.178 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:28:13.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:13.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:13.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:13.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:13.640 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:28:14.103 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:28:14.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:14.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:14.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:14.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:14.566 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:28:14.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:14.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:14.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:14.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:15.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:15.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:15.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:15.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:15.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:15.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:15.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:15.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:15.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:15.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:15.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:15.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:15.029 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:28:15.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:15.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:15.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:15.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:15.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:15.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:15.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:15.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:15.492 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:28:15.957 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:28:16.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:16.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:16.325 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:16.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:16.421 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:28:16.884 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:28:17.347 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:28:17.811 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:28:18.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:18.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:18.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:18.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:18.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:18.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:18.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:18.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:18.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:18.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:18.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:18.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:18.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:18.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:18.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:18.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:18.275 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:28:18.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:18.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:18.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:18.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:18.740 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:28:19.203 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:28:19.666 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:28:20.129 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:28:20.592 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:28:21.055 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:28:21.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:21.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:21.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:21.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:21.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:21.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:21.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:21.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:21.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:21.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:21.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:21.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:21.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:21.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:21.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:21.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:21.518 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:28:21.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:21.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:21.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:21.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:21.983 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:28:22.448 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:28:22.911 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:28:23.374 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:28:23.838 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:28:24.300 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:28:24.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:24.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:24.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:24.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:24.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:24.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:24.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:24.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:24.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:28:24.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:28:24.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:28:24.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:28:24.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:28:24.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:28:24.669 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:28:29.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:28:29.671 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:28:29.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:28:29.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:28:29.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:28:29.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:28:29.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:28:29.674 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:28:29.674 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:29.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:28:29.675 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:28:29.675 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:28:29.676 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:28:29.676 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:28:29.676 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:29.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:28:29.676 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:28:29.676 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:28:29.676 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:28:29.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:29.677 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:28:29.677 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:28:29.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:28:29.677 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:29.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:28:29.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:28:29.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:28:29.677 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:28:29.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:29.678 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:28:29.678 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:28:29.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:28:29.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:29.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:28:29.678 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:28:29.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:28:29.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:28:29.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:29.680 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:28:29.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:28:29.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:28:29.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:28:29.680 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:28:29.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:28:29.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:28:29.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:28:29.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:29.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:28:29.681 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:28:29.681 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:28:29.681 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:29.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:29.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:29.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:29.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:29.685 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:28:30.149 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:28:30.193 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:28:30.193 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:28:30.194 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:28:30.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:30.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:30.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:30.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:30.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:30.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:30.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:30.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:30.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:30.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:30.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:30.207 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:30.207 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:30.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:30.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:30.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:30.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:30.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:30.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:30.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:30.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:30.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:30.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:30.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:30.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:30.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:30.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:30.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:30.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:30.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:30.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:30.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:30.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:30.613 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:28:30.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:30.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:30.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:30.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:30.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:30.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:30.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:30.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:31.075 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:28:31.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:31.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:31.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:31.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:31.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:31.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:31.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:31.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:31.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:31.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:31.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:31.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:31.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:31.097 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:31.097 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:31.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:31.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:31.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:31.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:31.537 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:28:31.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:31.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:31.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:31.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:32.000 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:28:32.463 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:28:32.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:32.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:32.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:32.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:32.926 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:28:33.389 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:28:33.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:33.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:33.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:33.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:33.851 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:28:34.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:34.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:34.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:34.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:34.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:34.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:34.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:34.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:34.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:34.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:34.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:34.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:34.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:34.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:34.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:34.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:34.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:34.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:34.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:34.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:34.314 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:28:34.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:34.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:34.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:34.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:34.779 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:28:35.245 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:28:35.711 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:28:36.174 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:28:36.637 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:28:36.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:36.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:36.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:36.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:36.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:36.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:36.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:36.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:36.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:28:36.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:28:36.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:28:36.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:28:36.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:28:36.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:28:36.954 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:28:41.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:28:41.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:28:41.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:28:41.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:28:41.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:28:41.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:28:41.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:28:41.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:28:41.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:41.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:28:41.960 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:28:41.961 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:28:41.961 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:28:41.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:28:41.961 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:41.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:28:41.961 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:28:41.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:28:41.961 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:28:41.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:41.962 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:28:41.962 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:28:41.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:28:41.962 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:41.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:28:41.962 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:28:41.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:28:41.962 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:28:41.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:41.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:28:41.964 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:28:41.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:28:41.964 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:28:41.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:28:41.964 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:28:41.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:28:41.964 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:28:41.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:28:41.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:28:41.966 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:28:41.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:41.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:41.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:28:41.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:28:42.434 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:28:42.482 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:28:42.483 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:28:42.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:42.483 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:28:42.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:42.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:42.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:42.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:42.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:42.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:42.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:42.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:42.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:42.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:42.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:42.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:42.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:42.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:42.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:42.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:42.896 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:28:42.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:42.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:42.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:42.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:43.359 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:28:43.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:43.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:43.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:43.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:43.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:43.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:43.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:43.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:43.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:43.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:43.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:43.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:43.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:43.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:43.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:43.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:43.822 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:28:43.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:43.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:43.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:43.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:43.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:43.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:43.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:43.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:44.286 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:28:44.752 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:28:44.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:44.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:44.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:44.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:45.218 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:28:45.682 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:28:45.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:45.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:45.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:45.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:45.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:45.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:45.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:45.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:45.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:45.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:45.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:45.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:45.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:45.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:45.938 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:45.938 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:45.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:45.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:45.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:45.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:45.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:45.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:45.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:45.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:46.147 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:28:46.611 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:28:46.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:46.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:46.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:46.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:47.075 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:28:47.547 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:28:48.010 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:28:48.474 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:28:48.937 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:28:49.401 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:28:49.864 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:28:50.328 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:28:50.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:50.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:50.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:50.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:50.791 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:28:50.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:50.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:50.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:50.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:50.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:50.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:28:50.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:50.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:50.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:50.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:50.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:28:50.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:28:50.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:28:50.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:28:50.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:50.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:51.254 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:28:51.716 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:28:52.180 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:28:52.644 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:28:53.106 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:28:53.569 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:28:54.032 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:28:54.496 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:28:54.959 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:28:55.423 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:28:55.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:28:55.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:28:55.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:28:55.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:28:55.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:28:55.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:28:55.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:28:55.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:28:55.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:28:55.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:28:55.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:28:55.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:28:55.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:28:55.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:28:55.576 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:29:00.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:29:00.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:29:00.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:00.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:00.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:00.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:00.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:00.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:29:00.583 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:00.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:29:00.583 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:29:00.584 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:29:00.584 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:29:00.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:29:00.584 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:00.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:00.584 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:29:00.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:29:00.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:29:00.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:00.585 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:29:00.585 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:29:00.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:29:00.585 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:00.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:00.585 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:29:00.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:29:00.585 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:29:00.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:00.586 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:29:00.586 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:29:00.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:29:00.587 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:00.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:00.587 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:29:00.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:29:00.587 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:29:00.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:29:00.589 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:29:00.589 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:29:00.589 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:00.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:00.594 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:29:01.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:29:01.103 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:29:01.104 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:29:01.104 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:29:01.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:01.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:01.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:01.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:01.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:01.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:01.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:01.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:01.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:01.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:01.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:01.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:01.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:01.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:01.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:01.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:01.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:01.530 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:29:01.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:01.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:01.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:01.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:01.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:01.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:01.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:01.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:01.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:01.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:01.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:01.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:01.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:01.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:01.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:01.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:01.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:01.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:01.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:01.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:01.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:01.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:01.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:01.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:01.996 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:29:02.462 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:29:02.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:02.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:02.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:02.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:02.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:02.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:02.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:02.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:02.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:02.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:02.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:02.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:02.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:02.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:02.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:02.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:02.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:02.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:02.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:02.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:02.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:02.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:02.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:02.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:02.928 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:29:03.395 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:29:03.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:03.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:03.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:03.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:03.866 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:29:04.333 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:29:04.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:04.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:04.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:04.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:04.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:04.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:04.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:04.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:04.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:04.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:04.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:04.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:04.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:04.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:04.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:04.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:04.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:04.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:04.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:04.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:04.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:04.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:04.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:04.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:04.798 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:29:05.266 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:29:05.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:05.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:05.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:05.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:05.734 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:29:06.201 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:29:06.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:29:06.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:06.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:06.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:06.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:06.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:06.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:06.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:06.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:06.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:06.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:06.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:06.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:06.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:29:06.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:29:06.774 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:29:06.775 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1350 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:06.775 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:06.775 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:06.776 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:06.776 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:06.776 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:11.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:29:11.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:29:11.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:11.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:11.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:11.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:11.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:11.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:29:11.791 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:11.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:29:11.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:29:11.794 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:29:11.794 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:29:11.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:29:11.794 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:11.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:11.794 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:29:11.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:29:11.795 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:29:11.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:11.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:29:11.797 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:29:11.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:29:11.797 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:11.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:11.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:29:11.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:29:11.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:29:11.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:11.800 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:29:11.800 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:29:11.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:29:11.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:11.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:11.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:29:11.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:29:11.801 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:29:11.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:11.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:29:11.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:29:11.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:29:11.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:29:11.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:29:11.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:29:11.805 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:29:11.805 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:29:11.805 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:11.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:11.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:11.810 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:29:12.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:29:12.341 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:29:12.343 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:29:12.345 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:29:12.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:12.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:12.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:12.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:12.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:12.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:12.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:12.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:12.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:12.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:12.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:12.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:12.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:12.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:12.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:12.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:12.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:12.748 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:29:12.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:12.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:12.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:12.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:13.219 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:29:13.687 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:29:13.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:13.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:13.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:13.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:14.152 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:29:14.622 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:29:14.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:14.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:14.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:14.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:14.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:14.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:14.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:14.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:14.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:14.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:14.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:14.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:14.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:14.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:14.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:14.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:14.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:14.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:14.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:14.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:14.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:14.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:14.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:14.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:15.089 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:29:15.559 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:29:15.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:15.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:15.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:15.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:16.025 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:29:16.492 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:29:16.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:16.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:16.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:16.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:16.960 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:29:17.427 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:29:17.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:17.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:17.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:17.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:17.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:17.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:17.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:17.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:17.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:17.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:17.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:17.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:17.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:17.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:17.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:17.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:17.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:17.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:17.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:17.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:17.894 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:29:18.364 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:29:18.834 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:29:19.303 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:29:19.768 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:29:20.236 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:29:20.703 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:29:21.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:21.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:21.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:21.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:21.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:21.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:21.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:21.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:21.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:21.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:21.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:21.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:21.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:21.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:21.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:21.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:21.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:21.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:21.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:21.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:21.174 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:29:21.641 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:29:22.108 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:29:22.578 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:29:23.042 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:29:23.509 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:29:23.974 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:29:24.448 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:29:24.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:24.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:24.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:24.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:24.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:24.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:24.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:24.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:24.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:24.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:24.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:24.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:24.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:29:24.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:29:24.550 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:29:24.550 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2778 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:24.550 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2778 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:24.550 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2778 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:24.551 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2778 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:24.551 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2778 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:24.551 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2778 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:29.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:29:29.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:29:29.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:29.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:29.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:29.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:29.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:29.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:29:29.561 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:29.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:29:29.562 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:29:29.564 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:29:29.564 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:29:29.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:29:29.565 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:29.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:29.565 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:29:29.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:29:29.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:29:29.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:29.566 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:29:29.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:29:29.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:29:29.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:29.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:29.567 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:29:29.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:29:29.567 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:29:29.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:29.569 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:29:29.569 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:29:29.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:29:29.569 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:29.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:29.569 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:29:29.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:29:29.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:29:29.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:29.571 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:29:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:29:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:29:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:29:29.571 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:29:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:29:29.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:29:29.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:29:29.572 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:29:29.572 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:29:29.572 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:29.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:29.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:29.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:29.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:29.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:29.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:29.576 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:29:30.054 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:29:30.099 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:29:30.101 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:29:30.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:30.103 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:29:30.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:30.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:30.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:30.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:30.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:30.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:30.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:30.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:30.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:30.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:30.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:30.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:30.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:30.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:30.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:30.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:30.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:30.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:30.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:30.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:30.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:30.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:30.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:30.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:30.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:30.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:30.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:30.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:30.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:30.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.522 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:29:30.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:30.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:30.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:30.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:30.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:30.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:30.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:30.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:30.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:30.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:30.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:30.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:30.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:30.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:30.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:30.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:30.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:30.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:30.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:30.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:30.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:30.992 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:29:31.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:31.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:31.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:31.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:31.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:31.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:31.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:31.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:31.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:31.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:31.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:31.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:31.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:31.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:31.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:31.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:31.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:31.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:31.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:31.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:31.463 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:29:31.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:31.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:31.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:31.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:31.934 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:29:32.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:32.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:32.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:32.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:32.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:32.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:32.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:32.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:32.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:32.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:29:32.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:29:32.030 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:29:32.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:32.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:32.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:32.030 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:32.030 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:32.030 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:32.030 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:32.030 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:32.030 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:29:37.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:29:37.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:29:37.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:37.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:37.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:37.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:37.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:29:37.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:29:37.045 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:37.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:29:37.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:29:37.048 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:29:37.048 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:29:37.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:29:37.048 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:37.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:29:37.049 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:29:37.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:29:37.049 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:29:37.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:37.051 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:29:37.051 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:29:37.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:29:37.051 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:37.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:29:37.052 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:29:37.052 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:29:37.052 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:29:37.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:37.054 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:29:37.054 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:29:37.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:29:37.054 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:29:37.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:29:37.054 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:29:37.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:29:37.054 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:29:37.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:37.056 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:29:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:29:37.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:29:37.057 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:29:37.057 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:29:37.057 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:37.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:37.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:29:37.062 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:29:37.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:29:37.584 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:29:37.586 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:29:37.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:37.588 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:29:37.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:37.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:37.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:37.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:29:37.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:29:37.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:29:37.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:29:37.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:37.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:37.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:37.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:29:37.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:29:37.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:29:37.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:29:37.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:37.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:29:38.011 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:29:38.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:38.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:38.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:38.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:38.482 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:29:38.953 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:29:39.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:39.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:39.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:39.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:39.424 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:29:39.894 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:29:40.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:40.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:40.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:40.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:40.365 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:29:40.838 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:29:41.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:41.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:41.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:41.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:41.307 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:29:41.777 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:29:42.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:29:42.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:29:42.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:29:42.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:29:42.248 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:29:42.719 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:29:43.190 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:29:43.663 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:29:44.136 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:29:44.608 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:29:45.079 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:29:45.552 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:29:46.024 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:29:46.497 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:29:46.970 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:29:47.443 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:29:47.915 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:29:48.386 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:29:48.857 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:29:49.329 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:29:49.802 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:29:50.275 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:29:50.748 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:29:51.221 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:29:51.693 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:29:52.164 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:29:52.635 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:29:53.105 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:29:53.575 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:29:54.047 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:29:54.517 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:29:54.988 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:29:55.459 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:29:55.932 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:29:56.405 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:29:56.877 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:29:57.350 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:29:57.822 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:29:58.295 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:29:58.766 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:29:59.238 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:29:59.711 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:30:00.184 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:30:00.654 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:30:01.125 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:30:01.598 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:30:02.071 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:30:02.544 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:30:03.015 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:30:03.487 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:30:03.961 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:30:04.433 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:30:04.906 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:30:05.381 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:30:05.854 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:30:06.327 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:30:06.798 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:30:07.270 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:30:07.742 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:30:08.213 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:30:08.684 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:30:09.155 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:30:09.625 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:30:10.099 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:30:10.571 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:30:10.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:30:10.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:30:10.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:30:10.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:30:10.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:30:10.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:30:10.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:30:10.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:30:10.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:30:10.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:30:10.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:30:10.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:30:10.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:30:10.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:30:10.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:30:10.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:30:10.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:30:10.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:30:10.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:30:10.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:30:11.043 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:30:11.514 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:30:11.985 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:30:12.458 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:30:12.930 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 04:30:13.403 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 04:30:13.873 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 04:30:14.344 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 04:30:14.817 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 04:30:15.290 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 04:30:15.762 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 04:30:16.235 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 04:30:16.708 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 04:30:17.180 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 04:30:17.651 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 04:30:18.122 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 04:30:18.595 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 04:30:19.067 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 04:30:19.539 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 04:30:20.010 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 04:30:20.481 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 04:30:20.954 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 04:30:21.427 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 04:30:21.899 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 04:30:22.370 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 04:30:22.843 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 04:30:23.316 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 04:30:23.787 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 04:30:24.259 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 04:30:24.729 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 04:30:25.200 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 04:30:25.674 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 04:30:26.147 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 04:30:26.619 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 04:30:27.090 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 04:30:27.563 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 04:30:28.036 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 04:30:28.508 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 04:30:28.981 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 04:30:29.454 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 04:30:29.926 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 04:30:30.419 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 04:30:30.891 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 04:30:31.362 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 04:30:31.833 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 04:30:32.306 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 04:30:32.779 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 04:30:33.250 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 04:30:33.716 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 04:30:34.183 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 04:30:34.647 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 04:30:35.117 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 04:30:35.586 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 04:30:36.056 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 04:30:36.524 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 04:30:36.989 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 04:30:37.460 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 04:30:37.928 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 04:30:38.401 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 04:30:38.868 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 04:30:39.339 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 04:30:39.806 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 04:30:40.273 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 04:30:40.746 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 04:30:41.215 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 04:30:41.685 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 04:30:42.158 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 04:30:42.626 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 04:30:43.097 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 04:30:43.568 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 04:30:44.039 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 04:30:44.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:30:44.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:30:44.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:30:44.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:30:44.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:30:44.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:30:44.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:30:44.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:30:44.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:30:44.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:30:44.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:30:44.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:30:44.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:30:44.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:30:44.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:30:44.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:30:44.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:30:44.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:30:44.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:30:44.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:30:44.506 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 04:30:44.979 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 04:30:45.446 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 04:30:45.917 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 04:30:46.388 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 04:30:46.859 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 04:30:47.329 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 04:30:47.800 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 04:30:48.268 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 04:30:48.732 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 04:30:49.200 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 04:30:49.673 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 04:30:50.140 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 04:30:50.612 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 04:30:51.082 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 04:30:51.553 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 04:30:52.023 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 04:30:52.490 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 04:30:52.961 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 04:30:53.432 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 04:30:53.902 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 04:30:54.373 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 04:30:54.843 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 04:30:55.314 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 04:30:55.783 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 04:30:56.253 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 04:30:56.719 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 04:30:57.188 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 04:30:57.656 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 04:30:58.126 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 04:30:58.599 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 04:30:59.070 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 04:30:59.537 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 04:31:00.007 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 04:31:00.474 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 04:31:00.943 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 04:31:01.411 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 04:31:01.881 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 04:31:02.350 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 04:31:02.821 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 04:31:03.291 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 04:31:03.758 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 04:31:04.226 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 04:31:04.693 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 04:31:05.164 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 04:31:05.635 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 04:31:06.106 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 04:31:06.578 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 04:31:07.049 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 04:31:07.518 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-04-19 04:31:07.989 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-04-19 04:31:08.455 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-04-19 04:31:08.925 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-04-19 04:31:09.394 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-04-19 04:31:09.867 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-04-19 04:31:10.338 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-04-19 04:31:10.810 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-04-19 04:31:11.283 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-04-19 04:31:11.753 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-04-19 04:31:12.226 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-04-19 04:31:12.694 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-04-19 04:31:13.167 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-04-19 04:31:13.637 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-04-19 04:31:14.108 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-04-19 04:31:14.581 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-04-19 04:31:15.053 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-04-19 04:31:15.522 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-04-19 04:31:15.993 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-04-19 04:31:16.461 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-04-19 04:31:16.930 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-04-19 04:31:17.401 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-04-19 04:31:17.870 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-04-19 04:31:18.336 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-04-19 04:31:18.805 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-04-19 04:31:19.274 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-04-19 04:31:19.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:31:19.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:31:19.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:31:19.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:31:19.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:31:19.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:31:19.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:31:19.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:31:19.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:31:19.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:31:19.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:31:19.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:31:19.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:31:19.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:31:19.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:31:19.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:31:19.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:31:19.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:31:19.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:31:19.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:31:19.741 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-04-19 04:31:20.212 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-04-19 04:31:20.683 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-04-19 04:31:21.154 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-04-19 04:31:21.619 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-04-19 04:31:22.090 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-04-19 04:31:22.558 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-04-19 04:31:23.028 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-04-19 04:31:23.494 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-04-19 04:31:23.965 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-04-19 04:31:24.436 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-04-19 04:31:24.909 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-04-19 04:31:25.382 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-04-19 04:31:25.854 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-04-19 04:31:26.325 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-04-19 04:31:26.798 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-04-19 04:31:27.271 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-04-19 04:31:27.743 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-04-19 04:31:28.214 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-04-19 04:31:28.687 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-04-19 04:31:29.160 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-04-19 04:31:29.632 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-04-19 04:31:30.103 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-04-19 04:31:30.573 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-04-19 04:31:31.046 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-04-19 04:31:31.519 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-04-19 04:31:31.991 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-04-19 04:31:32.464 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-04-19 04:31:32.936 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-04-19 04:31:33.409 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-04-19 04:31:33.881 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-04-19 04:31:34.354 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-04-19 04:31:34.826 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-04-19 04:31:35.299 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-04-19 04:31:35.772 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-04-19 04:31:36.244 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-04-19 04:31:36.715 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-04-19 04:31:37.186 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-04-19 04:31:37.659 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-04-19 04:31:38.131 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-04-19 04:31:38.603 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-04-19 04:31:39.074 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-04-19 04:31:39.547 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-04-19 04:31:40.020 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-04-19 04:31:40.492 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-04-19 04:31:40.963 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-04-19 04:31:41.436 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-04-19 04:31:41.908 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-04-19 04:31:42.381 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-04-19 04:31:42.854 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-04-19 04:31:43.326 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-04-19 04:31:43.798 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-04-19 04:31:44.269 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-04-19 04:31:44.742 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-04-19 04:31:45.215 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-04-19 04:31:45.687 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-04-19 04:31:46.160 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-04-19 04:31:46.633 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-04-19 04:31:47.105 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-04-19 04:31:47.576 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-04-19 04:31:48.049 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-04-19 04:31:48.522 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-04-19 04:31:48.994 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-04-19 04:31:49.465 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-04-19 04:31:49.938 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-04-19 04:31:50.410 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-04-19 04:31:50.882 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-04-19 04:31:51.354 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-04-19 04:31:51.827 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-04-19 04:31:52.299 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-04-19 04:31:52.771 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-04-19 04:31:53.245 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-04-19 04:31:53.716 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2026-04-19 04:31:54.188 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2026-04-19 04:31:54.660 [DEBUG] clck_gen.py:113 IND CLOCK 29784
2026-04-19 04:31:54.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:31:54.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:31:54.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:31:54.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:31:54.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:31:54.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:31:54.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:31:54.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:31:54.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:31:54.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:31:54.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:31:54.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:31:54.713 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:31:54.713 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:31:54.713 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:31:59.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:31:59.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:31:59.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:31:59.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:31:59.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:31:59.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:31:59.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:31:59.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:31:59.726 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:31:59.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:31:59.726 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:31:59.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:31:59.728 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:31:59.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:31:59.729 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:31:59.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:31:59.729 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:31:59.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:31:59.729 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:31:59.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:31:59.732 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:31:59.732 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:31:59.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:31:59.732 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:31:59.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:31:59.732 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:31:59.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:31:59.733 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:31:59.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:31:59.735 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:31:59.736 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:31:59.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:31:59.736 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:31:59.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:31:59.736 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:31:59.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:31:59.736 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:31:59.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:31:59.741 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:31:59.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:31:59.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:31:59.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:31:59.741 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:31:59.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:31:59.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:31:59.742 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:31:59.742 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:31:59.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:31:59.742 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:31:59.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:31:59.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:31:59.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:31:59.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:31:59.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:31:59.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:31:59.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:31:59.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:31:59.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:31:59.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:31:59.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:31:59.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:31:59.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:31:59.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:31:59.745 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:31:59.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:04.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:32:04.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:32:04.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:32:04.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:32:04.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:32:04.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:32:04.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:32:04.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:32:04.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:32:04.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:32:04.762 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:32:04.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:32:04.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:32:04.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:32:04.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:32:04.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:32:04.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:32:04.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:32:04.765 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:32:04.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:04.767 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:32:04.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:32:04.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:32:04.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:32:04.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:32:04.767 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:32:04.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:32:04.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:32:04.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:04.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:32:04.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:32:04.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:32:04.770 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:32:04.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:32:04.770 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:32:04.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:32:04.770 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:32:04.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:04.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:32:04.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:32:04.772 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:32:04.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:32:04.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:32:04.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:32:04.773 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:32:04.773 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:04.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:04.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:04.778 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:32:05.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:32:05.303 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:32:05.304 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:32:05.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:05.305 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:32:05.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:05.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:05.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:05.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:05.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:05.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:05.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:05.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:05.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:05.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:05.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:32:05.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:32:05.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:05.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:05.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:05.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:05.722 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:32:05.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:05.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:05.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:05.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:06.193 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:32:06.664 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:32:06.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:06.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:06.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:06.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:06.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:06.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:06.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:06.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:06.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:06.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:06.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:06.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:06.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:06.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:06.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:06.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:06.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:06.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:06.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:32:06.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:32:06.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:06.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:06.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:06.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:07.134 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:32:07.605 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:32:07.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:07.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:07.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:07.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:08.078 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:32:08.548 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:32:08.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:08.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:09.021 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:32:09.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:09.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:09.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:09.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:09.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:09.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:09.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:09.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:09.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:09.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:09.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:09.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:09.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:09.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:09.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:32:09.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:32:09.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:09.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:09.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:09.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:09.493 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:32:09.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:09.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:09.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:09.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:09.964 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:32:10.435 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:32:10.908 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:32:11.381 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:32:11.853 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:32:12.324 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:32:12.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:12.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:12.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:12.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:12.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:12.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:12.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:12.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:12.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:12.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:12.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:12.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:12.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:12.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:12.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:32:12.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:32:12.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:12.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:12.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:12.794 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:32:12.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:13.265 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:32:13.738 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:32:14.211 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:32:14.682 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:32:15.153 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:32:15.624 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:32:16.097 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:32:16.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:16.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:16.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:16.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:16.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:16.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:16.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:16.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:16.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:32:16.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:32:16.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:32:16.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:32:16.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:32:16.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:32:16.194 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:32:21.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:32:21.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:32:21.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:32:21.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:32:21.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:32:21.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:32:21.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:32:21.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:32:21.211 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:32:21.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:32:21.211 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:32:21.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:32:21.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:32:21.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:32:21.214 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:32:21.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:32:21.214 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:32:21.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:32:21.214 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:32:21.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:21.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:32:21.216 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:32:21.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:32:21.216 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:32:21.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:32:21.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:32:21.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:32:21.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:32:21.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:21.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:32:21.217 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:32:21.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:32:21.217 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:32:21.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:32:21.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:32:21.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:32:21.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:32:21.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:21.219 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:32:21.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:32:21.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:32:21.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:32:21.219 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:32:21.220 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:32:21.220 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:32:21.220 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:21.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:21.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:32:21.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:32:21.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:32:21.225 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:32:21.701 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:32:21.747 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:32:21.749 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:32:21.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:21.752 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:32:21.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:21.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:21.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:21.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:21.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:21.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:21.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:21.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:21.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:21.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:21.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:32:21.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:32:21.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:21.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:21.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:21.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:22.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:32:22.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:22.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:22.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:22.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:22.640 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:32:23.113 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:32:23.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:23.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:23.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:23.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:23.581 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:32:24.052 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:32:24.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:24.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:24.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:24.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:24.523 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:32:24.996 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:32:25.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:25.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:25.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:25.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:25.469 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:32:25.941 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:32:26.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:32:26.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:32:26.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:32:26.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:32:26.412 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:32:26.885 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:32:27.358 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:32:27.830 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:32:28.304 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:32:28.776 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:32:29.249 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:32:29.720 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:32:30.192 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:32:30.666 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:32:31.138 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:32:31.609 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:32:32.079 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:32:32.552 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:32:33.025 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:32:33.498 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:32:33.971 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:32:34.444 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:32:34.916 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:32:35.389 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:32:35.862 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:32:36.334 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:32:36.808 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:32:37.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:37.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:37.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:37.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:37.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:37.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:37.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:37.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:37.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:37.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:37.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:37.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:37.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:37.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:37.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:32:37.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:32:37.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:37.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:37.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:37.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:37.276 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:32:37.747 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:32:38.217 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:32:38.688 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:32:39.159 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:32:39.630 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:32:40.101 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:32:40.571 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:32:41.045 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:32:41.515 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:32:41.982 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:32:42.449 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:32:42.921 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:32:43.391 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:32:43.862 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:32:44.333 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:32:44.804 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:32:45.275 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:32:45.747 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:32:46.220 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:32:46.692 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:32:47.163 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:32:47.635 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:32:48.108 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:32:48.580 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:32:49.052 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:32:49.523 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:32:49.998 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:32:50.470 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:32:50.941 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:32:51.412 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:32:51.883 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:32:52.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:52.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:52.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:52.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:52.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:52.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:52.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:52.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:32:52.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:32:52.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:32:52.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:32:52.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:52.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:52.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:52.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:32:52.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:32:52.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:32:52.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:32:52.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:52.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:32:52.354 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:32:52.827 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:32:53.299 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:32:53.770 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:32:54.242 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:32:54.713 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:32:55.184 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:32:55.655 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:32:56.128 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:32:56.601 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:32:57.073 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 04:32:57.546 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 04:32:58.019 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 04:32:58.491 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 04:32:58.964 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 04:32:59.437 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 04:32:59.909 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 04:33:00.380 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 04:33:00.853 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 04:33:01.326 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 04:33:01.798 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 04:33:02.269 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 04:33:02.740 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 04:33:03.213 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 04:33:03.686 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 04:33:04.158 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 04:33:04.629 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 04:33:05.102 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 04:33:05.574 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 04:33:06.047 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 04:33:06.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:06.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:06.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:06.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:06.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:06.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:06.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:33:06.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:06.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:06.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:33:06.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:06.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:06.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:33:06.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:33:06.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:33:06.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:33:06.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:33:06.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:33:06.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:06.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:06.519 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 04:33:06.991 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 04:33:07.463 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 04:33:07.935 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 04:33:08.406 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 04:33:08.876 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 04:33:09.347 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 04:33:09.818 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 04:33:10.292 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 04:33:10.764 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 04:33:11.235 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 04:33:11.708 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 04:33:12.181 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 04:33:12.653 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 04:33:13.124 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 04:33:13.597 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 04:33:14.070 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 04:33:14.542 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 04:33:15.014 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 04:33:15.486 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 04:33:15.958 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 04:33:16.430 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 04:33:16.901 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 04:33:17.375 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 04:33:17.847 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 04:33:18.319 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 04:33:18.792 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 04:33:19.265 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 04:33:19.737 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 04:33:20.208 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 04:33:20.681 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 04:33:21.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:21.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:21.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:21.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:21.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:33:21.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:33:21.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:33:21.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:33:21.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:33:21.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:33:21.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:33:21.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:33:21.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:33:21.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:33:21.091 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:33:26.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:33:26.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:33:26.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:33:26.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:33:26.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:33:26.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:33:26.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:33:26.107 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:33:26.107 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:33:26.107 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:33:26.108 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:33:26.110 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:33:26.110 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:33:26.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:33:26.110 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:33:26.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:33:26.111 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:33:26.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:33:26.111 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:33:26.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:33:26.112 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:33:26.113 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:33:26.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:33:26.113 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:33:26.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:33:26.113 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:33:26.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:33:26.113 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:33:26.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:33:26.115 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:33:26.115 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:33:26.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:33:26.115 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:33:26.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:33:26.116 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:33:26.116 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:33:26.116 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:33:26.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:33:26.119 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:33:26.119 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:33:26.119 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:33:26.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:33:26.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:33:26.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:33:26.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:33:26.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:33:26.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:33:26.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:33:26.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:33:26.124 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:33:26.602 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:33:26.648 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:33:26.650 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:33:26.651 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:33:26.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:26.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:26.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:26.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:33:26.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:26.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:26.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:33:26.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:26.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:26.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:33:26.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:33:26.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:33:26.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:33:26.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:33:26.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:33:26.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:26.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:27.071 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:33:27.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:33:27.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:33:27.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:33:27.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:33:27.541 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:33:28.012 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:33:28.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:33:28.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:33:28.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:33:28.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:33:28.486 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:33:28.958 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:33:29.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:33:29.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:33:29.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:33:29.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:33:29.431 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:33:29.904 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:33:30.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:33:30.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:33:30.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:33:30.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:33:30.377 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:33:30.849 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:33:31.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:33:31.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:33:31.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:33:31.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:33:31.323 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:33:31.795 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:33:32.268 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:33:32.738 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:33:33.209 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:33:33.680 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:33:34.151 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:33:34.622 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:33:35.092 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:33:35.564 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:33:36.036 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:33:36.509 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:33:36.982 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:33:37.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:37.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:37.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:37.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:37.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:37.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:37.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:33:37.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:37.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:37.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:33:37.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:37.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:37.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:33:37.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:33:37.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:33:37.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:33:37.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:33:37.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:33:37.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:37.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:37.450 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:33:37.923 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:33:38.390 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:33:38.861 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:33:39.335 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:33:39.802 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:33:40.274 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:33:40.747 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:33:41.219 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:33:41.691 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:33:42.165 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:33:42.637 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:33:43.109 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:33:43.580 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:33:44.051 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:33:44.522 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:33:44.993 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:33:45.463 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:33:45.937 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:33:46.409 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:33:46.877 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:33:47.348 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:33:47.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:47.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:47.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:47.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:47.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:47.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:47.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:33:47.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:47.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:47.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:33:47.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:47.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:47.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:33:47.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:33:47.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:33:47.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:33:47.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:33:47.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:33:47.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:47.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:47.818 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:33:48.289 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:33:48.762 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:33:49.235 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:33:49.702 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:33:50.172 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:33:50.639 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:33:51.110 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:33:51.581 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:33:52.052 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:33:52.523 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:33:52.993 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:33:53.464 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:33:53.935 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:33:54.406 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:33:54.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:54.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:54.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:54.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:54.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:54.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:54.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:33:54.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:33:54.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:33:54.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:33:54.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:33:54.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:54.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:33:54.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:33:54.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:33:54.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:33:54.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:33:54.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:33:54.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:54.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:33:54.876 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:33:55.347 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:33:55.818 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:33:56.291 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:33:56.764 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:33:57.236 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:33:57.707 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:33:58.180 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:33:58.653 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:33:59.125 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:33:59.596 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:34:00.069 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:34:00.541 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:34:01.013 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:34:01.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:01.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:01.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:01.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:01.484 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:34:01.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:01.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:01.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:01.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:01.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:01.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:01.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:01.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:01.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:34:01.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:34:01.489 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:34:06.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:34:06.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:34:06.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:06.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:06.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:06.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:06.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:06.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:34:06.506 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:06.506 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:34:06.506 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:34:06.511 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:34:06.511 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:34:06.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:34:06.512 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:06.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:06.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:34:06.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:34:06.513 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:34:06.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:06.515 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:34:06.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:34:06.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:34:06.515 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:06.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:06.516 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:34:06.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:34:06.516 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:34:06.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:06.518 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:34:06.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:34:06.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:34:06.519 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:06.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:06.519 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:34:06.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:34:06.519 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:34:06.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:06.522 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:34:06.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:34:06.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:34:06.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:34:06.522 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:34:06.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:34:06.523 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:34:06.523 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:34:06.523 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:06.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:06.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:06.528 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:34:07.005 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:34:07.051 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:34:07.053 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:34:07.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:07.055 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:34:07.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:07.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:07.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:07.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:07.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:07.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:07.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:07.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:07.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:07.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:07.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:07.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:07.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:07.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:07.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:07.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:07.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:07.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:07.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:07.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:07.476 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:34:07.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:07.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:07.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:07.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:07.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:07.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:07.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:07.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:07.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:07.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:07.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:07.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:07.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:07.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:07.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:07.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:07.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:07.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:07.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:07.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:07.947 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:34:08.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:08.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:08.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:08.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:08.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:08.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:08.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:08.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:08.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:08.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:08.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:08.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:08.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:08.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:08.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:08.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:08.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:08.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:08.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:08.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:08.417 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:34:08.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:08.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:08.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:08.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:08.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:08.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:08.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:08.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:08.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:08.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:08.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:08.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:08.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:08.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:08.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:08.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:08.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:08.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:08.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:08.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:08.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:08.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:08.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:08.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:08.888 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:34:09.360 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:34:09.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:09.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:09.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:09.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:09.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:09.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:09.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:09.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:09.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:09.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:09.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:09.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:09.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:09.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:09.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:34:09.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:34:09.700 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:34:09.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:09.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:09.701 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=687 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:09.701 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=687 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:09.701 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=687 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:09.701 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=687 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:09.701 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=687 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:09.701 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=687 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:14.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:34:14.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:34:14.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:14.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:14.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:14.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:14.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:14.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:34:14.711 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:14.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:34:14.711 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:34:14.716 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:34:14.716 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:34:14.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:34:14.717 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:14.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:14.718 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:34:14.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:34:14.719 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:34:14.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:14.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:34:14.722 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:34:14.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:34:14.722 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:14.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:14.723 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:34:14.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:34:14.723 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:34:14.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:14.725 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:34:14.726 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:34:14.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:34:14.726 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:14.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:14.726 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:34:14.726 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:34:14.726 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:34:14.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:34:14.730 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:34:14.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:34:14.731 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:34:14.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:14.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:14.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:34:15.213 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:34:15.259 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:34:15.261 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:34:15.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:15.263 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:34:15.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:15.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:15.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:15.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:15.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:15.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:15.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:15.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:15.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:15.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:15.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:15.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:15.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:15.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:15.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:15.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:15.685 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:34:15.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:15.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:15.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:15.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:16.156 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:34:16.627 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:34:16.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:16.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:16.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:16.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:17.100 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:34:17.572 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:34:17.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:17.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:17.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:17.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:18.045 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:34:18.518 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:34:18.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:18.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:18.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:18.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:18.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:18.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:18.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:18.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:18.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:18.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:18.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:18.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:18.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:18.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:18.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:18.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:18.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:18.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:18.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:18.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:18.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:18.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:18.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:18.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:18.988 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:34:19.461 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:34:19.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:19.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:19.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:19.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:19.933 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:34:20.404 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:34:20.875 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:34:21.348 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:34:21.821 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:34:21.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:21.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:21.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:21.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:22.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:22.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:22.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:22.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:22.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:22.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:22.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:22.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:22.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:22.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:22.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:22.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:22.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:22.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:22.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:22.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:22.288 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:34:22.759 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:34:23.230 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:34:23.700 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:34:24.171 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:34:24.642 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:34:25.113 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:34:25.584 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:34:25.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:25.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:25.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:25.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:25.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:25.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:25.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:25.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:25.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:25.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:25.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:25.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:25.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:25.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:25.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:25.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:25.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:25.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:25.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:25.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:26.054 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:34:26.525 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:34:26.996 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:34:27.468 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:34:27.937 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:34:28.408 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:34:28.882 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:34:29.354 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:34:29.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:29.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:29.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:29.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:29.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:29.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:29.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:29.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:29.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:29.458 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:29.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:34:29.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:34:29.458 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:34:29.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:29.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:29.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3186 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:29.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3186 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:29.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3186 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:29.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3186 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:29.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3186 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:29.458 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3186 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:34:34.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:34:34.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:34:34.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:34.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:34.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:34.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:34.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:34.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:34:34.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:34.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:34:34.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:34:34.474 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:34:34.474 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:34:34.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:34:34.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:34.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:34.475 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:34:34.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:34:34.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:34:34.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:34.477 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:34:34.477 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:34:34.477 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:34:34.477 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:34.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:34.478 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:34:34.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:34:34.478 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:34:34.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:34.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:34:34.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:34:34.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:34:34.481 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:34.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:34.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:34:34.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:34:34.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:34:34.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:34.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:34:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:34:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:34:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:34:34.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:34:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:34:34.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:34:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:34:34.488 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:34:34.488 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:34:34.488 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:34.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:34.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:34.493 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:34:34.970 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:34:35.021 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:34:35.022 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:34:35.023 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:34:35.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:35.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:35.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:35.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:35.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:35.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:35.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:35.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:35.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:35.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:35.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:35.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:35.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:35.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:35.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:35.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:35.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:35.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:35.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:35.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:35.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:35.441 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:34:35.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:35.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:35.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:35.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:35.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:35.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:35.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:35.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:35.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:35.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:35.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:35.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:35.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:35.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:35.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:35.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:35.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:35.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:35.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:35.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:35.908 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:34:36.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:36.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:36.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:36.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:36.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:36.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:36.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:36.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:36.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:36.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:36.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:36.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:36.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:36.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:36.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:36.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:36.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:36.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:36.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:36.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:36.379 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:34:36.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:36.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:36.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:36.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:36.853 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:34:37.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:37.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:37.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:37.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:37.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:37.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:37.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:37.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:37.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:37.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:37.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:37.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:37.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:37.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:37.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:37.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:37.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:37.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:37.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:37.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:37.325 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:34:37.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:37.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:37.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:37.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:37.792 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:34:38.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:38.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:38.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:38.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:38.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:38.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:38.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:38.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:38.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:38.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:38.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:38.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:38.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:34:38.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:34:38.122 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:34:43.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:34:43.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:34:43.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:43.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:43.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:43.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:43.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:34:43.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:34:43.137 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:43.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:34:43.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:34:43.140 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:34:43.140 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:34:43.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:34:43.141 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:43.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:34:43.141 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:34:43.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:34:43.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:34:43.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:43.144 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:34:43.144 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:34:43.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:34:43.144 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:43.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:34:43.144 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:34:43.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:34:43.145 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:34:43.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:43.146 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:34:43.146 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:34:43.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:34:43.147 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:34:43.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:34:43.147 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:34:43.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:34:43.147 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:34:43.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:43.150 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:34:43.150 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:34:43.150 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:34:43.150 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:43.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:34:43.155 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:34:43.630 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:34:43.676 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:34:43.678 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:34:43.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:43.680 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:34:43.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:43.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:43.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:43.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:43.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:43.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:43.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:43.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:43.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:43.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:43.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:43.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:43.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:43.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:43.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:43.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:44.098 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:34:44.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:44.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:44.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:44.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:44.569 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:34:45.040 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:34:45.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:45.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:45.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:45.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:45.511 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:34:45.981 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:34:46.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:46.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:46.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:46.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:46.452 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:34:46.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:46.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:46.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:46.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:46.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:46.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:46.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:46.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:46.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:46.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:46.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:46.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:46.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:46.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:46.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:46.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:46.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:46.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:46.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:46.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:46.923 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:34:47.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:47.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:47.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:47.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:47.394 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:34:47.864 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:34:48.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:34:48.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:34:48.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:34:48.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:34:48.335 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:34:48.806 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:34:49.277 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:34:49.750 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:34:50.221 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:34:50.693 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:34:51.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:51.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:51.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:51.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:51.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:51.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:51.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:51.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:51.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:51.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:51.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:51.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:51.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:51.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:51.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:51.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:51.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:51.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:51.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:51.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:51.165 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:34:51.636 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:34:52.107 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:34:52.578 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:34:53.051 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:34:53.521 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:34:53.994 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:34:54.466 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:34:54.939 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:34:55.412 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:34:55.884 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:34:56.355 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:34:56.826 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:34:57.299 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:34:57.771 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:34:57.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:57.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:57.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:57.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:57.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:57.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:57.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:57.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:34:57.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:34:57.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:34:57.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:34:57.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:57.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:57.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:57.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:34:57.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:34:57.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:34:57.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:34:57.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:57.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:34:58.243 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:34:58.714 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:34:59.185 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:34:59.658 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:35:00.131 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:35:00.603 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:35:01.074 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:35:01.547 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:35:02.019 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:35:02.491 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:35:02.962 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:35:03.436 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:35:03.908 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:35:04.380 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:35:04.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:04.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:04.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:04.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:04.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:04.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:04.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:04.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:04.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:04.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:04.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:04.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:04.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:04.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:04.719 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:35:04.719 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4665 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:04.720 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4665 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:04.720 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4665 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:04.720 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4665 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:04.720 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4665 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:04.720 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4665 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:09.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:09.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:09.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:09.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:09.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:09.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:09.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:09.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:09.731 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:09.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:09.731 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:35:09.735 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:35:09.735 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:35:09.735 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:09.735 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:09.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:09.736 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:35:09.736 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:09.736 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:35:09.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:09.739 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:35:09.739 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:35:09.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:09.739 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:09.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:09.739 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:35:09.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:09.739 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:35:09.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:09.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:35:09.742 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:35:09.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:09.742 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:09.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:09.742 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:35:09.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:09.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:35:09.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:09.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:35:09.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:35:09.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:35:09.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:35:09.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:35:09.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:35:09.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:35:09.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:35:09.747 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:35:09.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:09.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:09.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:09.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:35:10.231 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:35:10.276 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:35:10.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:10.280 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:35:10.284 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:35:10.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:10.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:10.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:35:10.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:10.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:10.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:35:10.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:10.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:10.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:35:10.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:35:10.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:35:10.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:35:10.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:35:10.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:35:10.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:10.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:10.703 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:35:10.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:10.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:10.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:10.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:11.174 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:35:11.645 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:35:11.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:11.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:11.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:11.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:12.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:12.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:12.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:12.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:12.116 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:35:12.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:12.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:12.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:35:12.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:12.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:12.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:35:12.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:12.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:12.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:35:12.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:35:12.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:35:12.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:35:12.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:35:12.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:35:12.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:12.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:12.586 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:35:12.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:12.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:12.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:12.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:13.057 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:35:13.530 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:35:13.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:13.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:13.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:13.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:14.003 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:35:14.475 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:35:14.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:14.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:14.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:14.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:14.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:14.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:14.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:14.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:14.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:14.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:14.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:35:14.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:14.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:14.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:35:14.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:14.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:14.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:35:14.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:35:14.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:35:14.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:35:14.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:35:14.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:35:14.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:14.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:14.945 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:35:15.413 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:35:15.878 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:35:16.349 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:35:16.820 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:35:17.290 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:35:17.761 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:35:18.234 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:35:18.707 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:35:19.179 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:35:19.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:19.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:19.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:19.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:19.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:19.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:19.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:35:19.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:19.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:19.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:35:19.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:19.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:19.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:35:19.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:35:19.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:35:19.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:35:19.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:35:19.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:35:19.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:19.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:19.650 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:35:20.121 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:35:20.595 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:35:21.066 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:35:21.538 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:35:22.010 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:35:22.483 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:35:22.954 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:35:23.425 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:35:23.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:35:23.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:23.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:35:23.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:35:23.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:23.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:23.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:23.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:23.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:23.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:23.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:23.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:23.757 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:35:23.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:23.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:28.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:28.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:28.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:28.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:28.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:28.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:28.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:28.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:28.773 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:28.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:28.773 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:35:28.776 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:35:28.776 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:35:28.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:28.777 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:28.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:28.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:35:28.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:28.777 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:35:28.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:28.780 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:35:28.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:35:28.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:28.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:28.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:28.781 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:35:28.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:28.781 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:35:28.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:28.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:35:28.784 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:35:28.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:28.784 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:28.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:28.784 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:35:28.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:28.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:35:28.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:28.788 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:28.789 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:35:28.789 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:35:28.790 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:35:28.790 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:35:28.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:28.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:28.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:28.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:35:28.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:28.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:28.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:28.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:28.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:28.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:28.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:28.794 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:35:29.272 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:35:29.320 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:35:29.322 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:35:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:29.325 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:35:29.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:29.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:29.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:29.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:29.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:29.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:29.743 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:35:29.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:29.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:29.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:29.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:29.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:29.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:30.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:30.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:30.214 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:35:30.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:30.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:30.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:30.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:30.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:30.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:30.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:30.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:30.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:30.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:30.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:30.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:30.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:30.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:30.656 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:30.656 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:30.656 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:35:30.657 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:30.657 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:30.657 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:30.657 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:30.657 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:30.658 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:35.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:35.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:35.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:35.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:35.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:35.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:35.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:35.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:35.667 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:35.667 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:35.667 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:35:35.669 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:35:35.669 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:35:35.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:35.670 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:35.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:35.670 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:35:35.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:35.671 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:35:35.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:35.672 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:35:35.672 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:35:35.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:35.672 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:35.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:35.672 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:35:35.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:35.673 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:35:35.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:35.674 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:35:35.674 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:35:35.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:35.674 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:35.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:35.675 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:35:35.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:35.675 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:35:35.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:35.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:35:35.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:35:35.678 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:35:35.678 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:35.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:35.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:35.682 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:35:36.161 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:35:36.205 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:35:36.206 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:35:36.208 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:35:36.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.636 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:35:36.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:36.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:36.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:36.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:36.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:36.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.108 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:35:37.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:37.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:37.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:37.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:37.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:37.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:37.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:37.547 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:37.547 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:37.547 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:35:37.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:37.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:37.548 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=402 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.548 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=402 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.548 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=402 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.549 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=402 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.549 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=402 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.549 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=402 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.549 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=403 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.549 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=403 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.549 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=403 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.549 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.550 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.550 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.550 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:37.550 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:35:42.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:42.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:42.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:42.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:42.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:42.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:42.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:42.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:42.552 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:42.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:42.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:35:42.554 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:35:42.554 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:35:42.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:42.554 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:42.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:42.555 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:35:42.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:42.555 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:35:42.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:42.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:35:42.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:35:42.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:42.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:42.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:42.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:35:42.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:42.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:35:42.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:42.560 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:35:42.560 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:35:42.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:42.560 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:42.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:42.560 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:35:42.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:42.560 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:35:42.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:42.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:35:42.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:35:42.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:35:42.565 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:42.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:42.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:42.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:35:43.047 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:35:43.089 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:35:43.091 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:35:43.092 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:35:43.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.518 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:35:43.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:43.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:43.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:43.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:43.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:43.990 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:35:44.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:44.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:44.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:44.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:44.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:44.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:44.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:44.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:44.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:44.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:44.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:44.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:44.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:44.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:44.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:44.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:44.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:44.432 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:44.432 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:35:49.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:49.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:49.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:49.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:49.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:49.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:49.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:49.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:49.445 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:49.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:49.445 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:35:49.448 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:35:49.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:35:49.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:49.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:49.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:49.449 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:35:49.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:49.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:35:49.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:49.450 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:35:49.450 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:35:49.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:49.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:49.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:49.451 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:35:49.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:49.451 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:35:49.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:49.453 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:35:49.453 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:35:49.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:49.453 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:49.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:49.453 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:35:49.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:49.453 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:35:49.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:49.455 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:35:49.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:35:49.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:35:49.456 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:35:49.456 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:35:49.456 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:49.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:49.461 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:35:49.937 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:35:49.983 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:35:49.985 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:35:49.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:49.987 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:35:50.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.408 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:35:50.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:50.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:50.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:50.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:50.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.880 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:35:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:50.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:51.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:51.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:51.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:51.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:51.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:51.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:51.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:51.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:51.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:51.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:51.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:51.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:51.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:51.322 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:35:56.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:56.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:56.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:56.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:56.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:56.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:56.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:56.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:56.338 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:56.338 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:35:56.338 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:35:56.343 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:35:56.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:35:56.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:56.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:56.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:56.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:35:56.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:35:56.344 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:35:56.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:56.348 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:35:56.348 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:35:56.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:56.348 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:56.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:56.349 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:35:56.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:35:56.349 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:35:56.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:56.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:35:56.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:35:56.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:56.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:35:56.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:56.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:35:56.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:35:56.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:35:56.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:56.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:35:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:35:56.357 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:35:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:35:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:35:56.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:35:56.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:35:56.358 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:35:56.358 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:35:56.358 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:56.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:56.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:56.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:56.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:56.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:35:56.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:56.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:35:56.363 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:35:56.841 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:35:56.888 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:35:56.890 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:35:56.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:56.892 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:35:56.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:35:56.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:56.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.312 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:35:57.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:57.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:57.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:57.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:57.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.775 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:35:57.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:57.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:58.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:58.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:35:58.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:35:58.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:35:58.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:35:58.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:35:58.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:35:58.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:35:58.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:35:58.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:35:58.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:35:58.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:35:58.225 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:36:03.233 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:03.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:03.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:03.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:03.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:03.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:03.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:03.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:03.244 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:03.245 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:03.245 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:36:03.250 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:36:03.250 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:36:03.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:03.251 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:03.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:03.252 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:36:03.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:03.253 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:36:03.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:03.255 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:36:03.255 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:36:03.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:03.256 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:03.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:03.256 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:36:03.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:03.257 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:36:03.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:03.259 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:36:03.259 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:36:03.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:03.259 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:03.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:03.260 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:36:03.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:03.260 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:36:03.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:03.264 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:36:03.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:36:03.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:36:03.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:36:03.264 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:36:03.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:36:03.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:36:03.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:36:03.265 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:36:03.265 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:36:03.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:03.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:03.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:03.270 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:36:03.746 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:36:03.795 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:36:03.797 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:36:03.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:03.799 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:36:03.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:03.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:03.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:03.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:03.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.217 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:36:04.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:04.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:04.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:04.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.685 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:36:04.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:04.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:05.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:05.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:05.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:05.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:05.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:05.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:05.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:05.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:05.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:05.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:05.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:05.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:05.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:05.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:05.142 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:36:10.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:10.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:10.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:10.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:10.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:10.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:10.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:10.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:10.161 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:10.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:10.161 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:36:10.163 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:36:10.163 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:36:10.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:10.164 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:10.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:10.164 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:36:10.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:10.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:36:10.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:10.165 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:36:10.165 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:36:10.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:10.165 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:10.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:10.165 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:36:10.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:10.165 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:36:10.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:10.167 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:36:10.167 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:36:10.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:10.167 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:10.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:10.167 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:36:10.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:10.167 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:36:10.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:36:10.169 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:36:10.169 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:36:10.169 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:10.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:10.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:10.174 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:36:10.651 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:36:10.694 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:36:10.696 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:36:10.698 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:36:10.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:10.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:10.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:10.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:10.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.120 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:36:11.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:11.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:11.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:11.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:11.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.593 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:36:11.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:11.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:12.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:12.065 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:36:12.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:12.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:12.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:12.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:12.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:12.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:12.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:12.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:12.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:12.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:12.090 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:36:12.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:12.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:12.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:12.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:12.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:12.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:17.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:17.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:17.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:17.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:17.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:17.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:17.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:17.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:17.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:17.101 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:17.101 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:36:17.103 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:36:17.103 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:36:17.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:17.103 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:17.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:17.104 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:36:17.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:17.104 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:36:17.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:17.106 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:36:17.106 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:36:17.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:17.106 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:17.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:17.106 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:36:17.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:17.106 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:36:17.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:17.108 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:36:17.108 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:36:17.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:17.108 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:17.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:17.108 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:36:17.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:17.108 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:36:17.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:36:17.111 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:36:17.111 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:36:17.111 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:17.116 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:36:17.593 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:36:17.642 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:36:17.644 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:36:17.645 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:36:17.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:17.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:17.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:17.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:17.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:17.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:17.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:17.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:17.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:17.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:17.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:17.708 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:36:22.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:22.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:22.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:22.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:22.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:22.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:22.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:22.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:22.723 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:22.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:22.723 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:36:22.725 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:36:22.726 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:36:22.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:22.726 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:22.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:22.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:36:22.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:22.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:36:22.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:22.729 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:36:22.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:36:22.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:22.730 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:22.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:22.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:36:22.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:22.731 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:36:22.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:22.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:36:22.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:36:22.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:22.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:22.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:22.735 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:36:22.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:22.735 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:36:22.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:22.740 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:36:22.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:36:22.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:36:22.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:36:22.740 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:22.741 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:36:22.741 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:36:22.741 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:36:22.742 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:36:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:22.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:36:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:22.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:22.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:22.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:22.746 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:36:23.225 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:36:23.273 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:36:23.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.276 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:36:23.279 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:36:23.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:23.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:23.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:23.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:23.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:23.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:23.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:23.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:23.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:23.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:23.399 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:36:23.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:28.404 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:28.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:28.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:28.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:28.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:28.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:28.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:28.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:28.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:28.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:28.413 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:36:28.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:36:28.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:36:28.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:28.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:28.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:28.416 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:36:28.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:28.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:36:28.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:28.418 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:36:28.418 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:36:28.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:28.419 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:28.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:28.419 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:36:28.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:28.419 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:36:28.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:28.420 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:36:28.420 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:36:28.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:28.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:28.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:28.421 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:36:28.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:28.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:36:28.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:28.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:36:28.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:36:28.424 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:36:28.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:28.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:28.428 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:36:28.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:36:28.955 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:36:28.958 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:36:28.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:28.958 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:36:28.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:28.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:28.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:28.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:29.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:29.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:29.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:29.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:29.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:29.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:29.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:29.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:29.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:29.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:29.075 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:36:34.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:34.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:34.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:34.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:34.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:34.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:34.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:34.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:34.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:34.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:34.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:36:34.087 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:36:34.088 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:36:34.088 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:34.088 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:34.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:34.089 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:36:34.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:34.089 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:36:34.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:34.091 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:36:34.091 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:36:34.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:34.091 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:34.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:34.091 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:36:34.092 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:34.092 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:36:34.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:34.094 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:36:34.094 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:36:34.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:34.094 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:34.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:34.094 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:36:34.094 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:34.094 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:36:34.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:34.098 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:36:34.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:36:34.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:36:34.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:36:34.098 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:36:34.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:36:34.099 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:36:34.099 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:36:34.099 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:34.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:34.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:34.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:34.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:34.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:34.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:34.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:34.104 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:36:34.582 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:36:34.636 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:36:34.638 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:36:34.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.641 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:36:34.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:34.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:34.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:34.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:34.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:34.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:34.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:34.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:34.735 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:36:34.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:34.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:34.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:34.736 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:34.736 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:34.736 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:34.736 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:34.736 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:34.736 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:36:39.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:39.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:39.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:39.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:39.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:39.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:39.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:39.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:39.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:39.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:39.750 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:36:39.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:36:39.753 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:36:39.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:39.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:39.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:39.754 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:36:39.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:39.755 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:36:39.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:39.756 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:36:39.757 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:36:39.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:39.757 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:39.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:39.757 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:36:39.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:39.757 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:36:39.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:39.759 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:36:39.759 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:36:39.759 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:39.759 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:39.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:39.760 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:36:39.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:39.760 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:36:39.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:36:39.763 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:36:39.763 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:36:39.763 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:39.768 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:36:40.246 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:36:40.286 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:36:40.288 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:36:40.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.290 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:36:40.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:40.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:40.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:40.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:40.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:40.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:40.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:40.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:40.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:40.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:40.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:40.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:40.374 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:36:45.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:45.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:45.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:45.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:45.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:45.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:45.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:45.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:45.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:45.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:45.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:36:45.393 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:36:45.394 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:36:45.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:45.394 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:45.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:45.394 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:36:45.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:45.395 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:36:45.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:45.397 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:36:45.397 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:36:45.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:45.397 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:45.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:45.398 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:36:45.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:45.398 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:36:45.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:45.400 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:36:45.400 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:36:45.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:45.400 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:45.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:45.400 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:36:45.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:45.400 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:36:45.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:45.403 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:36:45.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:36:45.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:36:45.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:36:45.403 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:36:45.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:36:45.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:36:45.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:36:45.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:36:45.404 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:36:45.404 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:36:45.404 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:45.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:45.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:45.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:45.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:45.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:45.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:45.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:45.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:45.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:45.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:45.409 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:36:45.885 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:36:45.930 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:36:45.932 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:36:45.933 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:36:45.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:45.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:46.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:46.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:46.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:46.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:46.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:46.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:46.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:46.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:46.049 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:36:46.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:46.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:51.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:51.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:51.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:51.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:51.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:51.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:51.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:51.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:51.068 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:51.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:51.068 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:36:51.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:36:51.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:36:51.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:51.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:51.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:51.074 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:36:51.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:51.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:36:51.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:51.078 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:36:51.078 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:36:51.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:51.078 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:51.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:51.079 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:36:51.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:51.079 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:36:51.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:51.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:36:51.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:36:51.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:51.082 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:51.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:51.082 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:36:51.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:51.083 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:36:51.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:51.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:36:51.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:36:51.088 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:36:51.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:51.093 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:36:51.568 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:36:51.621 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:36:51.623 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:36:51.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.625 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:36:51.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:51.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:51.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:51.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:51.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:51.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:51.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:51.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:51.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:51.701 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:36:51.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:51.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:51.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:56.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:36:56.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:36:56.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:56.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:56.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:56.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:56.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:36:56.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:56.717 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:56.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:36:56.717 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:36:56.720 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:36:56.720 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:36:56.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:56.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:56.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:36:56.721 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:36:56.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:36:56.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:36:56.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:56.722 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:36:56.723 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:36:56.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:56.723 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:56.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:36:56.723 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:36:56.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:36:56.723 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:36:56.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:56.725 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:36:56.725 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:36:56.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:56.725 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:36:56.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:36:56.725 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:36:56.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:36:56.725 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:36:56.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:56.728 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:36:56.728 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:36:56.728 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:36:56.729 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:56.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:36:56.733 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:36:57.209 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:36:57.256 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:36:57.258 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:36:57.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:36:57.260 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:36:57.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:36:57.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:36:57.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:36:57.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:36:57.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:36:57.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:36:57.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:36:57.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:36:57.682 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:36:57.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:57.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:57.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:57.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:58.153 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:36:58.624 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:36:58.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:58.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:58.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:58.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:36:59.096 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:36:59.569 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:36:59.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:36:59.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:36:59.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:36:59.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:00.041 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:37:00.512 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:37:00.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:00.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:00.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:00.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:00.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:00.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:00.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:00.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:00.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:00.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:00.724 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:37:00.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:00.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:05.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:05.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:05.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:05.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:05.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:05.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:05.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:05.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:05.742 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:05.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:05.743 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:37:05.747 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:37:05.747 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:37:05.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:05.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:05.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:05.749 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:37:05.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:05.749 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:37:05.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:05.752 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:37:05.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:37:05.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:05.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:05.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:05.753 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:37:05.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:05.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:37:05.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:05.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:37:05.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:37:05.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:05.758 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:05.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:05.759 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:37:05.759 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:05.759 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:37:05.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:05.762 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:37:05.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:05.763 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:37:05.763 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:37:05.763 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:37:05.763 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:05.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:05.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:05.768 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:37:06.246 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:37:06.306 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:37:06.307 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:37:06.309 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:37:06.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:37:06.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:06.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:06.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:37:06.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:06.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:06.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:06.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:37:06.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:37:06.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:37:06.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:06.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:06.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:06.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:06.719 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:37:06.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:06.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:06.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:06.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:06.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:06.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:06.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:06.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:37:06.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:06.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:06.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:06.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:37:06.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:37:06.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:37:06.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:06.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:06.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:06.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:06.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:06.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:06.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:06.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:06.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:06.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:06.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:06.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:06.967 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:37:06.968 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=260 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:06.968 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=260 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:06.968 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=260 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:06.968 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=260 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:06.968 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=260 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:06.969 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=260 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:06.969 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=260 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:11.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:11.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:11.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:11.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:11.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:11.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:11.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:11.979 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:11.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:11.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:11.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:37:11.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:37:11.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:37:11.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:11.986 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:11.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:11.987 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:37:11.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:11.987 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:37:11.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:11.991 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:37:11.991 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:37:11.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:11.991 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:11.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:11.992 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:37:11.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:11.992 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:37:11.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:11.995 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:37:11.995 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:37:11.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:11.995 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:11.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:11.996 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:37:11.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:11.996 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:37:11.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:12.000 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:37:12.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:37:12.000 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:37:12.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:37:12.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:37:12.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:37:12.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:37:12.001 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:37:12.001 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:37:12.001 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:37:12.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:12.006 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:37:12.483 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:37:12.531 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:37:12.533 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:37:12.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:37:12.536 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:37:12.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:12.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:12.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:37:12.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:12.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:12.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:12.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:37:12.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:37:12.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:37:12.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:12.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:12.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:12.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:12.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:37:12.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:12.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:12.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:12.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:37:12.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:12.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:12.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:12.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:37:12.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:37:12.953 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:37:13.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:13.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:13.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:13.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:13.426 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:37:13.898 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:37:14.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:14.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:14.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:14.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:14.369 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:37:14.842 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:37:15.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:15.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:15.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:15.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:15.310 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:37:15.781 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:37:16.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:16.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:16.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:16.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:16.252 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:37:16.724 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:37:17.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:17.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:17.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:17.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:17.198 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:37:17.670 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:37:18.141 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:37:18.613 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:37:19.087 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:37:19.559 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:37:20.030 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:37:20.503 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:37:20.971 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:37:21.442 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:37:21.915 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:37:22.388 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:37:22.859 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:37:23.331 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:37:23.801 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:37:24.275 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:37:24.748 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:37:25.220 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:37:25.691 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:37:26.161 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:37:26.632 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:37:27.105 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:37:27.578 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:37:27.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:27.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:27.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:27.875 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=3432 tn=3 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:27.875 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=3432 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:27.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:37:27.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:27.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:27.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:27.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:37:27.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:37:27.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:37:27.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:27.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:27.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:27.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:27.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:27.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:27.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:27.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:27.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:27.911 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:37:27.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:27.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:27.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:27.912 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:27.912 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:27.912 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:27.912 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:27.912 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:27.912 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:32.915 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:32.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:32.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:32.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:32.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:32.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:32.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:32.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:32.921 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:32.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:32.921 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:37:32.923 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:37:32.924 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:37:32.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:32.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:32.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:32.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:37:32.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:32.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:37:32.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:32.926 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:37:32.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:37:32.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:32.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:32.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:32.927 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:37:32.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:32.927 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:37:32.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:32.928 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:37:32.928 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:37:32.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:32.929 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:32.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:32.929 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:37:32.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:32.929 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:37:32.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:32.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:37:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:37:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:37:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:37:32.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:37:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:37:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:37:32.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:37:32.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:37:32.932 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:37:32.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:32.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:32.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:32.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:32.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:32.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:32.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:32.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:32.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:32.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:32.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:32.936 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:37:33.413 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:37:33.456 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:37:33.459 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:37:33.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:37:33.462 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:37:33.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:33.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:33.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:37:33.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:33.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:33.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:33.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:37:33.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:37:33.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:37:33.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:33.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:33.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:33.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:33.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:37:33.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:37:33.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:33.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:33.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:33.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:37:33.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:33.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:33.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:33.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:37:33.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:37:33.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:37:33.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:33.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:33.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:33.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:33.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:33.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:33.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:33.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:33.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:33.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:33.844 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:37:33.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:33.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:38.849 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:38.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:38.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:38.850 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:38.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:38.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:38.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:38.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:38.859 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:38.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:38.859 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:37:38.864 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:37:38.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:37:38.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:38.865 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:38.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:38.865 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:37:38.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:38.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:37:38.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:38.869 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:37:38.869 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:37:38.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:38.869 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:38.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:38.870 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:37:38.870 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:38.870 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:37:38.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:38.873 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:37:38.873 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:37:38.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:38.874 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:38.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:38.874 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:37:38.874 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:38.874 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:37:38.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:38.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:37:38.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:37:38.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:38.879 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:37:38.879 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:37:38.879 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:37:38.879 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:38.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:38.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:38.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:38.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:38.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:38.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:38.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:38.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:38.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:38.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:38.884 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:37:39.362 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:37:39.414 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:37:39.416 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:37:39.419 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:37:39.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:37:39.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:39.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:39.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:37:39.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:39.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:39.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:39.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:37:39.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:37:39.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:37:39.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:39.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:39.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:39.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:39.833 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:37:39.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:39.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:39.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:39.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:40.306 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:37:40.778 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:37:40.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:40.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:40.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:40.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:41.249 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:37:41.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:41.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:41.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:41.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:37:41.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:37:41.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:37:41.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:37:41.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:37:41.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:37:41.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:37:41.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:37:41.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:37:41.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:41.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:41.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:41.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:41.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:41.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:41.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:41.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:41.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:41.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:41.545 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:37:41.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=576 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:41.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=576 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:41.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=576 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:41.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=576 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:41.547 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=576 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:41.547 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=576 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:37:46.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:46.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:46.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:46.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:46.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:46.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:46.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:46.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:46.558 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:46.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:46.558 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:37:46.559 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:37:46.560 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:37:46.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:46.560 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:46.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:46.560 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:37:46.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:46.560 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:37:46.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:46.561 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:37:46.561 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:37:46.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:46.561 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:46.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:46.561 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:37:46.561 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:46.561 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:37:46.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:46.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:37:46.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:37:46.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:46.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:46.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:46.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:37:46.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:46.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:37:46.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:37:46.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:37:46.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:46.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:46.565 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:46.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:46.565 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:37:51.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:51.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:51.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:51.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:51.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:51.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:51.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:51.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:51.571 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:51.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:37:51.572 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:37:51.572 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:37:51.572 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:37:51.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:51.572 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:37:51.573 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:51.573 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:37:51.573 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:37:51.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:37:51.574 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:37:51.574 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:37:51.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:51.574 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:37:51.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:51.574 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:37:51.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:37:51.574 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:37:51.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:37:51.576 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:37:51.576 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:51.576 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:51.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:51.577 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:51.577 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:51.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:37:56.496 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.173.20:5700'
2026-04-19 04:37:56.496 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.173.20:5802)
2026-04-19 04:37:56.496 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.173.20:5801)
2026-04-19 04:37:56.496 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.173.22:6700'
2026-04-19 04:37:56.496 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.173.22:6802)
2026-04-19 04:37:56.496 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.173.22:6801)
2026-04-19 04:37:56.496 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.173.20:5700/1'
2026-04-19 04:37:56.496 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.173.20:5804)
2026-04-19 04:37:56.496 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.173.20:5803)
2026-04-19 04:37:56.496 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.173.20:5700/2'
2026-04-19 04:37:56.496 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.173.20:5806)
2026-04-19 04:37:56.496 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.173.20:5805)
2026-04-19 04:37:56.496 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.173.20:5700/3'
2026-04-19 04:37:56.496 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.173.20:5808)
2026-04-19 04:37:56.496 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.173.20:5807)
2026-04-19 04:37:56.496 [INFO] fake_trx.py:429 Init complete
2026-04-19 04:37:56.496 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-04-19 04:37:58.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:37:58.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:37:58.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:37:58.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:37:58.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:37:58.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:14.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:38:14.201 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:38:14.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:38:14.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:38:14.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:14.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:38:19.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:38:19.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:38:19.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:38:19.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:38:19.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:19.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:38:24.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:38:24.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:38:24.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:38:24.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:38:24.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:24.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:38:29.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:38:29.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:38:29.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:38:29.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:38:29.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:29.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:38:34.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:38:34.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:38:34.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:38:34.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:38:34.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:34.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:38:39.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:38:39.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:38:39.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:38:39.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:38:39.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:39.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:38:44.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:38:44.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:38:44.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:38:44.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:38:44.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:44.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:38:49.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:38:49.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:38:49.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:38:49.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:38:49.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:49.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:38:54.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:38:54.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:38:54.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:38:54.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:38:54.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:54.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:38:59.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:38:59.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:38:59.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:38:59.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:38:59.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:38:59.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:38:59.576 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:38:59.576 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:38:59.576 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:38:59.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:38:59.576 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 0 -> 1
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:38:59.576 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 0 -> 1
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:38:59.576 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 0 -> 1
2026-04-19 04:38:59.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:38:59.577 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:38:59.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:38:59.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 0 -> 1
2026-04-19 04:38:59.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:39:04.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:39:04.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:39:04.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:04.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:04.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:04.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:09.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:39:09.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:39:09.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:09.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:09.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:09.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:09.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:39:09.628 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:39:09.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:39:09.628 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:39:14.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:39:14.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:39:14.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:14.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:14.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:14.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:19.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:39:19.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:39:19.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:19.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:19.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:19.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:24.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:39:24.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:39:24.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:24.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:24.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:24.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:29.823 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:39:29.823 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:39:29.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:29.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:29.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:29.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:35.977 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.173.20:5700'
2026-04-19 04:39:35.977 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.173.20:5802)
2026-04-19 04:39:35.977 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.173.20:5801)
2026-04-19 04:39:35.977 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.173.22:6700'
2026-04-19 04:39:35.977 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.173.22:6802)
2026-04-19 04:39:35.977 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.173.22:6801)
2026-04-19 04:39:35.977 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.173.20:5700/1'
2026-04-19 04:39:35.977 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.173.20:5804)
2026-04-19 04:39:35.977 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.173.20:5803)
2026-04-19 04:39:35.977 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.173.20:5700/2'
2026-04-19 04:39:35.977 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.173.20:5806)
2026-04-19 04:39:35.977 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.173.20:5805)
2026-04-19 04:39:35.977 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.173.20:5700/3'
2026-04-19 04:39:35.977 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.173.20:5808)
2026-04-19 04:39:35.977 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.173.20:5807)
2026-04-19 04:39:35.977 [INFO] fake_trx.py:429 Init complete
2026-04-19 04:39:35.977 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-04-19 04:39:37.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:39:37.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:39:37.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:37.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:37.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:37.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:40.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:40.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:39:40.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:39:40.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:39:40.586 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 0 -> 1
2026-04-19 04:39:40.591 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:39:40.592 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:39:40.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:39:40.593 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:39:40.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:40.594 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:39:40.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:39:40.594 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 0 -> 1
2026-04-19 04:39:40.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:39:40.598 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:39:40.598 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:39:40.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:39:40.599 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:39:40.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:40.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:39:40.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:39:40.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 0 -> 1
2026-04-19 04:39:40.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:39:40.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:39:40.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:39:40.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:39:40.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:39:40.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:40.606 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:39:40.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:39:40.606 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 0 -> 1
2026-04-19 04:39:40.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:39:40.609 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:39:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:39:40.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:39:40.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:39:40.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:39:40.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:39:40.610 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:39:40.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:39:40.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:39:40.610 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:39:40.610 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:39:40.610 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:39:40.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:39:40.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:40.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:39:40.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:39:40.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:40.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:40.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:39:40.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:40.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:40.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:40.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:40.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:40.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:40.615 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:39:41.093 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:39:41.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:41.152 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:39:41.153 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:39:41.153 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:39:41.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:41.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:41.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:41.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:41.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:41.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:41.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:41.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:41.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:41.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:41.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:41.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:41.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:41.564 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:39:41.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:39:41.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:39:41.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:39:41.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:39:41.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:41.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:41.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:41.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:41.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:41.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:41.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:41.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:41.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:41.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:41.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:41.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:41.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:41.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:41.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:41.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:41.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:42.036 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:39:42.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:42.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:42.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:42.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:42.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:42.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:42.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:42.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:42.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:42.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:42.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:42.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:42.507 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:39:42.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:42.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:42.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:42.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:42.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:39:42.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:39:42.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:39:42.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:39:42.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:42.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:42.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:42.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:42.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:42.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:42.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:42.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:42.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:42.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:42.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:42.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:42.977 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:39:42.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:43.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:43.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:43.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:43.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:43.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:43.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:43.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:43.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:43.448 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:39:43.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:43.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:43.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:43.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:43.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:43.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:43.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:43.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:43.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:43.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:39:43.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:39:43.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:39:43.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:39:43.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:43.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:43.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:43.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:43.919 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:39:44.393 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:39:44.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:44.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:44.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:44.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:44.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:44.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:44.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:44.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:44.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:44.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:44.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:44.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:44.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:44.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:39:44.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:39:44.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:39:44.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:39:44.661 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:44.661 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 04:39:44.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:44.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:44.865 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:39:45.337 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:39:45.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:45.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:45.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:45.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:45.482 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:45.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:45.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:45.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:45.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:45.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:45.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:45.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:45.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:45.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:45.608 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:45.608 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 04:39:45.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:45.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:45.811 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:39:46.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:46.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:46.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:46.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:46.022 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:46.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:46.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:46.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:46.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:46.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:46.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:46.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:46.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:46.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:46.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:46.283 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:39:46.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:46.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:46.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:46.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:46.755 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:39:47.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:47.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:47.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:47.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:47.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:47.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:47.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:47.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:47.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:47.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:47.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:47.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:47.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:47.226 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:39:47.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:47.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:47.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:47.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:47.697 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:39:48.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:48.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:48.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:48.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:48.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:48.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:48.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:48.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:48.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:48.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:48.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:48.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:48.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:48.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:48.170 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:39:48.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:48.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:48.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:48.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:48.643 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:39:48.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:48.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:48.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:48.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:48.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:48.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:48.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:48.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:48.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:48.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:48.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:48.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:49.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:49.115 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:39:49.150 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:49.150 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:39:49.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:49.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:49.588 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:39:49.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:49.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:49.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:49.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:49.933 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:49.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:49.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:49.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:49.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:49.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:49.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:49.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:49.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:49.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:50.060 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:39:50.097 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:50.097 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:39:50.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:50.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:50.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:50.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:50.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:50.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:50.479 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:50.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:50.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:50.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:50.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:50.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:50.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:50.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:50.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:50.532 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:39:50.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:50.595 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:50.595 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:39:50.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:50.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:50.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:50.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:50.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:50.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:50.691 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:50.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:50.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:50.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:50.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:50.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:50.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:50.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:50.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:50.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:50.803 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:50.803 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:39:50.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:50.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:51.003 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:39:51.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:51.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:51.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:51.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:51.180 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:51.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:51.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:51.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:51.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:51.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:51.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:51.190 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:51.190 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:51.301 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:51.301 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:39:51.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:51.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:51.474 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:39:51.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:51.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:51.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:51.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:51.669 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:51.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:51.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:51.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:51.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:51.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:51.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:51.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:51.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:51.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:51.772 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:51.772 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:39:51.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:51.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:51.947 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:39:52.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:52.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:52.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:52.158 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:52.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:52.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:52.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:52.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:52.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:52.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:52.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:52.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:52.243 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:52.243 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:39:52.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:52.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:52.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:52.338 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:52.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:52.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:52.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:52.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:52.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:52.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:52.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:52.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:52.419 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:39:52.456 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:52.456 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:39:52.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:52.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:52.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:52.833 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:52.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:52.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:52.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:52.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:52.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:52.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:52.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:52.891 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:39:52.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:52.954 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:52.954 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:39:52.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:52.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:53.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:53.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:53.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:53.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:53.322 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:53.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:53.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:53.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:53.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:53.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:39:53.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:39:53.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:39:53.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:39:53.364 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:39:53.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:53.424 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:39:53.425 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:39:53.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:53.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:53.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:39:53.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:53.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:53.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:53.813 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:39:53.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:39:53.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:39:53.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:39:53.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:39:53.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:53.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:53.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:53.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:39:53.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:39:53.830 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:39:53.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:53.831 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:39:53.831 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:39:53.831 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:39:53.831 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:39:53.831 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:39:53.831 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:39:58.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:39:58.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:39:58.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:58.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:58.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:58.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:58.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:39:58.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:39:58.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:39:58.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:39:58.840 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:39:58.842 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:39:58.842 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:39:58.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:39:58.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:39:58.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:39:58.843 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:39:58.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:39:58.843 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:39:58.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:39:58.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:39:58.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:39:58.845 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:39:58.845 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:39:58.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:39:58.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:39:58.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:39:58.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:39:58.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:39:58.848 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:39:58.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:39:58.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:39:58.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:39:58.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:39:58.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:39:58.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:39:58.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:39:58.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:58.851 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:39:58.851 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:39:58.851 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:39:58.851 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:39:58.856 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:39:59.335 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:39:59.378 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:39:59.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.381 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:39:59.383 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:39:59.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:39:59.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:39:59.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:39:59.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:39:59.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 04:39:59.800 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:39:59.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 04:39:59.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:39:59.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:39:59.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:39:59.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:39:59.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 04:40:00.265 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-04-19 04:40:00.729 [DEBUG] clck_gen.py:113 IND CLOCK 408
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2026-04-19 04:40:00.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:00.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:00.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:00.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:00.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
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2026-04-19 04:40:00.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:00.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:00.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:00.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:00.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:00.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:00.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:00.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:00.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:00.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:40:00.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:40:00.990 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:40:05.996 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:40:05.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:40:05.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:05.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:05.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:05.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:06.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:06.006 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:40:06.006 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:06.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:40:06.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:40:06.012 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:40:06.013 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:40:06.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:40:06.013 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:06.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:06.014 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:40:06.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:40:06.014 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:40:06.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:06.018 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:40:06.018 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:40:06.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:40:06.018 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:06.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:06.019 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:40:06.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:40:06.019 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:40:06.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:06.028 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:40:06.029 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:40:06.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:40:06.029 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:06.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:06.029 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:40:06.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:40:06.030 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:40:06.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:06.039 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:40:06.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:40:06.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:40:06.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:40:06.039 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:40:06.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:40:06.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:40:06.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:06.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:40:06.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:40:06.040 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:40:06.040 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:40:06.040 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:06.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:06.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:06.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:40:06.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:06.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:06.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:06.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:06.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:06.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:06.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:06.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:06.045 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:40:06.522 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:40:06.565 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:40:06.567 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:40:06.569 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:40:06.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:06.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:06.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:06.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:06.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:06.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:06.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:06.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:06.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:06.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:06.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:06.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:06.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:06.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:40:06.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:40:06.616 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:40:06.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:06.616 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:06.616 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:06.617 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:06.617 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:06.617 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:06.617 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:11.619 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:40:11.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:40:11.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:11.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:11.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:11.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:11.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:11.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:40:11.622 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:11.623 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:40:11.623 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:40:11.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:40:11.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:40:11.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:40:11.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:11.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:11.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:40:11.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:40:11.624 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:40:11.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:11.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:40:11.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:40:11.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:40:11.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:11.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:11.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:40:11.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:40:11.625 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:40:11.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:11.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:40:11.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:40:11.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:40:11.626 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:11.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:11.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:40:11.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:40:11.626 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:40:11.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:40:11.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:40:11.629 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:40:11.629 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:40:11.629 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:11.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:11.633 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:40:12.111 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:40:12.156 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:40:12.158 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:40:12.159 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:40:12.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:12.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:12.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:12.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:12.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:12.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:12.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:12.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:12.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:12.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:40:12.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:40:12.197 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:40:12.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:12.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:12.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:12.197 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:12.197 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:12.197 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:12.197 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:12.197 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:12.197 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:40:17.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:40:17.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:40:17.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:17.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:17.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:17.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:17.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:17.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:40:17.215 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:17.215 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:40:17.215 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:40:17.218 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:40:17.218 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:40:17.218 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:40:17.218 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:17.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:17.219 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:40:17.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:40:17.219 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:40:17.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:17.220 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:40:17.220 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:40:17.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:40:17.221 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:17.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:17.221 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:40:17.221 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:40:17.221 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:40:17.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:17.222 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:40:17.223 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:40:17.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:40:17.223 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:17.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:17.223 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:40:17.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:40:17.223 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:40:17.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:17.225 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:40:17.225 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:40:17.225 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:40:17.225 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:17.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:17.230 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:40:17.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:40:17.751 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:40:17.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:17.752 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:40:17.755 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:40:17.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:17.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:17.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:17.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:17.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:17.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:17.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:17.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:17.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:17.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:17.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:17.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:40:17.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:40:17.883 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:40:22.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:40:22.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:40:22.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:22.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:22.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:22.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:22.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:40:22.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:40:22.903 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:22.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:40:22.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:40:22.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:40:22.905 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:40:22.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:40:22.905 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:22.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:40:22.905 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:40:22.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:40:22.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:40:22.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:22.908 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:40:22.909 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:40:22.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:40:22.909 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:22.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:40:22.909 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:40:22.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:40:22.909 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:40:22.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:22.913 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:40:22.913 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:40:22.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:40:22.913 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:40:22.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:40:22.914 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:40:22.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:40:22.914 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:40:22.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:22.919 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:40:22.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:40:22.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:40:22.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:40:22.919 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:40:22.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:22.920 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:40:22.920 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:40:22.920 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:40:22.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:40:22.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:22.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:22.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:22.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:40:22.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:22.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:22.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:22.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:22.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:22.925 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:40:23.402 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:40:23.445 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:40:23.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:23.448 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:40:23.450 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:40:23.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:23.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:23.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:23.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:23.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:23.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:23.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:40:23.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:40:23.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:23.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:23.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:23.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:23.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:23.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:23.873 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:40:23.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:23.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:23.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:23.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:24.345 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:40:24.817 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:40:24.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:24.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:24.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:24.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:25.288 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:40:25.761 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:40:25.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:25.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:25.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:25.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:26.234 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:40:26.705 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:40:26.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:26.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:26.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:26.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:27.177 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:40:27.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:27.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:27.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:27.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:27.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:27.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:27.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:27.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:27.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:27.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:27.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:40:27.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:40:27.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:27.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:27.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:27.650 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:40:27.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:27.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:27.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:27.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:40:27.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:40:27.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:40:27.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:40:28.123 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:40:28.595 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:40:29.066 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:40:29.539 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:40:30.011 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:40:30.483 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:40:30.954 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:40:31.428 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:40:31.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:31.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:31.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:31.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:31.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:31.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:31.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:31.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:31.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:31.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:31.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:40:31.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:40:31.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:31.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:31.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:31.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:31.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:31.900 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:40:32.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:32.372 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:40:32.843 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:40:33.313 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:40:33.787 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:40:34.259 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:40:34.731 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:40:35.205 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:40:35.677 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:40:36.149 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:40:36.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:36.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:36.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:36.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:36.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:36.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:36.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:36.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:36.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:36.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:36.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:40:36.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:40:36.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:36.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:36.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:36.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:36.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:36.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:36.620 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:40:37.094 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:40:37.566 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:40:38.038 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:40:38.511 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:40:38.984 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:40:39.456 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:40:39.926 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:40:40.399 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:40:40.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:40.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:40.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:40.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:40.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:40.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:40.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:40.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:40.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:40.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:40.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:40:40.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:40:40.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:40.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:40.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:40.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:40.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:40.872 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:40:41.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:41.345 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:40:41.818 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:40:42.291 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:40:42.763 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:40:43.236 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:40:43.709 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:40:44.181 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:40:44.653 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:40:45.126 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:40:45.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:45.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:45.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:45.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:45.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:45.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:45.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:45.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:45.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:45.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:45.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:40:45.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:40:45.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:45.269 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:40:45.269 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 04:40:45.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:45.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:45.598 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:40:46.071 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:40:46.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:46.544 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:40:47.017 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:40:47.489 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:40:47.963 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:40:48.435 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:40:48.907 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:40:49.379 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:40:49.853 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:40:50.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:50.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:50.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:50.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:50.098 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:40:50.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:50.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:50.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:50.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:50.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:50.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:50.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:40:50.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:40:50.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:50.140 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:40:50.140 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 04:40:50.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:50.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:50.325 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:40:50.798 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:40:50.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:51.271 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:40:51.743 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:40:52.216 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:40:52.689 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:40:53.161 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:40:53.633 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:40:54.106 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:40:54.578 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:40:54.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:54.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:54.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:54.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:54.975 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:40:54.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:54.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:54.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:54.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:54.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:54.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:54.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:40:54.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:40:55.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:40:55.052 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:40:55.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:55.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:55.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:55.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:55.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:55.524 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:40:55.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:55.997 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:40:56.468 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:40:56.938 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:40:57.409 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:40:57.882 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:40:58.355 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:40:58.827 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 04:40:59.301 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 04:40:59.773 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 04:40:59.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:59.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:59.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:59.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:59.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:40:59.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:40:59.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:40:59.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:59.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:59.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:59.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:40:59.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:40:59.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:40:59.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:40:59.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:40:59.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:40:59.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:00.245 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 04:41:00.717 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 04:41:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:01.189 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 04:41:01.662 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 04:41:02.135 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 04:41:02.608 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 04:41:03.080 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 04:41:03.553 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 04:41:04.023 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 04:41:04.494 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 04:41:04.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:04.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:04.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:04.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:04.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:04.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:04.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:04.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:04.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:04.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:04.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:04.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:04.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:41:04.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:04.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:04.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:04.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:04.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:04.965 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 04:41:05.438 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 04:41:05.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:05.911 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 04:41:06.383 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 04:41:06.856 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 04:41:07.329 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 04:41:07.802 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 04:41:08.275 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 04:41:08.747 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 04:41:09.219 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 04:41:09.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:09.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:09.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:09.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:09.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:09.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:09.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:09.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:09.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:09.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:09.501 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:09.501 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:09.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:09.556 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:41:09.556 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:41:09.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:09.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:09.692 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 04:41:10.165 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 04:41:10.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:10.639 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 04:41:11.112 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 04:41:11.584 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 04:41:12.058 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 04:41:12.530 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 04:41:13.004 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 04:41:13.477 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 04:41:13.950 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 04:41:14.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:14.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:14.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:14.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:14.305 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:41:14.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:14.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:14.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:14.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:14.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:14.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:14.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:14.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:14.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:14.379 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:41:14.379 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:41:14.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:14.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:14.423 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 04:41:14.896 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 04:41:15.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:15.369 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 04:41:15.842 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 04:41:16.314 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 04:41:16.786 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 04:41:17.258 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 04:41:17.732 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 04:41:18.204 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 04:41:18.676 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 04:41:19.148 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 04:41:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:19.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:19.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:19.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:19.187 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:41:19.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:19.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:19.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:19.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:19.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:19.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:19.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:19.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:19.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:19.246 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:41:19.246 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:41:19.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:19.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:19.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:19.621 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 04:41:20.093 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 04:41:20.567 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 04:41:21.039 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 04:41:21.512 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 04:41:21.985 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 04:41:22.458 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 04:41:22.930 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 04:41:23.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:23.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:23.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:23.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:23.305 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:41:23.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:23.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:23.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:23.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:23.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:23.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:23.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:23.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:23.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:23.357 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:41:23.357 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:41:23.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:23.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:23.401 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 04:41:23.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:23.872 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 04:41:24.345 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 04:41:24.817 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 04:41:25.289 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 04:41:25.763 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 04:41:26.235 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 04:41:26.707 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 04:41:27.179 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 04:41:27.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:27.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:27.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:27.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:27.578 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:41:27.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:27.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:27.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:27.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:27.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:27.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:27.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:27.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:27.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:27.596 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:41:27.596 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:41:27.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:27.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:27.652 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 04:41:27.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:28.124 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 04:41:28.595 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 04:41:29.068 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 04:41:29.541 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 04:41:30.013 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 04:41:30.485 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 04:41:30.958 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 04:41:31.431 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 04:41:31.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:31.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:31.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:31.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:31.846 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:41:31.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:31.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:31.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:31.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:31.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:31.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:31.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:31.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:31.902 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 04:41:31.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:31.911 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:41:31.911 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:41:31.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:31.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:32.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:32.374 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 04:41:32.847 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 04:41:33.319 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 04:41:33.792 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 04:41:34.266 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 04:41:34.737 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 04:41:35.209 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 04:41:35.683 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 04:41:36.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:36.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:36.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:36.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:36.118 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:41:36.118 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=15804 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:41:36.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:36.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:36.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:36.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:36.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:36.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:36.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:36.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:36.154 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 04:41:36.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:36.157 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:41:36.157 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:41:36.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:36.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:36.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:36.625 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 04:41:37.097 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 04:41:37.571 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 04:41:38.043 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 04:41:38.516 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 04:41:38.989 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 04:41:39.461 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 04:41:39.932 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 04:41:40.405 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 04:41:40.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:40.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:40.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:40.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:40.550 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:41:40.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:40.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:40.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:40.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:40.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:40.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:40.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:40.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:40.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:40.587 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:41:40.587 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:41:40.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:40.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:40.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:40.877 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 04:41:41.349 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 04:41:41.822 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 04:41:42.295 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 04:41:42.767 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 04:41:43.241 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 04:41:43.713 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 04:41:44.185 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 04:41:44.659 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 04:41:44.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:44.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:44.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:44.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:44.816 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:41:44.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:44.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:44.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:44.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:44.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:44.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:44.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:44.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:44.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:44.838 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:41:44.838 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:41:44.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:44.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:45.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:45.131 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 04:41:45.603 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 04:41:46.076 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 04:41:46.548 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 04:41:47.021 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 04:41:47.494 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 04:41:47.966 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 04:41:48.455 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 04:41:48.928 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 04:41:49.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:49.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:49.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:49.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:49.089 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:41:49.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:49.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:49.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:41:49.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:49.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:41:49.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:41:49.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:41:49.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:41:49.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:49.111 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:41:49.111 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:41:49.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:49.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:49.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:49.401 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 04:41:49.874 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 04:41:50.342 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 04:41:50.815 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 04:41:51.287 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 04:41:51.759 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 04:41:52.232 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 04:41:52.705 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 04:41:53.177 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 04:41:53.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:41:53.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:41:53.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:41:53.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:41:53.374 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:41:53.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:41:53.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:41:53.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:41:53.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:41:53.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:41:53.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:41:53.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:41:53.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:41:53.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:41:53.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:41:53.382 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:41:58.388 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:41:58.388 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:41:58.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:41:58.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:41:58.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:41:58.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:41:58.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:41:58.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:41:58.400 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:41:58.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:41:58.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:41:58.403 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:41:58.403 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:41:58.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:41:58.404 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:41:58.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:41:58.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:41:58.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:41:58.405 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:41:58.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:41:58.406 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:41:58.406 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:41:58.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:41:58.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:41:58.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:41:58.407 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:41:58.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:41:58.407 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:41:58.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:41:58.409 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:41:58.409 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:41:58.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:41:58.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:41:58.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:41:58.410 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:41:58.410 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:41:58.410 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:41:58.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:41:58.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:41:58.412 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:41:58.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:41:58.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:41:58.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:41:58.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:41:58.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:41:58.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:41:58.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:41:58.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:41:58.413 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:41:58.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:41:58.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:41:58.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:03.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:42:03.426 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:42:03.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:42:03.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:42:03.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:42:03.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:42:03.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:42:03.430 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:42:03.430 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:03.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:42:03.431 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:42:03.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:42:03.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:42:03.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:42:03.434 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:03.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:42:03.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:42:03.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:42:03.435 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:42:03.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:03.436 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:42:03.436 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:42:03.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:42:03.437 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:03.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:42:03.437 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:42:03.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:42:03.437 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:42:03.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:03.439 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:42:03.439 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:42:03.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:42:03.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:03.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:42:03.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:42:03.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:42:03.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:42:03.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:03.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:42:03.441 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:42:03.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:42:03.442 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:42:03.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:03.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:03.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:03.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:03.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:03.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:03.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:03.447 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:42:03.924 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:42:03.971 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:42:03.974 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:42:03.976 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:42:03.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:03.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:03.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:03.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:04.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:04.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:04.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:04.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:04.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:04.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:04.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:04.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:04.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:04.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:04.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:04.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:04.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:04.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:04.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:04.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:04.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:04.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:04.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:04.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:04.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.395 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:42:04.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:04.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:04.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:04.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:04.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:04.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:04.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:04.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:04.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:04.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:04.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:04.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:04.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:04.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:04.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:04.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:04.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:04.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:04.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:04.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:04.835 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=301 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:42:04.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:04.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:04.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:04.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:04.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:04.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:04.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:04.867 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:42:04.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:04.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:04.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:04.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:04.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:05.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:05.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:05.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:05.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:05.338 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:42:05.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:05.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:05.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:05.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:05.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:05.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:05.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:05.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:05.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:05.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:05.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:05.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:05.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:05.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:05.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:05.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:05.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:05.809 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:42:05.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:05.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:05.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:05.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:05.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:05.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:05.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:05.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:05.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:05.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:05.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:05.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:05.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:05.912 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:05.912 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 04:42:05.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:05.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:06.280 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:42:06.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:06.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:06.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:06.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:06.387 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:06.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:06.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:06.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:06.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:06.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:06.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:06.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:06.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:06.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:06.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:06.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:06.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:06.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:06.456 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:06.456 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 04:42:06.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:06.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:06.753 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:42:06.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:06.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:06.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:06.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:06.926 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:06.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:06.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:06.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:06.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:06.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:06.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:06.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:06.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:06.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:06.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:06.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:06.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:06.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:06.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:07.224 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:42:07.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:07.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:07.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:07.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:07.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:07.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:07.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:07.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:07.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:07.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:07.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:07.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:07.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:07.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:07.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:07.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:07.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:07.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:07.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:07.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:07.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:07.696 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:42:08.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:08.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:08.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:08.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:08.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:08.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:08.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:08.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:08.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:08.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:08.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:08.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:08.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:08.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:08.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:08.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:08.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:08.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:08.168 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:42:08.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:08.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:08.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:08.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:08.639 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:42:08.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:08.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:08.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:08.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:08.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:08.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:08.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:08.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:08.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:08.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:08.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:08.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:08.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:08.984 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:08.985 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:42:08.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:08.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:09.113 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:42:09.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:09.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:09.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:09.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:09.393 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:09.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:09.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:09.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:09.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:09.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:09.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:09.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:09.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:09.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:09.455 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:09.456 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:42:09.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:09.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:09.585 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:42:09.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:09.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:09.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:09.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:09.939 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:09.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:09.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:09.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:09.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:09.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:09.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:09.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:09.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:10.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:10.014 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:10.014 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:10.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:10.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:10.057 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:42:10.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:10.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:10.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:10.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:10.216 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:10.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:10.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:10.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:10.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:10.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:10.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:10.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:10.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:10.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:10.284 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:10.285 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:10.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:10.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:10.529 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:42:10.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:10.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:10.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:10.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:10.705 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:10.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:10.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:10.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:10.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:10.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:10.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:10.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:10.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:10.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:10.776 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:10.776 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:10.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:10.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.002 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:42:11.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:11.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:11.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:11.194 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:11.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:11.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:11.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:11.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:11.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:11.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:11.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:11.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:11.269 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:11.270 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:11.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.474 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:42:11.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:11.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:11.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:11.688 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:11.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:11.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:11.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:11.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:11.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:11.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:11.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:11.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:11.765 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:11.765 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:11.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:11.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:11.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:11.868 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:11.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:11.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:11.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:11.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:11.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:11.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:11.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:11.945 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:42:11.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:11.947 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:11.947 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:11.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:11.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:12.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:12.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:12.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:12.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:12.359 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:12.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:12.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:12.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:12.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:12.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:12.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:12.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:12.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:12.416 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:42:12.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:12.428 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:12.428 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:12.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:12.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:12.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:12.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:12.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:12.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:12.847 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:12.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:12.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:12.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:12.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:12.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:12.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:12.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:12.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:12.889 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:42:12.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:12.922 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:12.922 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:12.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:12.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:13.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:13.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:13.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:13.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:13.337 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:13.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:13.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:13.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:13.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:13.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:42:13.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:42:13.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:42:13.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:42:13.345 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:42:13.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:42:13.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:42:18.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:42:18.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:42:18.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:42:18.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:42:18.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:42:18.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:42:18.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:42:18.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:42:18.361 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:18.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:42:18.361 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:42:18.366 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:42:18.366 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:42:18.366 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:42:18.366 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:18.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:42:18.366 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:42:18.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:42:18.367 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:42:18.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:18.370 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:42:18.370 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:42:18.370 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:42:18.370 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:18.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:42:18.370 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:42:18.370 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:42:18.370 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:42:18.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:18.373 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:42:18.373 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:42:18.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:42:18.373 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:18.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:42:18.373 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:42:18.373 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:42:18.373 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:42:18.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:18.376 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:42:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:42:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:42:18.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:42:18.376 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:42:18.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:42:18.377 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:42:18.377 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:18.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:18.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:18.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:42:18.859 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:42:18.899 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:42:18.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:18.900 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:42:18.902 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:42:18.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:18.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:18.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:18.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:18.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:18.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:18.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:18.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:18.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:18.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:18.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:18.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:18.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:19.331 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:42:19.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:19.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:19.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:19.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:19.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:19.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:19.802 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:42:20.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:20.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:20.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:20.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:20.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:20.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:20.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:20.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:20.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:20.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:20.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:20.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:20.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:20.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:20.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:20.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:20.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:20.275 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:42:20.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:20.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:20.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:20.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:20.748 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:42:20.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:20.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:21.220 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:42:21.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:21.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:21.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:21.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:21.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:21.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:21.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:21.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:21.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:21.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:21.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:21.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:21.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:21.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:21.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:21.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:21.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:21.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:21.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:21.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:21.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:21.693 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:42:22.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:22.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:22.165 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:42:22.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:22.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:22.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:22.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:22.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:22.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:22.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:22.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:22.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:22.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:22.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:22.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:22.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:22.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:22.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:22.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:22.637 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:42:22.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:22.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:22.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:22.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:22.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:23.109 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:42:23.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:23.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:23.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:23.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:23.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:23.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:23.581 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:42:24.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:24.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:24.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:24.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:24.054 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:42:24.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:24.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:24.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:24.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:24.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:24.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:24.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:24.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:24.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:24.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:24.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:24.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:24.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:24.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:42:25.000 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:42:25.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:25.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:25.473 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:42:25.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:25.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:25.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:25.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:25.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:25.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:25.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:25.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:25.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:25.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:25.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:25.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:25.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:25.668 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:25.668 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 04:42:25.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:25.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:25.945 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:42:26.416 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:42:26.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:26.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:26.890 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:42:27.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:27.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:27.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:27.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:27.109 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:27.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:27.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:27.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:27.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:27.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:27.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:27.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:27.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:27.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:27.181 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:27.181 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 04:42:27.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:27.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:27.362 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:42:27.834 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:42:28.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:28.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:28.307 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:42:28.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:28.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:28.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:28.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:28.614 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:28.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:28.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:28.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:28.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:28.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:28.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:28.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:28.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:28.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:28.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:28.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:28.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:28.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:28.780 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:42:29.251 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:42:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:29.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:29.724 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:42:30.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:30.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:30.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:30.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:30.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:30.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:30.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:30.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:30.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:30.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:30.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:30.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:30.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:30.197 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:42:30.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:30.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:30.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:30.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:30.669 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:42:31.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:31.140 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:42:31.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:31.611 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:42:31.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:31.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:31.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:31.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:31.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:31.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:31.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:31.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:31.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:31.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:31.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:31.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:31.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:31.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:31.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:31.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:31.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:31.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:32.081 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:42:32.555 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:42:32.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:33.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:33.027 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:42:33.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:33.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:33.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:33.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:33.499 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:42:33.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:33.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:33.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:33.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:33.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:33.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:33.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:33.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:33.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:33.562 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:33.562 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:42:33.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:33.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:33.972 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:42:34.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:34.445 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:42:34.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:34.918 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:42:34.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:34.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:34.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:34.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:34.932 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:34.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:34.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:34.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:34.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:34.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:34.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:34.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:34.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:35.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:35.009 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:35.009 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:42:35.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:35.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:35.390 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:42:35.863 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:42:35.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:35.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:36.336 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:42:36.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:36.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:36.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:36.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:36.437 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:36.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:36.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:36.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:36.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:36.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:36.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:36.458 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:36.458 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:36.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:36.509 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:36.509 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:36.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:36.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:36.810 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:42:37.282 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:42:37.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:37.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:37.754 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:42:37.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:37.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:37.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:37.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:37.911 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:37.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:37.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:37.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:37.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:37.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:37.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:37.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:37.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:37.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:37.974 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:37.974 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:37.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:37.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:38.228 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:42:38.699 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:42:38.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:38.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:39.171 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:42:39.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:39.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:39.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:39.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:39.348 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:39.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:39.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:39.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:39.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:39.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:39.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:39.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:39.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:39.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:39.413 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:39.413 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:39.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:39.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:39.645 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:42:40.117 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:42:40.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:40.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:40.591 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:42:40.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:40.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:40.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:40.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:40.782 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:40.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:40.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:40.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:40.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:40.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:40.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:40.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:40.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:40.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:40.853 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:40.853 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:40.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:40.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:41.063 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:42:41.532 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:42:41.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:41.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:42.002 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:42:42.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:42.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:42.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:42.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:42.214 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:42.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:42.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:42.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:42.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:42.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:42.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:42.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:42.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:42.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:42.276 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:42.276 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:42.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:42.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:42.475 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:42:42.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:42.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:42.947 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:42:43.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:43.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:43.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:43.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:43.341 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:43.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:43.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:43.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:43.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:43.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:43.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:43.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:43.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:43.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:43.395 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:43.395 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:43.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:43.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:43.419 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:42:43.890 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:42:44.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:44.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:44.364 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:42:44.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:44.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:44.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:44.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:44.773 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:44.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:44.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:44.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:44.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:44.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:44.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:44.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:44.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:44.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:44.836 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:42:44.840 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:44.840 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:44.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:44.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:45.308 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:42:45.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:45.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:45.779 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:42:46.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:46.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:46.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:46.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:46.209 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:46.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:46.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:46.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:46.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:46.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:46.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:46.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:46.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:46.251 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:42:46.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:46.280 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:42:46.280 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:42:46.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:46.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:46.723 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:42:47.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:47.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:47.195 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:42:47.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:47.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:47.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:47.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:47.646 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:42:47.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:47.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:47.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:47.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:47.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:42:47.652 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:42:47.652 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:42:47.652 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:42:47.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:42:47.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:42:47.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:42:47.653 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:42:47.653 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:42:47.653 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:42:47.653 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:42:47.653 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:42:47.653 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:42:52.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:42:52.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:42:52.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:42:52.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:42:52.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:42:52.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:42:52.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:42:52.668 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:42:52.668 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:52.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:42:52.669 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:42:52.672 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:42:52.672 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:42:52.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:42:52.673 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:52.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:42:52.673 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:42:52.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:42:52.673 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:42:52.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:52.675 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:42:52.675 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:42:52.675 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:42:52.675 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:52.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:42:52.675 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:42:52.675 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:42:52.675 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:42:52.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:52.677 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:42:52.677 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:42:52.677 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:42:52.677 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:42:52.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:42:52.677 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:42:52.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:42:52.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:42:52.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:42:52.681 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:42:52.681 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:42:52.681 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:42:52.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:42:52.685 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:42:53.163 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:42:53.208 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:42:53.210 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:42:53.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:53.212 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:42:53.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:53.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:53.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:53.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:53.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:53.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:53.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:53.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:53.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:53.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:53.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:53.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:53.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:53.634 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:42:53.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:53.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:53.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:53.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:54.107 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:42:54.579 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:42:54.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:54.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:54.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:54.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:55.052 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:42:55.525 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:42:55.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:55.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:55.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:55.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:55.997 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:42:56.470 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:42:56.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:56.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:56.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:56.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:56.943 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:42:57.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:57.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:57.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:57.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:57.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:42:57.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:42:57.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:42:57.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:57.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:57.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:57.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:42:57.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:42:57.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:42:57.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:42:57.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:42:57.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:57.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:42:57.415 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:42:57.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:42:57.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:42:57.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:42:57.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:42:57.886 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:42:58.354 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:42:58.827 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:42:59.299 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:42:59.770 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:43:00.243 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:43:00.714 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:43:01.185 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:43:01.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:01.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:01.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:01.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:01.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:01.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:01.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:01.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:01.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:01.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:01.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:01.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:01.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:01.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:01.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:01.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:01.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:01.657 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:43:02.129 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:43:02.600 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:43:03.073 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:43:03.545 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:43:04.017 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:43:04.488 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:43:04.961 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:43:05.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:05.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:05.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:05.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:05.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:05.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:05.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:05.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:05.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:05.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:05.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:05.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:05.434 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:43:05.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:05.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:05.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:05.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:05.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:05.906 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:43:06.379 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:43:06.852 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:43:07.324 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:43:07.798 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:43:08.270 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:43:08.742 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:43:09.213 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:43:09.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:09.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:09.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:09.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:09.671 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=3671 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:43:09.671 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=3671 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:43:09.687 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:43:09.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:09.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:09.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:09.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:09.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:09.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:09.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:09.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:09.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:09.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:09.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:09.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:09.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:10.160 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:43:10.632 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:43:11.103 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:43:11.576 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:43:12.049 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:43:12.521 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:43:12.992 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:43:13.466 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:43:13.938 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:43:14.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:14.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:14.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:14.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:14.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:14.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:14.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:14.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:14.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:14.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:14.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:14.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:14.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:14.410 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:43:14.417 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:43:14.417 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 04:43:14.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:14.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:14.881 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:43:15.355 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:43:15.827 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:43:16.290 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:43:16.761 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:43:17.234 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:43:17.707 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:43:18.179 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:43:18.653 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:43:18.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:18.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:18.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:18.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:18.730 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:43:18.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:18.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:18.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:18.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:18.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:18.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:18.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:18.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:18.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:18.796 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:43:18.796 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 04:43:18.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:18.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:19.125 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:43:19.597 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:43:20.070 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:43:20.543 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:43:21.015 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:43:21.488 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:43:21.961 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:43:22.433 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:43:22.907 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:43:23.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:23.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:23.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:23.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:23.127 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:43:23.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:23.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:23.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:23.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:23.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:23.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:23.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:23.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:23.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:43:23.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:23.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:23.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:23.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:23.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:23.379 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:43:23.851 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:43:24.322 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:43:24.795 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:43:25.268 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:43:25.740 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:43:26.211 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:43:26.682 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:43:27.153 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:43:27.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:27.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:27.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:27.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:27.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:27.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:27.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:27.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:27.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:27.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:27.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:27.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:27.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:27.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:27.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:27.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:27.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:27.625 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:43:28.098 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:43:28.570 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 04:43:29.041 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 04:43:29.512 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 04:43:29.982 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 04:43:30.456 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 04:43:30.928 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 04:43:31.400 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 04:43:31.871 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 04:43:31.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:31.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:31.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:31.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:31.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:31.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:31.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:31.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:31.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:31.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:31.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:31.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:31.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:43:31.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:31.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:31.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:31.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:31.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:32.344 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 04:43:32.817 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 04:43:33.289 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 04:43:33.762 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 04:43:34.236 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 04:43:34.708 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 04:43:35.181 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 04:43:35.654 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 04:43:36.126 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 04:43:36.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:36.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:36.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:36.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:36.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:36.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:36.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:36.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:36.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:36.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:36.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:36.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:36.260 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:43:36.260 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:43:36.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:36.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:36.596 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 04:43:37.070 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 04:43:37.543 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 04:43:38.015 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 04:43:38.485 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 04:43:38.957 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 04:43:39.430 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 04:43:39.903 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 04:43:40.375 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 04:43:40.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:40.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:40.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:40.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:40.520 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:43:40.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:40.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:40.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:40.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:40.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:40.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:40.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:40.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:40.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:40.590 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:43:40.590 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:43:40.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:40.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:40.846 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 04:43:41.319 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 04:43:41.796 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 04:43:42.269 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 04:43:42.742 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 04:43:43.215 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 04:43:43.688 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 04:43:44.162 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 04:43:44.635 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 04:43:44.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:44.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:44.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:44.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:44.921 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:43:44.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:44.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:44.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:44.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:44.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:44.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:44.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:44.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:44.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:44.992 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:43:44.992 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:43:44.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:44.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:45.108 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 04:43:45.581 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 04:43:46.053 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 04:43:46.526 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 04:43:46.999 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 04:43:47.471 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 04:43:47.944 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 04:43:48.417 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 04:43:48.889 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 04:43:49.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:49.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:49.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:49.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:49.047 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:43:49.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:49.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:49.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:49.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:49.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:49.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:49.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:49.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:49.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:49.109 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:43:49.109 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:43:49.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:49.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:49.362 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 04:43:49.835 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 04:43:50.307 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 04:43:50.779 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 04:43:51.252 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 04:43:51.724 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 04:43:52.197 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 04:43:52.670 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 04:43:53.142 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 04:43:53.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:53.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:53.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:53.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:53.318 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:43:53.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:53.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:53.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:53.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:53.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:53.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:53.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:53.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:53.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:53.407 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:43:53.407 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:43:53.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:53.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:53.614 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 04:43:54.087 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 04:43:54.559 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 04:43:55.033 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 04:43:55.505 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 04:43:55.977 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 04:43:56.451 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 04:43:56.923 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 04:43:57.396 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 04:43:57.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:57.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:57.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:57.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:57.591 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:43:57.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:43:57.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:43:57.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:43:57.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:57.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:43:57.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:43:57.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:43:57.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:43:57.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:43:57.662 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:43:57.662 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:43:57.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:57.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:43:57.869 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 04:43:58.341 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 04:43:58.813 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 04:43:59.285 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 04:43:59.759 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 04:44:00.231 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 04:44:00.704 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 04:44:01.177 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 04:44:01.649 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 04:44:01.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:01.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:01.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:01.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:01.864 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:44:01.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:01.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:01.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:01.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:01.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:01.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:01.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:01.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:01.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:01.940 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:44:01.940 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:44:01.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:01.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:02.120 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 04:44:02.594 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 04:44:03.066 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 04:44:03.539 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 04:44:04.012 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 04:44:04.484 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 04:44:04.957 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 04:44:05.430 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 04:44:05.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:05.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:05.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:05.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:05.821 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:44:05.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:05.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:05.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:05.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:05.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:05.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:05.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:05.839 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:05.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:05.890 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:44:05.891 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:44:05.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:05.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:05.902 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 04:44:06.374 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 04:44:06.848 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 04:44:07.320 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 04:44:07.792 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 04:44:08.263 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 04:44:08.735 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 04:44:09.208 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 04:44:09.680 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 04:44:10.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:10.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:10.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:10.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:10.092 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:44:10.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:10.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:10.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:10.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:10.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:10.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:10.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:10.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:10.153 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 04:44:10.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:10.164 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:44:10.164 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:44:10.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:10.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:10.626 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 04:44:11.099 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 04:44:11.573 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 04:44:12.045 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 04:44:12.518 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 04:44:12.991 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 04:44:13.463 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 04:44:13.936 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 04:44:14.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:14.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:14.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:14.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:14.364 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:44:14.364 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=17639 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:44:14.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:14.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:14.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:14.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:14.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:14.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:14.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:14.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:14.409 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 04:44:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:14.438 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:44:14.438 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:44:14.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:14.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:14.880 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 04:44:15.352 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 04:44:15.825 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 04:44:16.297 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 04:44:16.769 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 04:44:17.240 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 04:44:17.714 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 04:44:18.186 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 04:44:18.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:18.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:18.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:18.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:18.636 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:44:18.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:44:18.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:44:18.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:44:18.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:44:18.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:44:18.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:44:18.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:44:18.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:44:18.652 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:44:18.652 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:44:18.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:44:23.656 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:44:23.656 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:44:23.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:44:23.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:44:23.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:44:23.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:44:23.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:44:23.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:44:23.659 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:44:23.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:44:23.659 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:44:23.660 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:44:23.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:44:23.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:44:23.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:44:23.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:44:23.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:44:23.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:44:23.661 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:44:23.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:44:23.661 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:44:23.661 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:44:23.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:44:23.661 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:44:23.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:44:23.662 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:44:23.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:44:23.662 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:44:23.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:44:23.663 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:44:23.663 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:44:23.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:44:23.663 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:44:23.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:44:23.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:44:23.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:44:23.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:44:23.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:44:23.665 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:44:23.665 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:44:23.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:23.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:44:23.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:44:23.666 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:44:23.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:44:28.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:44:28.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:44:28.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:44:28.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:44:28.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:44:28.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:44:28.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:44:28.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:44:28.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:44:28.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:44:28.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:44:28.678 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:44:28.678 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:44:28.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:44:28.678 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:44:28.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:44:28.678 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:44:28.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:44:28.679 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:44:28.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:44:28.679 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:44:28.679 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:44:28.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:44:28.679 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:44:28.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:44:28.679 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:44:28.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:44:28.679 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:44:28.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:44:28.680 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:44:28.680 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:44:28.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:44:28.680 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:44:28.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:44:28.680 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:44:28.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:44:28.681 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:44:28.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:44:28.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:44:28.683 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:44:28.683 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:44:28.683 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:44:28.687 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:44:29.165 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:44:29.213 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:44:29.216 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:44:29.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:29.220 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:44:29.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:29.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:29.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:29.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:29.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:29.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:29.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:29.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:29.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:29.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:29.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:29.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:29.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:29.638 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:44:29.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:44:29.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:44:29.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:44:29.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:44:30.109 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:44:30.582 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:44:30.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:44:30.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:44:30.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:44:30.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:44:31.055 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:44:31.527 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:44:31.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:44:31.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:44:31.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:44:31.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:44:32.000 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:44:32.473 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:44:32.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:44:32.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:44:32.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:44:32.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:44:32.945 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:44:33.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:33.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:33.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:33.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:33.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:33.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:33.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:33.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:33.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:33.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:33.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:33.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:33.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:33.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:33.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:33.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:33.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:33.415 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:44:33.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:44:33.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:44:33.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:44:33.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:44:33.886 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:44:34.360 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:44:34.832 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:44:35.304 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:44:35.775 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:44:36.249 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:44:36.721 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:44:37.193 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:44:37.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:37.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:37.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:37.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:37.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:37.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:37.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:37.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:37.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:37.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:37.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:37.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:37.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:37.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:37.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:37.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:37.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:37.666 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:44:38.139 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:44:38.611 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:44:39.082 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:44:39.553 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:44:40.026 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:44:40.499 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:44:40.971 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:44:41.442 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:44:41.915 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:44:42.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:42.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:42.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:42.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:42.051 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=2888 tn=2 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:44:42.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:42.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:42.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:42.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:42.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:42.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:42.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:42.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:42.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:42.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:42.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:42.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:42.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:42.388 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:44:42.860 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:44:43.331 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:44:43.804 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:44:44.277 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:44:44.749 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:44:45.220 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:44:45.693 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:44:46.166 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:44:46.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:46.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:46.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:46.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:46.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:46.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:46.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:46.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:46.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:46.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:46.335 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:46.335 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:46.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:46.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:46.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:46.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:46.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:46.638 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:44:47.109 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:44:47.582 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:44:48.055 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:44:48.527 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:44:49.001 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:44:49.473 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:44:49.945 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:44:50.417 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:44:50.890 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:44:50.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:50.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:50.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:50.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:50.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:50.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:50.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:50.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:50.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:50.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:50.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:50.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:51.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:51.014 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:44:51.015 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 04:44:51.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:51.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:51.363 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:44:51.835 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:44:52.309 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:44:52.782 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:44:53.255 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:44:53.728 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:44:54.200 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:44:54.674 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:44:55.146 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:44:55.619 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:44:55.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:55.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:55.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:55.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:55.824 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:44:55.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:44:55.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:44:55.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:44:55.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:55.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:44:55.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:44:55.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:44:55.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:44:55.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:44:55.895 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:44:55.896 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 04:44:55.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:55.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:44:56.091 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:44:56.565 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:44:57.037 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:44:57.511 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:44:57.983 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:44:58.456 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:44:58.929 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:44:59.401 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:44:59.872 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:45:00.345 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:45:00.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:00.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:00.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:00.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:00.707 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:00.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:00.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:00.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:00.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:00.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:00.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:00.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:00.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:00.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:45:00.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:00.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:00.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:00.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:00.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:00.814 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:45:01.288 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:45:01.760 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:45:02.231 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:45:02.702 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:45:03.173 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:45:03.646 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:45:04.118 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:45:04.591 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 04:45:05.062 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 04:45:05.535 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 04:45:05.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:05.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:05.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:05.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:05.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:05.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:05.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:05.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:05.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:05.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:05.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:05.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:05.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:05.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:05.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:05.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:05.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:06.008 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 04:45:06.480 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 04:45:06.951 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 04:45:07.424 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 04:45:07.897 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 04:45:08.369 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 04:45:08.840 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 04:45:09.311 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 04:45:09.782 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 04:45:10.255 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 04:45:10.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:10.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:10.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:10.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:10.451 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=9021 tn=1 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:45:10.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:10.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:10.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:10.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:10.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:10.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:10.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:10.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:10.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:45:10.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:10.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:10.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:10.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:10.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:10.727 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 04:45:11.199 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 04:45:11.673 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 04:45:12.146 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 04:45:12.618 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 04:45:13.091 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 04:45:13.564 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 04:45:14.037 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 04:45:14.510 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 04:45:14.983 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 04:45:15.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:15.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:15.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:15.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:15.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:15.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:15.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:15.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:15.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:15.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:15.228 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:15.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:15.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:15.276 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:45:15.276 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:45:15.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:15.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:15.455 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 04:45:15.928 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 04:45:16.400 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 04:45:16.872 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 04:45:17.346 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 04:45:17.818 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 04:45:18.291 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 04:45:18.764 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 04:45:19.238 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 04:45:19.711 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 04:45:20.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:20.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:20.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:20.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:20.028 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:20.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:20.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:20.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:20.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:20.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:20.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:20.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:20.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:20.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:20.100 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:45:20.100 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:45:20.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:20.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:20.184 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 04:45:20.656 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 04:45:21.130 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 04:45:21.603 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 04:45:22.075 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 04:45:22.548 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 04:45:23.020 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 04:45:23.492 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 04:45:23.966 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 04:45:24.438 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 04:45:24.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:24.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:24.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:24.910 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 04:45:24.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:24.911 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:24.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:24.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:24.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:24.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:24.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:24.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:24.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:24.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:24.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:24.985 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:45:24.985 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:45:24.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:24.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:25.381 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 04:45:25.855 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 04:45:26.327 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 04:45:26.800 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 04:45:27.273 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 04:45:27.745 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 04:45:28.217 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 04:45:28.691 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 04:45:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:29.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:29.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:29.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:29.011 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:29.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:29.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:29.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:29.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:29.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:29.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:29.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:29.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:29.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:29.080 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:45:29.081 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:45:29.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:29.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:29.163 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 04:45:29.635 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 04:45:30.109 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 04:45:30.581 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 04:45:31.053 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 04:45:31.527 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 04:45:31.999 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 04:45:32.473 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 04:45:32.946 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 04:45:33.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:33.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:33.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:33.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:33.283 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:33.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:33.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:33.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:33.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:33.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:33.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:33.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:33.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:33.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:33.353 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:45:33.353 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:45:33.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:33.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:33.417 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 04:45:33.891 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 04:45:34.364 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 04:45:34.836 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 04:45:35.310 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 04:45:35.782 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 04:45:36.253 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 04:45:36.727 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 04:45:37.200 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 04:45:37.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:37.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:37.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:37.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:37.560 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:37.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:37.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:37.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:37.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:37.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:37.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:37.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:37.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:37.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:37.632 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:45:37.632 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:45:37.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:37.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:37.671 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 04:45:38.144 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 04:45:38.617 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 04:45:39.090 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 04:45:39.563 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 04:45:40.035 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 04:45:40.507 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 04:45:40.981 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 04:45:41.453 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 04:45:41.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:41.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:41.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:41.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:41.834 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:41.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:41.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:41.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:41.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:41.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:41.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:41.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:41.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:41.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:41.904 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:45:41.904 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:45:41.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:41.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:41.925 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 04:45:42.398 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 04:45:42.870 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 04:45:43.344 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 04:45:43.816 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 04:45:44.289 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 04:45:44.762 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 04:45:45.234 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 04:45:45.707 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 04:45:46.180 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 04:45:46.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:46.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:46.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:46.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:46.264 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:46.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:46.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:46.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:46.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:46.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:46.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:46.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:46.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:46.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:46.336 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:45:46.337 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:45:46.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:46.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:46.652 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 04:45:47.124 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 04:45:47.597 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 04:45:48.070 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 04:45:48.542 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 04:45:49.013 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 04:45:49.487 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 04:45:49.959 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 04:45:50.431 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 04:45:50.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:50.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:50.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:50.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:50.537 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:50.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:50.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:50.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:50.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:50.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:50.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:50.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:50.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:50.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:50.609 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:45:50.610 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:45:50.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:50.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:50.902 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 04:45:51.375 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 04:45:51.847 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 04:45:52.320 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 04:45:52.793 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 04:45:53.266 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 04:45:53.737 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 04:45:54.211 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 04:45:54.683 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 04:45:54.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:54.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:54.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:54.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:54.805 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:54.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:54.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:54.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:45:54.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:54.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:45:54.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:45:54.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:45:54.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:45:54.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:54.876 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:45:54.876 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:45:54.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:54.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:55.155 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 04:45:55.628 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 04:45:56.101 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 04:45:56.574 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 04:45:57.048 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 04:45:57.520 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 04:45:57.992 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 04:45:58.465 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 04:45:58.937 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 04:45:59.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:45:59.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:45:59.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:45:59.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:45:59.077 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:45:59.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:45:59.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:45:59.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:45:59.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:45:59.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:45:59.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:45:59.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:45:59.084 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:45:59.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:45:59.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:45:59.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:45:59.084 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19516 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:45:59.084 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19516 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:45:59.084 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19516 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:45:59.084 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19516 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:45:59.084 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19516 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:45:59.084 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=19516 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:46:04.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:46:04.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:46:04.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:46:04.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:46:04.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:46:04.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:46:04.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:46:04.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:46:04.094 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:04.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:46:04.094 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:46:04.095 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:46:04.095 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:46:04.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:46:04.095 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:04.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:46:04.096 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:46:04.096 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:46:04.096 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:46:04.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:04.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:46:04.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:46:04.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:46:04.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:04.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:46:04.096 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:46:04.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:46:04.097 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:46:04.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:04.098 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:46:04.098 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:46:04.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:46:04.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:04.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:46:04.098 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:46:04.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:46:04.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:46:04.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:46:04.100 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:46:04.100 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:46:04.100 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:04.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:04.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:04.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:46:04.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:46:04.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:46:04.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:46:04.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:46:04.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:46:04.101 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:46:09.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:46:09.109 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:46:09.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:46:09.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:46:09.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:46:09.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:46:09.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:46:09.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:46:09.115 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:09.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:46:09.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:46:09.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:46:09.118 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:46:09.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:46:09.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:09.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:46:09.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:46:09.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:46:09.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:46:09.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:09.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:46:09.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:46:09.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:46:09.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:09.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:46:09.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:46:09.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:46:09.121 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:46:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:09.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:46:09.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:46:09.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:46:09.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:09.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:46:09.123 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:46:09.123 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:46:09.123 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:46:09.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:46:09.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:46:09.126 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:46:09.126 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:09.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:09.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:46:09.608 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:46:09.654 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:46:09.657 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:46:09.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:09.659 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:46:09.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:09.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:09.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:09.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:09.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:09.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:09.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:09.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:09.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:09.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:09.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:09.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:09.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:10.080 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:46:10.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:10.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:10.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:10.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:10.551 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:46:10.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:10.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:10.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:10.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:10.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:10.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:10.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:10.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:10.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:10.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:10.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:10.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:10.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:10.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:10.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:10.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:10.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:11.024 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:46:11.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:11.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:11.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:11.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:11.497 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:46:11.970 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:46:12.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:12.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:12.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:12.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:12.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:12.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:12.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:12.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:12.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:12.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:12.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:12.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:12.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:12.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:12.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:12.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:12.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:12.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:12.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:12.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:12.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:12.443 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:46:12.916 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:46:13.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:13.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:13.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:13.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:13.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:13.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:13.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:13.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:13.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:13.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:13.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:13.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:13.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:13.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:13.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:13.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:13.387 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:46:13.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:13.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:13.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:13.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:13.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:13.859 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:46:14.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:14.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:14.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:14.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:14.332 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:46:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:14.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:14.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:14.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:14.804 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:46:14.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:14.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:14.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:14.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:14.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:14.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:14.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:14.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:14.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:14.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:14.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:14.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:14.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:15.276 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:46:15.750 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:46:15.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:15.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:15.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:15.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:15.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:15.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:15.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:15.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:15.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:15.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:15.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:15.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:15.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:15.940 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:15.940 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 04:46:15.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:15.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:16.222 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:46:16.695 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:46:16.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:16.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:16.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:16.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:16.893 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:16.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:16.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:16.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:16.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:16.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:16.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:16.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:16.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:16.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:16.968 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:16.969 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 04:46:16.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:16.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:17.166 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:46:17.639 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:46:17.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:17.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:17.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:17.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:17.915 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:17.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:17.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:17.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:17.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:17.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:17.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:17.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:17.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:17.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:17.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:17.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:17.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:17.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:17.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:18.111 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:46:18.583 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:46:18.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:18.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:18.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:18.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:18.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:18.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:18.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:18.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:18.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:18.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:18.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:18.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:19.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:19.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:19.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:19.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:19.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:19.054 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:46:19.525 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:46:19.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:19.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:19.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:19.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:19.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:19.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:19.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:19.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:19.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:19.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:19.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:19.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:19.996 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:46:20.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:20.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:20.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:20.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:20.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:20.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:20.467 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:46:20.940 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:46:21.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:21.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:21.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:21.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:21.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:21.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:21.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:21.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:21.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:21.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:21.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:21.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:21.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:21.400 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:21.400 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:46:21.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:21.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:21.412 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:46:21.885 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:46:22.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:22.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:22.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:22.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:22.305 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:22.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:22.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:22.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:22.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:22.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:22.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:22.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:22.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:22.357 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:46:22.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:22.376 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:22.376 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:46:22.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:22.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:22.830 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:46:23.302 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:46:23.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:23.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:23.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:23.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:23.331 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:23.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:23.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:23.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:23.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:23.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:23.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:23.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:23.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:23.400 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:23.400 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:46:23.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:23.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:23.771 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:46:24.243 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:46:24.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:24.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:24.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:24.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:24.403 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:24.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:24.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:24.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:24.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:24.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:24.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:24.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:24.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:24.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:24.466 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:24.466 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:46:24.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:24.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:24.715 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:46:25.188 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:46:25.662 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:46:25.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:25.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:25.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:25.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:25.839 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:25.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:25.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:25.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:25.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:25.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:25.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:25.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:25.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:25.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:25.900 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:25.900 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:46:25.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:25.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:26.134 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:46:26.606 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:46:27.079 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:46:27.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:27.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:27.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:27.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:27.275 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:27.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:27.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:27.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:27.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:27.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:27.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:27.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:27.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:27.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:27.341 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:27.341 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:46:27.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:27.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:27.551 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:46:28.025 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:46:28.497 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:46:28.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:28.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:28.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:28.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:28.712 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:28.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:28.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:28.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:28.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:28.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:28.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:28.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:28.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:28.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:28.776 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:28.776 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:46:28.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:28.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:28.969 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:46:29.442 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:46:29.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:29.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:29.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:29.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:29.833 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:29.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:29.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:29.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:29.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:29.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:29.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:29.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:29.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:29.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:29.900 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:29.901 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:46:29.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:29.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:29.915 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:46:30.387 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:46:30.859 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:46:31.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:31.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:31.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:31.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:31.270 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:31.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:31.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:31.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:31.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:31.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:31.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:31.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:31.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:31.332 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:46:31.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:31.340 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:31.341 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:46:31.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:31.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:31.804 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:46:32.278 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:46:32.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:32.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:32.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:32.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:32.707 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:32.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:32.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:32.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:32.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:32.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:32.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:32.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:32.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:32.750 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:46:32.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:32.776 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:32.777 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:46:32.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:32.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:33.221 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:46:33.693 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:46:34.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:34.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:34.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:34.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:34.160 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:34.166 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:46:34.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:34.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:34.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:34.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:34.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:46:34.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:46:34.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:46:34.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:46:34.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:46:34.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:46:34.168 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:46:39.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:46:39.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:46:39.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:46:39.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:46:39.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:46:39.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:46:39.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:46:39.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:46:39.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:39.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:46:39.186 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:46:39.190 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:46:39.191 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:46:39.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:46:39.191 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:39.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:46:39.192 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:46:39.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:46:39.192 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:46:39.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:39.194 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:46:39.195 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:46:39.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:46:39.195 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:39.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:46:39.195 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:46:39.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:46:39.196 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:46:39.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:39.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:46:39.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:46:39.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:46:39.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:46:39.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:46:39.198 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:46:39.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:46:39.199 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:46:39.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:46:39.204 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:46:39.204 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:46:39.204 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:46:39.209 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:46:39.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:46:39.740 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:46:39.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:39.743 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:46:39.744 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:46:39.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:39.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:39.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:39.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:39.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:39.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:39.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:39.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:39.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:46:39.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:39.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:39.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:39.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:40.158 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:46:40.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:40.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:40.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:40.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:40.630 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:46:41.104 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:46:41.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:41.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:41.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:41.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:41.576 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:46:42.049 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:46:42.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:42.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:42.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:42.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:42.522 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:46:42.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:42.995 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:46:43.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:43.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:43.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:43.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:43.467 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:46:43.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:43.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:43.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:43.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:43.541 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:46:43.542 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:46:43.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:43.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:43.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:43.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:43.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:43.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:43.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:46:43.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:43.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:43.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:43.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:43.938 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:46:44.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:46:44.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:46:44.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:46:44.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:46:44.411 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:46:44.884 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:46:45.356 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:46:45.827 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:46:46.298 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:46:46.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:46.771 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:46:47.244 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:46:47.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:47.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:47.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:47.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:47.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:47.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:47.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:47.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:47.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:47.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:47.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:47.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:47.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:46:47.457 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:47.458 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:46:47.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:47.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:47.716 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:46:48.190 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:46:48.662 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:46:49.134 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:46:49.608 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:46:50.081 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:46:50.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:50.553 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:46:51.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:51.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:51.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:51.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:51.007 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:51.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:51.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:51.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:51.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:51.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:51.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:51.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:46:51.025 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:46:51.025 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:46:51.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:51.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:51.027 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:46:51.500 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:46:51.974 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:46:52.446 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:46:52.920 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:46:53.393 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:46:53.865 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:46:54.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:54.338 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:46:54.811 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:46:54.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:54.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:54.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:54.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:54.869 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:46:54.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:54.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:54.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:54.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:54.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:54.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:54.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:54.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:54.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:46:54.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:54.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:54.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:54.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:55.284 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:46:55.755 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:46:56.228 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:46:56.700 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:46:57.172 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:46:57.643 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:46:58.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:58.116 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:46:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:46:58.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:58.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:46:58.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:46:58.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:46:58.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:58.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:58.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:58.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:46:58.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:46:58.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:46:58.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:46:58.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:46:58.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:58.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:46:58.588 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:46:59.060 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:46:59.531 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:47:00.005 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:47:00.477 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:47:00.949 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:47:01.420 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:47:01.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:01.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:01.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:01.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:01.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:01.859 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=4891 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:01.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:01.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:01.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:01.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:01.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:01.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:01.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:01.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:01.890 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:47:01.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:01.922 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:47:01.922 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:47:01.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:01.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:02.362 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:47:02.836 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:47:03.308 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:47:03.781 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:47:04.254 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:47:04.725 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:47:05.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:05.198 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:47:05.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:05.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:05.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:05.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:05.591 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:47:05.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:05.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:05.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:05.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:05.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:05.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:05.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:05.618 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:47:05.618 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:47:05.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:05.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:05.671 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:47:06.144 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:47:06.617 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:47:07.090 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:47:07.563 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:47:08.035 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:47:08.507 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:47:08.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:08.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:08.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:08.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:08.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:08.902 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:47:08.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:47:08.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:47:08.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:47:08.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:47:08.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:47:08.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:47:08.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:47:08.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:47:08.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:47:08.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:47:08.917 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:47:08.917 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6415 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:08.919 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:13.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:47:13.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:47:13.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:47:13.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:47:13.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:47:13.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:47:13.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:47:13.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:47:13.930 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:47:13.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:47:13.930 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:47:13.931 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:47:13.932 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:47:13.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:47:13.932 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:47:13.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:47:13.932 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:47:13.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:47:13.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:47:13.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:47:13.933 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:47:13.933 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:47:13.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:47:13.933 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:47:13.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:47:13.933 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:47:13.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:47:13.933 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:47:13.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:47:13.934 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:47:13.934 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:47:13.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:47:13.934 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:47:13.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:47:13.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:47:13.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:47:13.934 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:47:13.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:47:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:47:13.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:47:13.937 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:47:13.937 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:47:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:47:13.941 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:47:14.419 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:47:14.465 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:47:14.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:14.469 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:47:14.471 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:47:14.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:14.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:14.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:14.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:14.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:14.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:14.501 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:14.501 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:14.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:14.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:14.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:14.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:14.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:14.892 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:47:14.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:47:14.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:47:14.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:47:14.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:47:15.365 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:47:15.838 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:47:15.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:47:15.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:47:15.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:47:15.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:47:16.310 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:47:16.784 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:47:16.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:47:16.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:47:16.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:47:16.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:47:17.256 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:47:17.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:17.729 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:47:17.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:47:17.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:47:17.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:47:17.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:47:18.199 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:47:18.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:18.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:18.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:18.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:18.273 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=936 tn=2 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:18.273 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=936 tn=3 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:18.273 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=936 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:18.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:18.274 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:18.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:18.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:18.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:18.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:18.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:18.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:18.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:18.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:18.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:18.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:18.673 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:47:18.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:47:18.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:47:18.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:47:18.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:47:19.145 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:47:19.618 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:47:20.089 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:47:20.562 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:47:21.035 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:47:21.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:21.507 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:47:21.978 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:47:22.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:22.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:22.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:22.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:22.125 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=1768 tn=3 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:22.126 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=1768 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:22.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:22.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:22.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:22.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:22.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:22.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:22.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:22.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:22.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:22.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:22.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:22.449 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:47:22.922 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:47:23.394 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:47:23.867 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:47:24.338 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:47:24.811 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:47:25.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:25.284 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:47:25.756 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:47:25.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:25.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:25.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:25.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:25.978 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=2600 tn=2 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:25.978 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=2600 tn=3 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:25.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:25.978 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=2600 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:25.978 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=2600 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:25.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:25.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:25.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:25.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:25.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:25.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:25.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:25.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:25.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:25.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:26.227 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:47:26.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:26.700 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:47:26.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:26.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:26.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:26.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:26.938 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=2808 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:47:26.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:26.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:26.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:26.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:26.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:26.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:26.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:26.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:27.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:27.006 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:47:27.006 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:47:27.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:27.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:27.173 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:47:27.646 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:47:28.119 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:47:28.592 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:47:29.064 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:47:29.537 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:47:30.010 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:47:30.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:30.482 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:47:30.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:30.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:30.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:30.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:30.556 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:47:30.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:30.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:30.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:30.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:30.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:30.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:30.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:30.575 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:47:30.575 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:47:30.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:30.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:30.955 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:47:31.428 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:47:31.901 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:47:32.374 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:47:32.847 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:47:33.318 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:47:33.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:33.790 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:47:34.263 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:47:34.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:34.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:34.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:34.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:34.408 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:47:34.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:34.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:34.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:34.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:34.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:34.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:34.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:34.446 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:47:34.446 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:47:34.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:34.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:34.736 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:47:35.207 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:47:35.680 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:47:36.153 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:47:36.626 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:47:37.099 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:47:37.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:37.572 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:47:38.044 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:47:38.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:38.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:38.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:38.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:38.267 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:47:38.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:38.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:38.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:38.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:38.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:38.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:38.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:38.280 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:47:38.280 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:47:38.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:38.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:38.515 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:47:38.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:38.986 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:47:39.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:39.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:39.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:39.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:39.227 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:47:39.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:39.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:39.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:39.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:39.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:39.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:39.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:39.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:39.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:39.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:39.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:39.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:39.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:39.459 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:47:39.932 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:47:40.404 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:47:40.875 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:47:41.346 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:47:41.819 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:47:42.292 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:47:42.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:42.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:42.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:42.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:42.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:42.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:42.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:42.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:42.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:42.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:42.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:42.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:42.764 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:47:42.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:42.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:42.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:42.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:43.235 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:47:43.705 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:47:44.179 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:47:44.651 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:47:45.123 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:47:45.594 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:47:45.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:46.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:46.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:46.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:46.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:46.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:46.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:46.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:46.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:46.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:46.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:46.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:46.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:46.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:46.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:46.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:46.067 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:47:46.539 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:47:47.012 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:47:47.483 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:47:47.956 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:47:48.428 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:47:48.901 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:47:49.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:49.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:49.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:49.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:49.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:49.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:49.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:49.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:49.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:49.343 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:49.343 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:49.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:49.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:49.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:49.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:49.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:49.374 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:47:49.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:49.847 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 04:47:50.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:50.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:50.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:50.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:50.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:50.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:50.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:50.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:50.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:50.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:50.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:50.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:50.318 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 04:47:50.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:50.346 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:47:50.346 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:47:50.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:50.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:50.791 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 04:47:51.264 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 04:47:51.736 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 04:47:52.209 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 04:47:52.682 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 04:47:53.154 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 04:47:53.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:53.626 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 04:47:54.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:54.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:54.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:54.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:54.018 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:47:54.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:54.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:54.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:54.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:54.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:54.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:54.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:54.045 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:47:54.046 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:47:54.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:54.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:54.099 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 04:47:54.572 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 04:47:55.045 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 04:47:55.518 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 04:47:55.990 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 04:47:56.464 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 04:47:56.935 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 04:47:57.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:57.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:47:57.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:57.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:47:57.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:47:57.331 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:47:57.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:47:57.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:57.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:47:57.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:47:57.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:47:57.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:47:57.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:47:57.357 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:47:57.358 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:47:57.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:57.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:47:57.408 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 04:47:57.879 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 04:47:58.353 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 04:47:58.825 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 04:47:59.297 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 04:47:59.770 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 04:48:00.243 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 04:48:00.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:48:00.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:48:00.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:48:00.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:48:00.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:48:00.636 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:48:00.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:48:00.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:48:00.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:48:00.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:48:00.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:48:00.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:48:00.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:48:00.663 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:48:00.663 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:48:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:48:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:48:00.717 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 04:48:01.190 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 04:48:01.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:48:01.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:48:01.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:48:01.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:48:01.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:48:01.583 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:48:01.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:01.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:01.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:01.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:01.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:01.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:01.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:01.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:01.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:48:01.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:48:01.598 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:48:01.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10291 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:01.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:01.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:01.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:01.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:01.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:01.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:01.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:06.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:48:06.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:48:06.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:06.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:06.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:06.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:06.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:06.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:48:06.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:06.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:48:06.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:48:06.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:48:06.617 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:48:06.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:48:06.617 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:06.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:06.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:48:06.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:48:06.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:48:06.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:06.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:48:06.620 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:48:06.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:48:06.620 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:06.620 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:48:06.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:06.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:48:06.620 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:48:06.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:06.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:48:06.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:48:06.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:48:06.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:06.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:06.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:48:06.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:48:06.624 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:48:06.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:06.627 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:48:06.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:48:06.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:48:06.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:48:06.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:48:06.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:48:06.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:48:06.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:06.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:48:06.628 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:48:06.628 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:48:06.628 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:06.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:06.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:06.633 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:48:07.111 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:48:07.156 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:48:07.158 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:48:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:48:07.161 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:48:07.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:48:07.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:48:07.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:48:07.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:48:07.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:48:07.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:48:07.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:48:07.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:48:07.583 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:48:07.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:07.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:07.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:07.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:08.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:48:08.522 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:48:08.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:08.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:08.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:08.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:08.995 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:48:09.467 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:48:09.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:09.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:09.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:09.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:09.940 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:48:10.413 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:48:10.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:10.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:10.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:10.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:10.885 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:48:11.357 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:48:11.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:11.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:11.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:11.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:11.827 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:48:12.297 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:48:12.767 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:48:13.239 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:48:13.709 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:48:14.179 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:48:14.651 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:48:15.122 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:48:15.593 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:48:15.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:48:15.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:48:15.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:15.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:15.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:15.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:15.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:15.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:15.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:15.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:15.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:48:15.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:48:15.954 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:48:15.954 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:15.955 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:15.955 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:15.955 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:15.955 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:15.955 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:15.955 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:15.955 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:15.955 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:20.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:48:20.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:48:20.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:20.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:20.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:20.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:20.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:20.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:48:20.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:20.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:48:20.973 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:48:20.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:48:20.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:48:20.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:48:20.979 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:20.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:20.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:48:20.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:48:20.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:48:20.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:20.983 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:48:20.983 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:48:20.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:48:20.984 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:20.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:20.984 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:48:20.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:48:20.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:48:20.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:20.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:48:20.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:48:20.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:48:20.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:20.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:20.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:48:20.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:48:20.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:48:20.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:20.990 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:48:20.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:48:20.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:48:20.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:48:20.990 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:48:20.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:48:20.991 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:48:20.991 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:48:20.991 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:20.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:20.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:20.996 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:48:21.475 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:48:21.524 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:48:21.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:48:21.528 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:48:21.530 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:48:21.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:48:21.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:48:21.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:48:21.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:48:21.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:48:21.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:48:21.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:48:21.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:48:21.947 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:48:21.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:21.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:21.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:21.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:22.418 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:48:22.891 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:48:22.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:22.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:22.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:22.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:23.360 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:48:23.830 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:48:23.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:23.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:23.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:23.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:24.304 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:48:24.776 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:48:24.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:24.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:24.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:24.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:25.248 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:48:25.719 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:48:25.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:25.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:25.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:25.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:26.188 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:48:26.656 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:48:27.127 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:48:27.597 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:48:28.069 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:48:28.539 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:48:29.010 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:48:29.481 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:48:29.952 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:48:30.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:48:30.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:48:30.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:30.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:30.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:30.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:30.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:30.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:30.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:30.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:30.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:48:30.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:48:30.310 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:48:30.311 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:30.311 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:30.311 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:30.311 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:30.311 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:30.311 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:48:35.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:48:35.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:48:35.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:35.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:35.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:35.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:35.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:35.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:48:35.320 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:35.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:48:35.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:48:35.324 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:48:35.324 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:48:35.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:48:35.324 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:35.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:35.325 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:48:35.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:48:35.325 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:48:35.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:35.327 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:48:35.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:48:35.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:48:35.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:35.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:35.327 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:48:35.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:48:35.327 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:48:35.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:35.329 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:48:35.329 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:48:35.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:48:35.329 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:35.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:35.329 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:48:35.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:48:35.329 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:48:35.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:48:35.332 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:48:35.332 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:48:35.332 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:48:35.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:35.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:35.337 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:48:35.815 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:48:35.861 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:48:35.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:48:35.864 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:48:35.866 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:48:35.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:48:35.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:48:35.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:48:36.287 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:48:36.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:36.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:36.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:36.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:36.756 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:48:36.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:48:36.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:48:36.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:48:36.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:48:36.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:48:37.229 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:48:37.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:37.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:37.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:37.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:37.701 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:48:38.171 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:48:38.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:38.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:38.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:38.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:38.643 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:48:39.113 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:48:39.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:39.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:39.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:39.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:39.584 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:48:40.055 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:48:40.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:40.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:40.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:40.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:40.525 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:48:40.996 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:48:41.467 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:48:41.937 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:48:42.409 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:48:42.880 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:48:43.350 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:48:43.820 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:48:44.292 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:48:44.762 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:48:45.234 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:48:45.704 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:48:46.175 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:48:46.648 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:48:47.121 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:48:47.593 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:48:48.064 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:48:48.537 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:48:48.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:48:48.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:48:48.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:48.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:48.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:48.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:48.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:48.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:48.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:48.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:48:48.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:48:48.722 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:48:48.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:53.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:48:53.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:48:53.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:53.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:53.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:53.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:53.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:48:53.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:48:53.733 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:53.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:48:53.733 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:48:53.734 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:48:53.734 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:48:53.734 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:48:53.734 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:53.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:48:53.734 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:48:53.735 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:48:53.735 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:48:53.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:53.735 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:48:53.735 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:48:53.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:48:53.735 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:53.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:48:53.735 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:48:53.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:48:53.735 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:48:53.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:53.737 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:48:53.737 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:48:53.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:48:53.737 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:48:53.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:48:53.737 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:48:53.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:48:53.737 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:48:53.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:48:53.739 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:48:53.739 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:48:53.739 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:48:53.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:53.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:53.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:48:53.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:48:53.744 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:48:54.221 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:48:54.267 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:48:54.269 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:48:54.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:48:54.272 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:48:54.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:48:54.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:48:54.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:48:54.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:48:54.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:48:54.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:48:54.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:48:54.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:48:54.694 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:48:54.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:54.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:54.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:54.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:55.165 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:48:55.311 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:48:55.636 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:48:55.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:55.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:55.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:55.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:55.837 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:48:56.109 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:48:56.353 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:48:56.581 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:48:56.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:56.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:56.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:56.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:57.053 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:48:57.527 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:48:57.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:57.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:57.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:57.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:57.999 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:48:58.374 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:48:58.471 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:48:58.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:48:58.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:48:58.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:48:58.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:48:58.907 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:48:58.942 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:48:59.413 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:48:59.425 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:48:59.884 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:48:59.942 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:49:00.357 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:49:00.830 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:49:01.302 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:49:01.776 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:49:01.947 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:49:02.248 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:49:02.720 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:49:03.191 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:49:03.665 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:49:03.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:03.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:03.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:03.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:03.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:03.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:03.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:03.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:03.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:03.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:03.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:03.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:03.968 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:49:03.969 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:03.969 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:03.969 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:03.969 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:08.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:08.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:08.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:08.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:08.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:08.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:08.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:08.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:08.987 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:08.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:08.987 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:49:08.989 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:49:08.989 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:49:08.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:08.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:08.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:08.990 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:49:08.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:08.990 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:49:08.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:08.991 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:49:08.992 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:49:08.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:08.992 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:08.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:08.992 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:49:08.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:08.992 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:49:08.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:08.993 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:49:08.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:49:08.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:08.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:08.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:08.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:49:08.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:08.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:49:08.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:08.995 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:49:08.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:49:08.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:49:08.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:49:08.995 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:49:08.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:49:08.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:49:08.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:08.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:49:08.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:49:08.996 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:49:08.996 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:49:08.996 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:08.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:09.000 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:49:09.479 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:49:09.523 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:49:09.525 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:49:09.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:09.527 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:49:09.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:09.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:09.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:09.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:09.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:09.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:09.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:09.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:09.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:09.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:09.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:09.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:09.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:09.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:09.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:09.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:09.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:09.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:09.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:09.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:09.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:09.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:09.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:09.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:09.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:09.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:09.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:09.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:09.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:09.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:09.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:09.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:09.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:09.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:09.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:09.951 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:49:09.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:09.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:09.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:09.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:09.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:09.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:09.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:10.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:10.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.422 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:49:10.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.514 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:10.514 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 04:49:10.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.523 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:10.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.563 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:10.563 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 04:49:10.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.568 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:10.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:10.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:10.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.748 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:10.748 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:49:10.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.764 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:10.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.796 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:10.796 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:49:10.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.813 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:10.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.840 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:10.840 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:49:10.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.888 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:49:10.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:10.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.956 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:10.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:10.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:10.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:10.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:10.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:10.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:10.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:10.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:10.977 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:10.977 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:49:10.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:10.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:11.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:11.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:11.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:11.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:11.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:11.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:11.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:11.210 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:11.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:11.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:11.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:11.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:11.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:11.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:11.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:11.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:11.269 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:11.269 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:49:11.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.358 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:49:11.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:11.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:11.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:11.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:11.474 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:11.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:11.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:11.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:11.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:11.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:11.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:11.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:11.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:11.496 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:11.496 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:49:11.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:11.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:11.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:11.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:11.719 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:11.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:11.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:11.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:11.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:11.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:11.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:11.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:11.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:11.785 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:11.785 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:49:11.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.829 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:49:11.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:11.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:11.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:11.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:11.972 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:11.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:11.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:11.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:11.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:11.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:11.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:11.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:11.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:12.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:12.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:12.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:12.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:12.021 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:12.021 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:49:12.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:12.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:12.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:12.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:12.226 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:12.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:12.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:12.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:12.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:12.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:12.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:12.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:12.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:12.246 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:12.246 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:49:12.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.301 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:49:12.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:12.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:12.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:12.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:12.490 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:12.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:12.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:12.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:12.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:12.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:12.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:12.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:12.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:12.537 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:49:12.537 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:49:12.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:12.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:12.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:12.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:12.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:12.735 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:49:12.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:12.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:12.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:12.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:12.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:12.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:12.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:12.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:12.749 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:49:12.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:12.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:12.750 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=813 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:12.750 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=813 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:12.750 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=813 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:12.750 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=813 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:12.750 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=813 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:12.750 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=813 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:17.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:17.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:17.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:17.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:17.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:17.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:17.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:17.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:17.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:17.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:17.755 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:49:17.756 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:49:17.756 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:49:17.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:17.756 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:17.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:17.756 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:49:17.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:17.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:49:17.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:17.757 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:49:17.757 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:49:17.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:17.757 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:17.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:17.757 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:49:17.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:17.757 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:49:17.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:17.759 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:49:17.759 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:49:17.759 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:17.759 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:17.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:17.759 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:49:17.759 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:17.759 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:49:17.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:49:17.761 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:49:17.761 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:49:17.761 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:17.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:17.766 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:49:18.244 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:49:18.292 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:49:18.294 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:49:18.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:18.296 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:49:18.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:18.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:18.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:18.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:18.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:18.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:18.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:18.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:18.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 04:49:18.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:18.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:18.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:18.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:18.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:18.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:49:18.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:18.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:18.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:18.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:19.187 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:49:19.660 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:49:19.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:19.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:19.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:19.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:20.133 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:49:20.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:20.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:20.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:20.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:20.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:20.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:20.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:20.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:20.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:20.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:20.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:20.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:20.411 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:49:20.411 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:20.411 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:20.411 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:20.411 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:20.411 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:20.411 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:49:25.415 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:25.415 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:25.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:25.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:25.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:25.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:25.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:25.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:25.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:25.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:25.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:49:25.431 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:49:25.432 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:49:25.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:25.432 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:25.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:25.432 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:49:25.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:25.432 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:49:25.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:25.436 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:49:25.436 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:49:25.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:25.437 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:25.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:25.437 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:49:25.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:25.437 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:49:25.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:25.439 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:49:25.439 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:49:25.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:25.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:25.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:25.440 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:49:25.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:25.440 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:49:25.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:25.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:49:25.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:49:25.442 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:49:25.443 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:25.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:25.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:25.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:25.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:25.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:25.444 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:49:25.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:25.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:30.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:30.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:30.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:30.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:30.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:30.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:30.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:30.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:30.455 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:30.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:30.455 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:49:30.456 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:49:30.456 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:49:30.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:30.456 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:30.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:30.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:49:30.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:30.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:49:30.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:30.457 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:49:30.457 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:49:30.457 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:30.457 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:30.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:30.458 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:49:30.458 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:30.458 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:49:30.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:30.459 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:49:30.459 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:49:30.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:30.459 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:30.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:30.459 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:49:30.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:30.459 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:49:30.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:49:30.461 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:49:30.461 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:49:30.461 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:30.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:30.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:30.466 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:49:30.942 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:49:30.981 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:49:30.982 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:49:30.982 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:49:30.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:31.406 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:49:31.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:31.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:31.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:31.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:31.876 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:49:32.351 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:49:32.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:32.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:32.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:32.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:32.823 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:49:33.294 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:49:33.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:33.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:33.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:33.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:33.767 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:49:34.240 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:49:34.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:34.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:34.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:34.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:34.712 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:49:35.185 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:49:35.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:35.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:35.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:35.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:35.658 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:49:36.129 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:49:36.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:36.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:36.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:36.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:36.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:36.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:36.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:36.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:36.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:36.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:36.484 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:49:41.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:41.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:41.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:41.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:41.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:41.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:41.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:41.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:41.498 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:41.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:41.499 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:49:41.505 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:49:41.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:49:41.506 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:41.506 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:41.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:41.507 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:49:41.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:41.507 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:49:41.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:41.509 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:49:41.510 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:49:41.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:41.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:41.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:41.510 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:49:41.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:41.510 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:49:41.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:41.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:49:41.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:49:41.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:41.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:41.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:41.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:49:41.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:41.513 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:49:41.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:41.518 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:49:41.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:49:41.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:49:41.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:49:41.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:49:41.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:49:41.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:49:41.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:41.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:49:41.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:49:41.519 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:49:41.519 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:49:41.519 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:41.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:41.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:41.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:41.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:41.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:41.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:41.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:41.524 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:49:42.003 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:49:42.059 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:49:42.061 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:49:42.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:42.063 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:49:42.475 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:49:42.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:42.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:42.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:42.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:42.950 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:49:43.422 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:49:43.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:43.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:43.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:43.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:43.897 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:49:44.369 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:49:44.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:44.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:44.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:44.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:44.843 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:49:45.315 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:49:45.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:45.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:45.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:45.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:45.786 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:49:46.257 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:49:46.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:46.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:46.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:46.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:46.723 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:49:47.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:47.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:47.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:47.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:47.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:47.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:47.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:47.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:47.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:47.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:47.076 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:49:52.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:52.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:52.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:52.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:52.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:52.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:52.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:52.088 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:52.088 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:52.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:52.089 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:49:52.091 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:49:52.091 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:49:52.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:52.092 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:52.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:52.092 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:49:52.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:52.092 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:49:52.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:52.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:49:52.094 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:49:52.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:52.094 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:52.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:52.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:49:52.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:52.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:49:52.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:52.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:49:52.096 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:49:52.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:52.096 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:52.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:52.096 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:49:52.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:52.096 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:49:52.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:52.098 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:49:52.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:49:52.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:49:52.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:49:52.098 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:49:52.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:49:52.099 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:49:52.099 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:49:52.099 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:52.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:52.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:52.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:52.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:52.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:52.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:52.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:52.100 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:49:52.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:52.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:52.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:57.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:49:57.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:49:57.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:57.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:57.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:57.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:57.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:49:57.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:57.116 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:57.117 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:49:57.117 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:49:57.119 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:49:57.119 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:49:57.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:57.120 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:57.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:49:57.120 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:49:57.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:49:57.121 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:49:57.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:57.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:49:57.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:49:57.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:57.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:57.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:49:57.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:49:57.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:49:57.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:49:57.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:57.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:49:57.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:49:57.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:57.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:49:57.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:49:57.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:49:57.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:49:57.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:49:57.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:57.126 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:49:57.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:49:57.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:49:57.127 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:49:57.127 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:49:57.127 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:57.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:49:57.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:49:57.132 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:49:57.606 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:49:57.656 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:49:57.658 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:49:57.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:49:57.661 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:49:57.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:49:57.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:49:57.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:49:58.078 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:49:58.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:58.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:58.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:58.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:58.553 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:49:58.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:49:58.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:49:58.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:49:58.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:49:58.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:49:59.025 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:49:59.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:49:59.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:49:59.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:49:59.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:49:59.495 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:49:59.966 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:50:00.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:00.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:00.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:00.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:00.437 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:50:00.908 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:50:01.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:01.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:01.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:01.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:01.378 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:50:01.850 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:50:02.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:02.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:02.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:02.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:02.321 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:50:02.791 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:50:03.262 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:50:03.732 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:50:04.203 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:50:04.674 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:50:05.145 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:50:05.616 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:50:06.087 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:50:06.557 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:50:07.030 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:50:07.502 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:50:07.974 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:50:08.445 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:50:08.917 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:50:09.391 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:50:09.862 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:50:10.334 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:50:10.805 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:50:11.279 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:50:11.751 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:50:12.223 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:50:12.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:12.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:12.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:12.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:12.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:12.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:12.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:12.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:12.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:12.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:12.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:12.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:12.419 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:50:17.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:17.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:17.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:17.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:17.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:17.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:17.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:17.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:50:17.433 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:17.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:50:17.433 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:50:17.435 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:50:17.436 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:50:17.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:50:17.436 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:17.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:17.437 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:50:17.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:50:17.437 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:50:17.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:17.438 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:50:17.438 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:50:17.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:50:17.438 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:17.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:17.438 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:50:17.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:50:17.438 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:50:17.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:17.440 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:50:17.441 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:50:17.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:50:17.441 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:17.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:17.441 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:50:17.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:50:17.441 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:50:17.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:17.443 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:50:17.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:50:17.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:50:17.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:50:17.443 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:50:17.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:50:17.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:50:17.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:50:17.444 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:50:17.444 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:50:17.444 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:17.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:17.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:17.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:17.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:17.448 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:50:17.927 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:50:17.971 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:50:17.974 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:50:17.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:17.976 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:50:17.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:17.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:17.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:50:17.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:17.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:50:17.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:50:17.999 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:50:17.999 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:50:18.020 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:50:18.023 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:50:18.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:18.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:50:18.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:50:18.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:18.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:18.400 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:50:18.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:18.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:18.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:18.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:18.871 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:50:19.344 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:50:19.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:19.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:19.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:19.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:19.817 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:50:20.289 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:50:20.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:20.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:20.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:20.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:20.762 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:50:21.235 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:50:21.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:21.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:21.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:21.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:21.708 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:50:22.178 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:50:22.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:22.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:22.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:22.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:22.649 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:50:23.123 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:50:23.595 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:50:24.068 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:50:24.541 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:50:25.014 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:50:25.486 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:50:25.957 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:50:26.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:26.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:26.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:26.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:26.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:26.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:26.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:26.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:26.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:26.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:26.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:26.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:26.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:26.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:26.044 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:50:31.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:31.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:31.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:31.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:31.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:31.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:31.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:31.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:50:31.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:31.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:50:31.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:50:31.069 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:50:31.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:50:31.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:50:31.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:31.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:31.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:50:31.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:50:31.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:50:31.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:31.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:50:31.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:50:31.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:50:31.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:31.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:31.073 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:50:31.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:50:31.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:50:31.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:31.076 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:50:31.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:50:31.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:50:31.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:31.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:31.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:50:31.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:50:31.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:50:31.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:31.080 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:50:31.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:50:31.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:50:31.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:50:31.080 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:50:31.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:50:31.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:50:31.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:31.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:50:31.081 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:50:31.081 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:50:31.081 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:50:31.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:31.086 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:50:31.564 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:50:31.614 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:50:31.616 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:50:31.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:31.618 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:50:31.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:31.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:31.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:50:31.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:31.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:50:31.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:50:31.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:50:31.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:50:31.655 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:50:31.657 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:50:31.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:31.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:50:31.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:50:31.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:31.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:32.035 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:50:32.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:32.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:32.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:32.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:32.507 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:50:32.972 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:50:33.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:33.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:33.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:33.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:33.440 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:50:33.907 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:50:34.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:34.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:34.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:34.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:34.376 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:50:34.846 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:50:35.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:35.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:35.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:35.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:35.316 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:50:35.786 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:50:36.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:36.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:36.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:36.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:36.255 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:50:36.722 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:50:37.192 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:50:37.662 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:50:38.131 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:50:38.600 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:50:39.070 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:50:39.538 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:50:39.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:39.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:39.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:39.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:39.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:39.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:39.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:39.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:39.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:39.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:39.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:39.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:39.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:39.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:39.669 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:50:39.669 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1867 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:39.669 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1867 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:39.669 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1867 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:39.669 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1867 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:39.669 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1867 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:39.669 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1867 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:39.669 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1867 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:39.669 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1867 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:44.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:44.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:44.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:44.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:44.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:44.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:44.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:44.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:50:44.684 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:44.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:50:44.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:50:44.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:50:44.689 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:50:44.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:50:44.690 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:44.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:44.690 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:50:44.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:50:44.690 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:50:44.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:44.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:50:44.694 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:50:44.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:50:44.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:44.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:44.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:50:44.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:50:44.695 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:50:44.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:44.698 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:50:44.699 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:50:44.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:50:44.699 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:44.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:44.699 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:50:44.699 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:50:44.699 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:50:44.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:44.704 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:50:44.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:50:44.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:50:44.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:50:44.704 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:50:44.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:50:44.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:50:44.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:44.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:50:44.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:50:44.705 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:50:44.705 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:50:44.705 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:44.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:44.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:44.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:44.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:44.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:44.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:44.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:44.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:44.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:44.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:44.710 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:50:45.181 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:50:45.235 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:50:45.236 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:50:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:45.238 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:50:45.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:45.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:45.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:50:45.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:45.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:50:45.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:50:45.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:50:45.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:50:45.274 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:50:45.278 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:50:45.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:45.287 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:50:45.287 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:50:45.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:45.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:45.651 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:50:45.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:45.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:45.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:45.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:45.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:45.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:45.844 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:50:45.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:45.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:45.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:45.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:45.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:45.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:45.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:45.852 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:50:45.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:45.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:45.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:45.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:45.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:50.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:50.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:50.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:50.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:50.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:50.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:50.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:50.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:50:50.859 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:50.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:50:50.859 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:50:50.860 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:50:50.860 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:50:50.860 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:50:50.860 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:50.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:50.860 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:50:50.860 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:50:50.860 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:50:50.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:50.861 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:50:50.861 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:50:50.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:50:50.861 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:50.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:50.861 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:50:50.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:50:50.862 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:50:50.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:50.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:50:50.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:50:50.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:50:50.863 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:50.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:50.863 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:50:50.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:50:50.863 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:50:50.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:50.864 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:50:50.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:50:50.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:50:50.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:50:50.864 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:50:50.865 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:50:50.865 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:50:50.865 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:50.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:50.870 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:50:51.346 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:50:51.377 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:50:51.378 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:50:51.378 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:50:51.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:51.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:51.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:51.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:50:51.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:51.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:50:51.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:50:51.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:50:51.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:50:51.389 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:50:51.389 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:50:51.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:51.422 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:50:51.422 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:50:51.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:51.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:51.814 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:50:51.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:51.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:51.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:51.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:52.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:52.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:52.007 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:50:52.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:52.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:52.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:52.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:52.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:52.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:52.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:52.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:52.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:52.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:52.016 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:50:52.016 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:52.016 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:52.016 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:52.016 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:52.016 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:52.016 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:52.016 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:52.016 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:50:57.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:57.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:57.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:57.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:57.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:57.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:57.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:57.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:50:57.018 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:57.018 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:50:57.018 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:50:57.020 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:50:57.020 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:50:57.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:50:57.021 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:57.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:57.021 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:50:57.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:50:57.021 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:50:57.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:57.022 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:50:57.022 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:50:57.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:50:57.022 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:57.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:57.022 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:50:57.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:50:57.022 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:50:57.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:57.024 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:50:57.024 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:50:57.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:50:57.024 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:50:57.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:50:57.024 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:50:57.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:50:57.024 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:50:57.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:50:57.028 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:50:57.028 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:50:57.028 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:57.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:50:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:50:57.033 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:50:57.506 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:50:57.546 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:50:57.547 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:50:57.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:57.547 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:50:57.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:57.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:57.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:50:57.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:57.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:50:57.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:50:57.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:50:57.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:50:57.598 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:50:57.601 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:50:57.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:50:57.613 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:50:57.613 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:50:57.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:57.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:50:57.976 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:50:58.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:58.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:58.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:58.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:58.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:50:58.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:50:58.167 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:50:58.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:50:58.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:50:58.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:50:58.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:50:58.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:50:58.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:50:58.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:50:58.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:50:58.172 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:50:58.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:50:58.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:51:03.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:51:03.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:51:03.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:51:03.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:51:03.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:51:03.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:51:03.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:51:03.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:51:03.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:03.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:51:03.194 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:51:03.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:51:03.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:51:03.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:51:03.197 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:03.197 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:51:03.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:51:03.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:51:03.197 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:51:03.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:03.206 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:51:03.206 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:51:03.206 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:51:03.206 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:03.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:51:03.207 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:51:03.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:51:03.207 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:51:03.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:03.214 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:51:03.214 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:51:03.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:51:03.214 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:03.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:51:03.215 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:51:03.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:51:03.215 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:51:03.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:03.223 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:51:03.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:51:03.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:51:03.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:51:03.223 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:51:03.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:51:03.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:03.224 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:51:03.224 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:51:03.224 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:51:03.224 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:51:03.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:03.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:03.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:03.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:51:03.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:03.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:03.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:03.229 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:51:03.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:51:03.762 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:51:03.764 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:51:03.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:03.766 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:51:03.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:03.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:03.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:51:03.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:03.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:03.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:03.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:51:03.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:51:03.845 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:51:03.849 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:51:03.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:03.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:03.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:03.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:03.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:04.179 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:51:04.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:04.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:04.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:04.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:04.651 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:51:05.124 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:51:05.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:05.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:05.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:05.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:05.592 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:51:06.063 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:51:06.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:06.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:06.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:06.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:06.535 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:51:07.004 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:51:07.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:07.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:07.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:07.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:07.475 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:51:07.948 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:51:08.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:08.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:08.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:08.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:08.420 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:51:08.893 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:51:09.365 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:51:09.838 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:51:10.311 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:51:10.781 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:51:11.254 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:51:11.728 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:51:11.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:11.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:11.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:11.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:11.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:11.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:11.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:51:11.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:11.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:11.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:11.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:51:11.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:51:11.911 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:51:11.915 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:51:11.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:11.926 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:51:11.926 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 04:51:11.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:11.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:12.200 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:51:12.673 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:51:12.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:12.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:12.908 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:51:12.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:12.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:12.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:12.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:12.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:51:12.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:51:12.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:51:12.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:51:12.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:51:12.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:51:12.913 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:51:12.913 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2094 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:12.913 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2094 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:12.913 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2094 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:12.913 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2094 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:17.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:51:17.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:51:17.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:51:17.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:51:17.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:51:17.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:51:17.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:51:17.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:51:17.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:17.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:51:17.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:51:17.931 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:51:17.932 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:51:17.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:51:17.932 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:17.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:51:17.933 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:51:17.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:51:17.933 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:51:17.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:17.935 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:51:17.935 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:51:17.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:51:17.935 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:17.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:51:17.935 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:51:17.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:51:17.935 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:51:17.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:17.937 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:51:17.937 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:51:17.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:51:17.938 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:17.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:51:17.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:51:17.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:51:17.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:51:17.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:17.940 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:51:17.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:51:17.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:51:17.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:51:17.941 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:51:17.941 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:51:17.941 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:17.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:17.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:17.946 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:51:18.425 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:51:18.470 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:51:18.472 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:51:18.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:18.474 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:51:18.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:18.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:18.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:51:18.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:18.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:18.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:18.509 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:51:18.509 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:51:18.517 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:51:18.519 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:51:18.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:18.527 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:51:18.527 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:51:18.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:18.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:18.897 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:51:18.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:18.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:18.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:18.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:19.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:19.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:19.090 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:51:19.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:19.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:19.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:19.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:19.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:51:19.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:51:19.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:51:19.096 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:51:19.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:51:19.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:51:19.096 [WARNING] transceiver.py:257 (TRX3@172.18.173.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:19.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:51:19.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:19.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:19.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:19.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:19.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:19.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:24.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:51:24.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:51:24.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:51:24.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:51:24.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:51:24.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:51:24.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:51:24.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:51:24.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:24.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:51:24.112 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:51:24.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:51:24.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:51:24.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:51:24.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:24.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:51:24.116 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:51:24.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:51:24.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:51:24.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:24.117 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:51:24.117 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:51:24.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:51:24.117 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:24.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:51:24.118 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:51:24.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:51:24.118 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:51:24.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:24.119 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:51:24.119 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:51:24.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:51:24.120 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:51:24.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:51:24.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:51:24.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:51:24.120 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:51:24.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:24.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:51:24.123 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:51:24.123 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:51:24.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:24.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:51:24.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:51:24.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:51:24.646 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:51:24.648 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:51:24.649 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:51:24.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:24.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:24.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:24.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:51:24.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:24.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:24.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:24.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:51:24.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:51:24.697 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:51:24.701 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:51:24.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:24.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:24.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:24.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:24.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:25.077 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:51:25.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:25.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:25.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:25.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:25.549 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:51:26.022 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:51:26.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:26.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:26.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:26.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:26.494 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:51:26.967 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:51:27.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:27.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:27.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:27.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:27.438 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:51:27.911 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:51:28.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:28.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:28.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:28.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:28.383 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:51:28.856 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:51:29.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:29.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:29.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:29.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:29.329 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:51:29.801 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:51:30.273 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:51:30.746 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:51:31.219 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:51:31.691 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:51:32.164 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:51:32.637 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:51:32.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:32.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:32.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:32.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:32.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:32.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:32.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:51:32.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:32.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:32.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:32.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:51:32.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:51:32.775 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:51:32.779 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:51:32.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:32.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:32.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:32.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:32.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:33.109 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:51:33.580 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:51:34.053 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:51:34.526 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:51:34.998 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:51:35.471 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:51:35.944 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:51:36.415 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:51:36.887 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:51:37.360 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:51:37.833 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:51:38.305 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:51:38.776 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:51:39.249 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:51:39.722 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:51:40.194 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:51:40.668 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:51:40.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:40.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:40.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:40.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:40.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:40.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:40.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:51:40.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:40.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:40.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:40.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:51:40.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:51:40.848 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:51:40.853 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:51:40.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:40.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:40.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:40.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:40.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:41.140 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:51:41.612 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:51:42.083 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:51:42.554 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:51:43.024 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:51:43.498 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:51:43.970 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:51:44.443 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:51:44.913 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:51:45.384 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:51:45.858 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:51:46.330 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:51:46.802 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:51:47.274 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:51:47.747 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:51:48.219 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:51:48.692 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:51:48.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:48.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:48.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:48.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:48.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:48.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:48.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:51:48.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:48.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:48.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:48.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:51:48.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:51:48.925 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:51:48.929 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:51:48.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:48.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:51:48.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:51:48.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:48.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:49.162 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:51:49.635 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:51:50.108 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:51:50.580 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:51:51.051 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:51:51.525 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:51:52.001 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:51:52.473 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:51:52.944 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:51:53.417 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:51:53.890 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:51:54.361 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:51:54.833 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:51:55.306 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:51:55.778 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:51:56.251 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:51:56.724 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:51:56.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:51:56.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:51:56.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:51:56.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:51:56.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:51:56.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:51:56.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:51:56.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:51:56.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:51:56.962 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:51:56.962 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:51:56.962 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:51:56.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:51:56.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:51:56.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:51:56.963 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7092 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:56.963 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7092 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:56.963 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7092 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:56.963 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7092 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:56.963 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7092 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:56.963 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7092 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:51:56.963 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7092 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:01.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:01.964 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:01.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:01.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:01.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:01.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:01.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:01.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:01.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:01.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:01.973 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:52:01.974 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:52:01.975 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:52:01.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:01.975 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:01.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:01.976 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:52:01.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:01.976 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:52:01.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:01.977 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:52:01.977 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:52:01.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:01.977 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:01.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:01.977 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:52:01.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:01.978 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:52:01.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:01.979 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:52:01.979 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:52:01.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:01.979 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:01.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:01.979 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:52:01.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:01.979 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:52:01.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:52:01.982 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:52:01.982 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:52:01.982 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:01.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:01.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:01.987 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:52:02.465 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:52:02.515 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:52:02.518 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:52:02.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:02.520 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:52:02.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:02.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:02.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:52:02.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:02.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:52:02.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:52:02.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:52:02.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:52:02.606 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:52:02.611 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:52:02.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:02.622 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:52:02.623 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:52:02.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:02.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:02.937 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:52:02.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:02.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:02.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:02.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:03.409 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:52:03.882 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:52:03.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:03.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:03.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:03.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:04.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:04.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:04.112 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:52:04.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:04.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:04.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:04.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:04.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:04.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:04.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:04.119 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:52:04.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:04.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:04.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:04.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=461 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:04.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=461 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:04.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=461 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:04.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=461 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:04.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=461 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:04.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=461 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:09.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:09.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:09.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:09.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:09.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:09.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:09.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:09.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:09.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:09.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:09.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:52:09.142 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:52:09.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:52:09.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:09.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:09.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:09.142 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:52:09.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:09.142 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:52:09.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:09.144 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:52:09.144 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:52:09.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:09.144 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:09.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:09.144 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:52:09.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:09.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:52:09.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:09.146 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:52:09.146 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:52:09.146 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:09.146 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:09.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:09.146 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:52:09.146 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:09.146 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:52:09.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:52:09.148 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:52:09.148 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:52:09.148 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:09.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:09.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:09.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:52:09.631 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:52:09.680 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:52:09.682 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:52:09.684 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:52:09.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:09.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:09.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:09.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:52:09.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:09.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:52:09.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:52:09.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:52:09.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:52:09.721 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:52:09.722 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:52:09.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:09.726 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:52:09.726 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:52:09.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:09.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:10.104 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:52:10.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:10.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:10.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:10.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:10.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:10.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:10.297 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:52:10.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:10.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:10.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:10.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:10.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:10.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:10.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:10.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:10.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:10.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:10.303 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:52:15.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:15.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:15.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:15.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:15.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:15.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:15.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:15.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:15.318 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:15.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:15.318 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:52:15.321 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:52:15.321 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:52:15.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:15.322 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:15.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:15.322 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:52:15.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:15.323 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:52:15.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:15.324 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:52:15.324 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:52:15.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:15.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:15.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:15.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:52:15.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:15.324 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:52:15.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:15.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:52:15.326 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:52:15.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:15.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:15.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:15.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:52:15.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:15.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:52:15.327 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:15.329 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:52:15.329 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:52:15.329 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:52:15.330 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:15.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:15.334 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:52:15.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:52:15.865 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:52:15.867 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:52:15.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:15.869 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:52:15.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:15.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:15.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:52:15.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:15.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:52:15.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:52:15.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:52:15.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:52:15.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:15.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:52:15.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:52:15.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:15.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:16.285 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:52:16.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:16.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:16.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:16.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:16.756 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:52:17.227 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:52:17.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:17.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:17.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:17.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:17.698 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:52:18.169 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:52:18.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:18.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:18.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:18.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:18.639 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:52:19.113 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:52:19.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:19.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:19.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:19.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:19.586 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:52:20.058 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:52:20.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:20.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:20.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:20.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:20.531 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:52:21.004 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:52:21.477 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:52:21.950 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:52:22.423 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:52:22.895 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:52:23.366 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:52:23.837 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:52:23.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:23.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:23.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:23.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:23.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:23.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:23.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:23.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:23.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:23.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:23.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:23.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:23.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:23.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:23.936 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:52:23.936 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:23.936 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:23.936 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:23.936 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:28.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:28.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:28.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:28.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:28.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:28.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:28.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:28.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:28.949 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:28.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:28.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:52:28.954 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:52:28.954 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:52:28.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:28.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:28.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:28.955 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:52:28.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:28.955 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:52:28.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:28.959 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:52:28.959 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:52:28.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:28.960 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:28.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:28.960 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:52:28.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:28.960 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:52:28.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:28.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:52:28.964 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:52:28.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:28.964 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:28.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:28.964 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:52:28.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:28.964 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:52:28.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:28.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:28.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:28.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:28.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:28.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:28.971 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:52:28.971 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:52:28.971 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:52:28.971 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:52:28.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:28.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:28.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:28.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:52:28.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:28.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:28.976 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:52:29.452 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:52:29.500 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:52:29.502 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:52:29.504 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:52:29.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:29.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:29.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:29.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:52:29.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:29.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:52:29.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:52:29.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:52:29.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:52:29.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:29.555 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:52:29.555 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:52:29.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:29.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:29.925 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:52:29.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:29.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:29.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:29.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:30.399 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:52:30.872 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:52:30.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:30.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:30.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:30.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:31.345 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:52:31.818 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:52:31.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:31.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:31.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:31.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:32.291 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:52:32.764 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:52:32.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:32.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:32.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:32.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:33.237 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:52:33.708 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:52:33.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:33.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:33.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:33.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:34.181 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:52:34.655 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:52:35.126 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:52:35.599 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:52:36.073 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:52:36.545 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:52:37.019 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:52:37.490 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:52:37.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:37.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:37.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:37.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:37.564 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:52:37.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:37.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:37.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:37.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:37.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:37.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:37.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:37.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:37.587 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:52:37.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:37.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:37.587 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:37.587 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:37.587 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:37.587 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:37.588 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:37.588 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:52:42.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:42.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:42.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:42.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:42.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:42.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:42.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:42.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:42.599 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:42.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:42.599 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:52:42.602 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:52:42.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:52:42.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:42.602 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:42.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:42.602 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:52:42.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:42.603 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:52:42.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:42.605 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:52:42.605 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:52:42.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:42.605 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:42.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:42.605 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:52:42.606 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:42.606 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:52:42.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:42.607 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:52:42.608 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:52:42.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:42.608 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:42.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:42.608 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:52:42.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:42.608 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:52:42.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:42.612 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:52:42.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:52:42.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:52:42.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:52:42.612 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:52:42.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:52:42.613 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:52:42.613 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:52:42.613 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:42.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:42.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:42.618 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:52:43.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:52:43.145 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:52:43.147 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:52:43.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:43.151 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:52:43.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:43.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:43.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:52:43.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:43.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:52:43.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:52:43.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:52:43.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:52:43.566 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:52:43.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:43.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:43.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:43.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:44.038 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:52:44.509 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:52:44.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:44.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:44.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:44.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:44.982 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:52:45.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:52:45.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:45.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:45.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:45.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:45.926 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:52:46.398 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:52:46.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:46.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:46.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:46.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:46.871 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:52:47.343 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:52:47.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:47.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:47.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:47.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:47.816 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:52:48.287 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:52:48.760 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:52:49.232 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:52:49.704 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:52:49.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:49.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:49.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:49.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:49.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:49.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:49.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:49.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:49.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:49.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:49.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:49.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:49.840 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:52:54.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:52:54.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:52:54.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:54.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:54.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:54.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:54.851 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:52:54.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:54.851 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:54.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:52:54.851 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:52:54.852 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:52:54.852 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:52:54.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:54.853 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:54.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:52:54.853 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:52:54.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:52:54.853 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:52:54.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:54.854 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:52:54.854 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:52:54.854 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:54.854 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:54.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:52:54.854 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:52:54.854 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:52:54.854 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:52:54.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:54.855 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:52:54.855 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:52:54.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:54.855 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:52:54.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:52:54.855 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:52:54.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:52:54.855 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:52:54.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:54.857 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:52:54.857 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:52:54.857 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:52:54.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:52:54.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:52:54.862 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:52:55.339 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:52:55.384 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:52:55.385 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:52:55.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:52:55.387 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:52:55.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:52:55.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:52:55.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:52:55.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:52:55.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:52:55.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:52:55.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:52:55.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:52:55.811 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:52:55.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:55.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:55.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:55.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:56.283 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:52:56.756 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:52:56.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:56.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:56.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:56.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:57.229 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:52:57.700 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:52:57.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:57.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:57.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:57.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:58.172 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:52:58.645 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:52:58.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:58.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:58.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:58.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:52:59.117 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:52:59.589 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:52:59.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:52:59.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:52:59.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:52:59.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:00.060 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:53:00.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:00.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:00.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:00.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:00.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:00.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:00.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:00.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:00.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:53:00.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:53:00.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:00.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:00.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:00.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:00.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:00.082 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:00.539 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:53:01.019 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:53:01.497 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:53:01.977 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:53:02.456 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:53:02.937 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:53:03.417 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:53:03.897 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:53:04.378 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:53:04.859 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:53:05.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:53:05.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:53:05.086 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:53:05.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:53:05.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:53:05.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:05.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:05.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:05.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:05.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:05.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:53:05.096 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:05.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:53:05.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:53:05.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:53:05.098 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:53:05.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:53:05.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:05.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:05.098 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:53:05.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:53:05.098 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:53:05.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:05.100 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:53:05.100 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:53:05.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:53:05.101 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:05.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:05.101 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:53:05.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:53:05.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:53:05.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:05.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:53:05.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:53:05.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:53:05.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:05.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:05.103 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:53:05.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:53:05.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:53:05.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:05.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:53:05.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:53:05.106 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:53:05.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:05.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:53:05.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:53:05.106 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:53:05.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:05.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:05.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:10.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:53:10.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:53:10.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:10.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:10.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:10.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:10.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:10.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:53:10.123 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:10.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:53:10.124 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:53:10.128 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:53:10.128 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:53:10.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:53:10.129 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:10.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:10.130 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:53:10.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:53:10.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:53:10.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:10.133 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:53:10.133 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:53:10.134 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:53:10.134 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:10.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:10.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:53:10.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:53:10.135 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:53:10.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:10.137 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:53:10.138 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:53:10.138 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:53:10.138 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:10.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:10.138 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:53:10.138 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:53:10.138 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:53:10.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:10.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:53:10.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:53:10.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:53:10.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:53:10.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:10.144 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:53:10.144 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:53:10.144 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:53:10.145 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:53:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:10.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:53:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:10.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:10.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:10.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:10.149 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:53:10.627 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:53:10.676 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:53:10.677 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:53:10.680 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:53:10.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:53:10.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:53:10.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:53:10.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:53:10.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:10.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:53:10.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:53:10.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:53:10.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:53:11.099 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:53:11.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:11.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:11.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:11.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:11.570 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:53:12.043 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:53:12.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:12.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:12.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:12.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:12.516 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:53:12.988 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:53:13.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:13.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:13.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:13.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:13.461 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:53:13.933 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:53:14.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:14.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:14.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:14.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:14.405 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:53:14.876 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:53:15.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:15.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:15.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:15.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:15.350 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:53:15.822 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:53:16.294 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:53:16.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:16.765 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:53:17.239 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:53:17.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:17.710 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:53:18.183 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:53:18.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:18.656 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:53:19.129 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:53:19.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:19.601 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:53:20.098 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:53:20.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:20.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:20.570 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:53:21.045 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:53:21.517 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:53:21.993 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:53:22.465 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:53:22.940 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:53:23.412 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:53:23.883 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:53:24.358 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:53:24.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:24.830 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:53:25.303 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:53:25.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:25.775 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:53:26.247 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:53:26.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:26.721 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:53:27.193 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:53:27.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:27.665 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:53:28.136 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:53:28.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:28.610 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:53:29.082 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:53:29.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:29.554 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:53:30.025 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:53:30.499 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:53:30.971 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:53:31.443 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:53:31.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:53:31.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:53:31.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:31.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:31.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:31.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:31.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:31.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:31.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:31.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:31.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:53:31.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:53:31.576 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:53:31.577 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4621 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:31.577 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4621 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:31.577 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4621 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:31.577 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4621 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:31.577 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4621 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:36.583 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:53:36.583 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:53:36.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:36.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:36.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:36.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:36.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:36.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:53:36.591 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:36.591 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:53:36.591 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:53:36.595 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:53:36.595 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:53:36.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:53:36.595 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:36.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:36.595 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:53:36.595 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:53:36.595 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:53:36.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:36.598 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:53:36.598 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:53:36.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:53:36.598 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:36.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:36.598 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:53:36.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:53:36.599 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:53:36.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:36.601 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:53:36.601 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:53:36.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:53:36.601 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:36.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:36.602 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:53:36.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:53:36.602 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:53:36.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:36.605 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:53:36.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:53:36.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:53:36.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:36.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:53:36.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:53:36.606 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:53:36.606 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:36.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:36.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:36.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:36.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:36.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:36.611 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:53:37.090 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:53:37.139 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:53:37.141 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:53:37.143 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:53:37.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:53:37.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:53:37.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:53:37.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:53:37.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:37.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:53:37.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:53:37.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:53:37.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:53:37.181 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:53:37.185 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:53:37.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:53:37.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:53:37.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:53:37.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:37.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:37.561 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:53:37.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:37.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:37.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:37.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:38.034 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:53:38.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:53:38.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:38.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:53:38.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:53:38.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:38.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:38.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:38.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:38.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:38.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:38.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:38.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:38.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:53:38.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:53:38.492 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:53:38.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:38.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:38.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:38.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:38.493 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:38.493 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:53:43.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:53:43.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:53:43.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:43.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:43.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:43.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:43.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:43.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:53:43.507 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:43.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:53:43.507 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:53:43.509 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:53:43.509 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:53:43.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:53:43.510 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:43.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:43.510 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:53:43.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:53:43.510 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:53:43.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:43.511 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:53:43.511 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:53:43.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:53:43.511 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:43.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:43.512 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:53:43.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:53:43.512 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:53:43.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:43.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:53:43.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:53:43.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:53:43.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:43.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:43.513 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:53:43.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:53:43.513 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:53:43.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:53:43.515 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:53:43.515 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:53:43.515 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:43.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:43.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:43.520 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:53:43.999 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:53:44.044 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:53:44.046 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:53:44.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:53:44.048 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:53:44.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:53:44.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:53:44.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:53:44.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:44.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:53:44.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:53:44.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:53:44.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:53:44.090 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:53:44.093 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:53:44.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:53:44.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:53:44.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:53:44.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:44.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:44.471 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:53:44.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:44.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:44.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:44.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:44.942 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:53:45.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 04:53:45.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:45.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:53:45.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:53:45.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:45.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:45.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:45.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:45.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:45.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:45.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:45.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:45.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:53:45.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:53:45.401 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:53:50.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:53:50.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:53:50.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:50.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:50.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:50.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:50.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:53:50.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:53:50.416 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:50.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:53:50.416 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:53:50.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:53:50.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:53:50.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:53:50.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:50.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:53:50.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:53:50.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:53:50.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:53:50.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:50.420 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:53:50.420 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:53:50.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:53:50.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:50.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:53:50.420 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:53:50.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:53:50.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:53:50.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:50.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:53:50.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:53:50.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:53:50.422 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:53:50.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:53:50.423 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:53:50.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:53:50.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:53:50.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:53:50.426 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:53:50.427 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:53:50.427 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:53:50.427 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:50.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:53:50.432 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:53:50.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:53:50.956 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:53:50.958 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:53:50.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:53:50.961 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:53:50.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:53:50.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:53:50.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:53:50.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:50.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:53:50.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:53:50.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:53:50.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:53:51.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:53:51.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:53:51.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:53:51.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:51.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:53:51.379 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:53:51.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:51.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:51.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:51.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:51.850 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:53:52.323 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:53:52.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:52.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:52.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:52.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:52.796 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:53:53.268 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:53:53.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:53.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:53.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:53.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:53.739 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:53:54.213 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:53:54.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:54.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:54.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:54.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:54.685 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:53:55.158 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:53:55.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:53:55.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:53:55.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:53:55.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:53:55.631 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:53:56.104 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:53:56.576 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:53:57.050 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:53:57.522 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:53:57.994 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:53:58.466 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:53:58.939 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:53:59.412 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:53:59.884 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:54:00.355 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:54:00.826 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:54:01.299 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:54:01.772 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:54:02.244 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:54:02.718 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:54:03.190 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:54:03.663 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:54:04.136 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:54:04.609 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:54:05.082 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:54:05.555 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:54:06.027 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:54:06.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:54:06.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:06.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:54:06.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:54:06.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:54:06.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:54:06.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:54:06.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:06.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:54:06.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:54:06.343 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:54:06.343 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:54:06.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:54:06.354 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:54:06.354 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 04:54:06.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:06.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:06.500 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:54:06.972 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:54:07.445 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:54:07.918 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:54:08.391 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:54:08.864 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:54:09.336 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:54:09.810 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:54:10.282 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:54:10.755 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:54:11.229 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:54:11.701 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:54:12.172 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:54:12.646 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:54:13.118 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:54:13.591 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:54:14.064 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:54:14.537 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:54:15.010 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:54:15.483 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:54:15.956 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:54:16.429 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:54:16.902 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:54:17.375 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:54:17.847 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:54:18.321 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:54:18.793 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:54:19.265 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:54:19.738 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:54:20.225 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:54:20.698 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:54:21.172 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:54:21.645 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:54:21.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:54:21.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:21.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:54:21.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:54:21.828 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:54:21.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:54:21.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:54:21.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:54:21.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:21.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:54:21.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:54:21.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:54:21.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:54:21.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:54:21.889 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:54:21.889 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 04:54:21.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:21.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:22.117 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:54:22.590 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:54:23.062 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:54:23.533 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:54:24.003 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:54:24.477 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:54:24.950 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 04:54:25.422 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 04:54:25.894 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 04:54:26.368 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 04:54:26.839 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 04:54:27.313 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 04:54:27.786 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 04:54:28.258 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 04:54:28.730 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 04:54:29.204 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 04:54:29.676 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 04:54:30.149 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 04:54:30.622 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 04:54:31.094 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 04:54:31.568 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 04:54:32.040 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 04:54:32.512 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 04:54:32.986 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 04:54:33.459 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 04:54:33.931 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 04:54:34.405 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 04:54:34.877 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 04:54:35.349 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 04:54:35.823 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 04:54:36.295 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 04:54:36.767 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 04:54:37.241 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 04:54:37.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:54:37.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:37.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:54:37.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:54:37.304 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:54:37.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:54:37.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:54:37.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:54:37.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:37.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:54:37.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:54:37.322 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:54:37.322 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:54:37.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:54:37.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:54:37.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:54:37.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:54:37.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:37.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:37.713 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 04:54:38.186 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 04:54:38.659 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 04:54:39.131 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 04:54:39.603 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 04:54:40.075 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 04:54:40.548 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 04:54:41.020 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 04:54:41.493 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 04:54:41.966 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 04:54:42.439 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 04:54:42.912 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 04:54:43.385 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 04:54:43.858 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 04:54:44.330 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 04:54:44.804 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 04:54:45.277 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 04:54:45.749 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 04:54:46.222 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 04:54:46.695 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 04:54:47.167 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 04:54:47.640 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 04:54:48.113 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 04:54:48.585 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 04:54:49.056 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 04:54:49.529 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 04:54:50.000 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 04:54:50.473 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 04:54:50.945 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 04:54:51.416 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 04:54:51.889 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 04:54:52.362 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 04:54:52.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:54:52.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:54:52.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:54:52.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:54:52.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:54:52.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:54:52.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:54:52.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:54:52.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:54:52.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:54:52.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:54:52.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:54:52.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:54:52.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:54:52.801 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:54:52.801 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13459 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:54:52.801 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13459 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:54:52.801 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13459 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:54:52.801 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13459 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:54:52.801 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13459 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:54:52.801 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=13459 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:54:57.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:54:57.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:54:57.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:54:57.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:54:57.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:54:57.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:54:57.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:54:57.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:54:57.814 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:54:57.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:54:57.814 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:54:57.816 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:54:57.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:54:57.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:54:57.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:54:57.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:54:57.817 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:54:57.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:54:57.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:54:57.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:54:57.820 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:54:57.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:54:57.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:54:57.821 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:54:57.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:54:57.821 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:54:57.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:54:57.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:54:57.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:54:57.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:54:57.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:54:57.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:54:57.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:54:57.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:54:57.826 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:54:57.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:54:57.826 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:54:57.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:54:57.831 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:54:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:54:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:54:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:54:57.831 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:54:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:54:57.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:54:57.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:54:57.832 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:54:57.832 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:54:57.832 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:54:57.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:54:57.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:54:57.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:54:57.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:54:57.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:54:57.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:54:57.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:54:57.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:54:57.834 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:54:57.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:54:57.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:54:57.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:02.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:55:02.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:55:02.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:55:02.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:55:02.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:55:02.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:55:02.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:55:02.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:55:02.850 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:02.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:55:02.850 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:55:02.853 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:55:02.853 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:55:02.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:55:02.853 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:02.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:55:02.854 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:55:02.854 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:55:02.854 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:55:02.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:02.856 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:55:02.856 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:55:02.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:55:02.856 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:02.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:55:02.856 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:55:02.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:55:02.856 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:55:02.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:02.859 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:55:02.859 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:55:02.859 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:55:02.859 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:02.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:55:02.859 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:55:02.859 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:55:02.859 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:55:02.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:02.863 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:55:02.863 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:55:02.864 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:55:02.864 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:02.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:02.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:02.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:02.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:02.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:02.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:02.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:02.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:02.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:02.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:02.868 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:55:03.344 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:55:03.399 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:55:03.402 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:55:03.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:55:03.404 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:55:03.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:55:03.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:55:03.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:55:03.448 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:55:03.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:03.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:55:03.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:55:03.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:55:03.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:55:03.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:55:03.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:55:03.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:55:03.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:03.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:03.817 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:55:03.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:03.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:03.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:03.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:04.288 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:55:04.761 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:55:04.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:04.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:04.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:04.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:05.234 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:55:05.706 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:55:05.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:05.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:05.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:05.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:06.179 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:55:06.652 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:55:06.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:06.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:06.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:06.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:07.125 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:55:07.598 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:55:07.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:07.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:07.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:07.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:08.070 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:55:08.541 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:55:09.012 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:55:09.484 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:55:09.957 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:55:10.430 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:55:10.903 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:55:11.375 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:55:11.848 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:55:12.321 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:55:12.794 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:55:13.264 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:55:13.738 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:55:14.211 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:55:14.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:55:14.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:14.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:55:14.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:55:14.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:14.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:14.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:14.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:14.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:55:14.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:55:14.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:55:14.325 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:55:14.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:55:14.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:55:14.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:55:14.326 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2474 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:14.326 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2474 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:14.326 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2474 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:14.326 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2474 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:14.326 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2474 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:14.326 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2474 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:14.326 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2474 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:19.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:55:19.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:55:19.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:55:19.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:55:19.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:55:19.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:55:19.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:55:19.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:55:19.340 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:19.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:55:19.340 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:55:19.345 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:55:19.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:55:19.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:55:19.346 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:19.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:55:19.346 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:55:19.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:55:19.347 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:55:19.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:19.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:55:19.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:55:19.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:55:19.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:19.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:55:19.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:55:19.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:55:19.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:55:19.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:19.354 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:55:19.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:55:19.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:55:19.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:19.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:55:19.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:55:19.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:55:19.354 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:55:19.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:19.359 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:55:19.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:55:19.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:55:19.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:55:19.359 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:19.360 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:55:19.360 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:55:19.361 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:55:19.361 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:55:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:19.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:55:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:19.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:19.365 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:55:19.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:55:19.896 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:55:19.897 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:55:19.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:55:19.899 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:55:19.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:55:19.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:55:19.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:55:19.941 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:55:19.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:19.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:55:19.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:55:19.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:55:19.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:55:19.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:55:19.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:55:19.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:55:19.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:19.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:20.315 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:55:20.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:20.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:20.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:20.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:20.787 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:55:21.257 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:55:21.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:21.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:21.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:21.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:21.731 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:55:22.204 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:55:22.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:22.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:22.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:22.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:22.676 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:55:23.149 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:55:23.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:23.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:23.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:23.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:23.622 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:55:24.094 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:55:24.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:24.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:24.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:24.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:24.567 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:55:25.040 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:55:25.512 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:55:25.986 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:55:26.458 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:55:26.931 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:55:27.402 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:55:27.875 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:55:28.348 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:55:28.820 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:55:29.294 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:55:29.766 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:55:30.239 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:55:30.712 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:55:30.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:55:30.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:30.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:55:30.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:55:30.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:30.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:30.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:30.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:30.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:55:30.809 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:55:30.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:55:30.810 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:55:30.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:55:30.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:55:30.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:55:30.810 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:30.810 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:30.810 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:30.810 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:30.810 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:30.810 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:35.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:55:35.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:55:35.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:55:35.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:55:35.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:55:35.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:55:35.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:55:35.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:55:35.826 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:35.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:55:35.826 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:55:35.829 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:55:35.830 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:55:35.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:55:35.830 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:35.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:55:35.831 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:55:35.831 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:55:35.831 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:55:35.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:35.833 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:55:35.833 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:55:35.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:55:35.834 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:35.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:55:35.834 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:55:35.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:55:35.834 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:55:35.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:35.836 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:55:35.836 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:55:35.836 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:55:35.836 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:55:35.836 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:55:35.836 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:55:35.837 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:55:35.837 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:55:35.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:35.840 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:55:35.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:55:35.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:55:35.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:55:35.840 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:55:35.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:55:35.841 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:55:35.841 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:55:35.841 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:35.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:55:35.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:55:35.846 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:55:36.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:55:36.373 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:55:36.375 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:55:36.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:55:36.378 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:55:36.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:55:36.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:55:36.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:55:36.413 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:55:36.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:36.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:55:36.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:55:36.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:55:36.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:55:36.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:55:36.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:55:36.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:55:36.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:36.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:36.794 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:55:36.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:36.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:36.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:36.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:37.266 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:55:37.737 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:55:37.761 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:55:37.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:37.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:37.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:37.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:38.210 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:55:38.683 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:55:38.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:38.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:38.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:38.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:39.155 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:55:39.626 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:55:39.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:39.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:39.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:39.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:40.097 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:55:40.570 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:55:40.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:40.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:40.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:40.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:41.043 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:55:41.515 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:55:41.986 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:55:42.460 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:55:42.932 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:55:43.405 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:55:43.878 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:55:44.351 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:55:44.823 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:55:45.297 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:55:45.769 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:55:46.242 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:55:46.715 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:55:47.188 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:55:47.660 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:55:48.134 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:55:48.606 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:55:49.078 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:55:49.551 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:55:50.025 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:55:50.497 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:55:50.970 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:55:51.443 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:55:51.915 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:55:52.386 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:55:52.859 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:55:53.332 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:55:53.804 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:55:54.275 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:55:54.748 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:55:55.221 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:55:55.693 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:55:56.164 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:55:56.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:55:56.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:55:56.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:55:56.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:55:56.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:55:56.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:55:56.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:55:56.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:55:56.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:55:56.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:55:56.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:55:56.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:55:56.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:55:56.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:55:56.506 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:55:56.506 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4462 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:56.507 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4462 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:56.507 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4462 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:56.507 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4462 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:56.507 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4462 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:55:56.507 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4462 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:01.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:56:01.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:56:01.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:01.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:01.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:01.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:01.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:01.520 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:56:01.520 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:01.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:56:01.521 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:56:01.524 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:56:01.525 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:56:01.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:56:01.525 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:01.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:01.526 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:56:01.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:56:01.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:56:01.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:01.528 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:56:01.528 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:56:01.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:56:01.529 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:01.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:01.529 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:56:01.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:56:01.529 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:56:01.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:01.531 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:56:01.531 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:56:01.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:56:01.531 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:01.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:01.531 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:56:01.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:56:01.531 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:56:01.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:01.534 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:56:01.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:56:01.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:56:01.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:56:01.534 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:56:01.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:56:01.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:56:01.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:56:01.535 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:56:01.535 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:56:01.535 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:01.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:01.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:01.539 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:56:02.017 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:56:02.065 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:56:02.067 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:56:02.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:02.071 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:56:02.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:02.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:02.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:56:02.108 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:56:02.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:02.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:02.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:02.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:56:02.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:56:02.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:02.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:02.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:02.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:02.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:02.489 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:56:02.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:02.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:02.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:02.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:02.961 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:56:03.434 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:56:03.455 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:03.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:03.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:03.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:03.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:03.907 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:56:04.379 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:56:04.421 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:04.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:04.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:04.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:04.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:04.850 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:56:05.323 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:56:05.381 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:05.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:05.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:05.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:05.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:05.796 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:56:06.268 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:56:06.347 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:06.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:06.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:06.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:06.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:06.742 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:56:07.214 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:56:07.313 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:07.687 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:56:08.160 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:56:08.274 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:08.632 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:56:09.105 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:56:09.239 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:09.578 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:56:10.051 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:56:10.205 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:10.524 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:56:10.997 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:56:11.166 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:11.470 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:56:11.942 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:56:12.132 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:12.415 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:56:12.888 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:56:12.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:12.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:12.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:12.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:12.982 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=2470 tn=4 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:12.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:12.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:12.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:12.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:12.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:12.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:56:12.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:56:12.999 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:56:12.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:12.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:12.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:12.999 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2473 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:12.999 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2473 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:12.999 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2473 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:12.999 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2473 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:12.999 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2473 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:12.999 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2473 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:18.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:56:18.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:56:18.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:18.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:18.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:18.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:18.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:18.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:56:18.008 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:18.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:56:18.008 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:56:18.011 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:56:18.012 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:56:18.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:56:18.013 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:18.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:18.014 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:56:18.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:56:18.014 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:56:18.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:18.016 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:56:18.016 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:56:18.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:56:18.016 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:18.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:18.017 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:56:18.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:56:18.017 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:56:18.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:18.019 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:56:18.019 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:56:18.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:56:18.020 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:18.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:18.020 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:56:18.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:56:18.020 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:56:18.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:18.023 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:56:18.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:56:18.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:56:18.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:56:18.023 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:56:18.024 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:56:18.024 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:56:18.024 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:18.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:18.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:18.029 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:56:18.507 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:56:18.549 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:56:18.552 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:56:18.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:18.554 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:56:18.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:18.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:18.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:56:18.587 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:56:18.589 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:56:18.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:18.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:18.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:18.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:56:18.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:56:18.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:18.603 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:56:18.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:18.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:18.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:18.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:18.979 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:56:19.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:19.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:19.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:19.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:19.450 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:56:19.465 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:19.924 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:56:20.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:20.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:20.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:20.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:20.396 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:56:20.867 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:56:21.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:21.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:21.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:21.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:21.340 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:56:21.813 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:56:22.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:22.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:22.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:22.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:22.286 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:56:22.758 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:56:23.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:23.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:23.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:23.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:23.229 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:56:23.699 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:56:24.171 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:56:24.644 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:56:25.116 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:56:25.589 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:56:26.062 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:56:26.535 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:56:27.008 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:56:27.481 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:56:27.954 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:56:28.426 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:56:28.897 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:56:29.097 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:56:29.370 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:56:29.843 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:56:30.316 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:56:30.789 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:56:31.261 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:56:31.734 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:56:32.218 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:56:32.690 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:56:33.163 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:56:33.636 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:56:34.108 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:56:34.579 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:56:34.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:34.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:34.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:34.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:34.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:34.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:34.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:34.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:34.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:34.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:56:34.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:56:34.917 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:56:34.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:34.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:34.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:34.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3645 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:34.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3645 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:34.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3645 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:34.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3645 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:34.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3645 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:34.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3645 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:34.918 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3645 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:39.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:56:39.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:56:39.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:39.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:39.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:39.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:39.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:39.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:56:39.923 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:39.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:56:39.923 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:56:39.924 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:56:39.924 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:56:39.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:56:39.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:39.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:39.924 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:56:39.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:56:39.924 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:56:39.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:39.925 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:56:39.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:56:39.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:56:39.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:39.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:39.926 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:56:39.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:56:39.926 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:56:39.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:39.927 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:56:39.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:56:39.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:56:39.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:39.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:39.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:56:39.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:56:39.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:56:39.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:56:39.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:56:39.929 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:56:39.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:56:39.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:39.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:39.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:56:40.413 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:56:40.450 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:56:40.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:40.452 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:56:40.454 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:56:40.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:40.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:40.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:56:40.498 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:56:40.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:40.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:40.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:40.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:56:40.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:56:40.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:40.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:40.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:40.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:40.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:40.885 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:56:40.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:40.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:40.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:40.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:41.356 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:56:41.371 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:56:41.830 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:56:41.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:41.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:41.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:41.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:42.302 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:56:42.775 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:56:42.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:42.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:42.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:42.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:43.248 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:56:43.721 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:56:43.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:43.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:43.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:43.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:44.193 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:56:44.666 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:56:44.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:44.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:44.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:45.139 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:56:45.612 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:56:46.085 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:56:46.557 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:56:47.030 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:56:47.523 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:56:47.996 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:56:48.469 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:56:48.942 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:56:49.414 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:56:49.888 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:56:50.360 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:56:50.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:50.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:50.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:50.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:50.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:50.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:50.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:50.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:50.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:50.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:50.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:56:50.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:56:50.515 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:56:50.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:50.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:55.522 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:56:55.522 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:56:55.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:55.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:55.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:55.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:55.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:55.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:56:55.528 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:55.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:56:55.529 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:56:55.532 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:56:55.532 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:56:55.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:56:55.532 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:55.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:55.533 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:56:55.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:56:55.533 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:56:55.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:55.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:56:55.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:56:55.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:56:55.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:55.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:55.536 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:56:55.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:56:55.536 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:56:55.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:55.538 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:56:55.538 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:56:55.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:56:55.538 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:56:55.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:55.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:56:55.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:56:55.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:56:55.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:55.543 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:56:55.543 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:56:55.543 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:56:55.544 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:55.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:56:55.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:56:55.548 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:56:56.026 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:56:56.069 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:56:56.071 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:56:56.072 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:56:56.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:56.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:56.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:56.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:56:56.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:56.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:56.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:56.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:56:56.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:56:56.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:56.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:56.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:56.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:56.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:56.499 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:56:56.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:56.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:56.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:56.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:56.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:56.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:56.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:56:56.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:56.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:56.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:56.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:56:56.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:56:56.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:56.544 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:56:56.544 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:56:56.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:56.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:56.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:56.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:56.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:56.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:56.971 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:56:57.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:57.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:57.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:57.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:57.230 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:56:57.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:57.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:57.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:56:57.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:57.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:57.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:57.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:56:57.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:56:57.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:57.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:57.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:57.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:57.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:57.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:57.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:57.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:57.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:57.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:57.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:57.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:56:57.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:57.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:56:57.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:56:57.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:56:57.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:56:57.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:57.443 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:56:57.445 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:56:57.445 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:56:57.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:57.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:57.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:57.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:57.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:57.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:57.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:56:57.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:56:57.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:56:57.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:56:57.834 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:56:57.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:56:57.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:56:57.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:56:57.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:56:57.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:56:57.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:56:57.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:56:57.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:56:57.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:56:57.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:56:57.850 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:56:57.850 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.850 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.850 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:56:57.851 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:02.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:57:02.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:57:02.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:02.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:02.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:02.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:02.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:02.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:57:02.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:02.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:57:02.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:57:02.884 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:57:02.885 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:57:02.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:57:02.885 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:02.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:02.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:57:02.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:57:02.887 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:57:02.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:02.892 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:57:02.893 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:57:02.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:57:02.893 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:02.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:02.893 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:57:02.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:57:02.894 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:57:02.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:02.898 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:57:02.898 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:57:02.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:57:02.898 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:02.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:02.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:57:02.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:57:02.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:57:02.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:02.906 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:57:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:57:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:57:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:57:02.906 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:57:02.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:02.907 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:57:02.907 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:57:02.907 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:57:02.907 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:02.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:02.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:02.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:02.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:02.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:02.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:02.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:02.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:02.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:02.912 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:57:03.391 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:57:03.441 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:57:03.443 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:57:03.444 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:57:03.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:03.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:03.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:03.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:57:03.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:03.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:03.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:03.467 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:57:03.467 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:57:03.483 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:57:03.487 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 04:57:03.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:03.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:03.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:03.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:03.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:03.863 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:57:03.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:03.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:03.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:03.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:03.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:03.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:03.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:03.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:03.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:03.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:03.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:03.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:03.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:57:03.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:57:03.888 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:57:03.888 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:03.888 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:03.888 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:03.889 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:03.889 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:03.889 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:08.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:57:08.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:57:08.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:08.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:08.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:08.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:08.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:08.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:57:08.902 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:08.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:57:08.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:57:08.908 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:57:08.908 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:57:08.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:57:08.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:08.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:08.909 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:57:08.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:57:08.909 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:57:08.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:08.913 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:57:08.913 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:57:08.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:57:08.913 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:08.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:08.914 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:57:08.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:57:08.914 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:57:08.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:08.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:57:08.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:57:08.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:57:08.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:08.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:08.918 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:57:08.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:57:08.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:57:08.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:08.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:57:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:57:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:57:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:57:08.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:57:08.922 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:57:08.922 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:08.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:08.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:57:09.406 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:57:09.449 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:57:09.450 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:57:09.454 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:57:09.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:09.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:09.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:09.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:57:09.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:09.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:09.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:09.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:57:09.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:57:09.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:09.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:09.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:09.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:09.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:09.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:09.879 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:57:09.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:09.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:09.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:09.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:10.350 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:57:10.823 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:57:10.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:10.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:10.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:10.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:11.296 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:57:11.768 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:57:11.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:11.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:11.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:11.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:12.242 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:57:12.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:12.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:12.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:12.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:12.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:12.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:12.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:57:12.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:12.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:12.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:12.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:57:12.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:57:12.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:12.661 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:57:12.661 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 04:57:12.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:12.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:12.713 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:57:12.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:12.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:12.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:12.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:12.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:13.185 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:57:13.657 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:57:13.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:13.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:13.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:13.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:14.131 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:57:14.604 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:57:15.075 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:57:15.548 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:57:15.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:15.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:15.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:15.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:15.847 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:57:15.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:15.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:15.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:57:15.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:15.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:15.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:15.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:57:15.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:57:15.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:15.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:15.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:15.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:15.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:16.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:16.021 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:57:16.492 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:57:16.962 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:57:17.436 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:57:17.908 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:57:18.380 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:57:18.853 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:57:19.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:19.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:19.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:19.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:19.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:19.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:19.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:57:19.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:19.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:19.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:19.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:57:19.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:57:19.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:19.094 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:57:19.094 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:57:19.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:19.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:19.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:19.326 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:57:19.798 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:57:20.270 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:57:20.744 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:57:21.216 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:57:21.689 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:57:22.162 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:57:22.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:22.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:22.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:22.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:22.250 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:57:22.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:22.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:22.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:22.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:22.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:22.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:22.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:22.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:22.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:57:22.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:57:22.264 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:57:22.264 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2880 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:22.264 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2880 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:22.264 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2880 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:22.264 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2880 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:22.264 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2880 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:22.264 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2880 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:57:27.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:57:27.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:57:27.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:27.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:27.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:27.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:27.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:27.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:57:27.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:27.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:57:27.276 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:57:27.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:57:27.278 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:57:27.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:57:27.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:27.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:27.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:57:27.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:57:27.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:57:27.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:27.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:57:27.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:57:27.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:57:27.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:27.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:27.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:57:27.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:57:27.283 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:57:27.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:27.286 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:57:27.286 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:57:27.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:57:27.286 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:27.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:27.286 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:57:27.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:57:27.287 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:57:27.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:27.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:27.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:57:27.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:57:27.293 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:57:27.293 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:57:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:27.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:27.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:27.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:27.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:27.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:57:27.775 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:57:27.827 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:57:27.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:27.831 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:57:27.833 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:57:27.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:27.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:27.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:57:27.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:27.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:27.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:27.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:57:27.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:57:28.247 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:57:28.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:28.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:28.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:28.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:28.718 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:57:29.189 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:57:29.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:29.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:29.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:29.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:29.662 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:57:30.134 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:57:30.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:30.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:30.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:30.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:30.606 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:57:31.077 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:57:31.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:31.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:31.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:31.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:31.551 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:57:32.023 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:57:32.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:32.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:32.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:32.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:32.495 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:57:32.966 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:57:33.439 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:57:33.911 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:57:34.383 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:57:34.854 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:57:35.328 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:57:35.800 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:57:36.272 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:57:36.743 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:57:37.216 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:57:37.689 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:57:38.161 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:57:38.632 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:57:39.105 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:57:39.578 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:57:40.049 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:57:40.520 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:57:40.991 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:57:41.465 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:57:41.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:41.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:41.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:41.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:41.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:41.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:41.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:41.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:41.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:57:41.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:57:41.751 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:57:41.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:41.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:46.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:57:46.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:57:46.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:46.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:46.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:46.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:46.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:57:46.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:57:46.766 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:46.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:57:46.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:57:46.767 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:57:46.767 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:57:46.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:57:46.767 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:46.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:57:46.768 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:57:46.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:57:46.768 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:57:46.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:46.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:57:46.768 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:57:46.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:57:46.768 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:46.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:57:46.768 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:57:46.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:57:46.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:57:46.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:46.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:57:46.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:57:46.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:57:46.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:57:46.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:57:46.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:57:46.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:57:46.770 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:57:46.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:46.771 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:57:46.771 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:57:46.771 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:57:46.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:57:46.776 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:57:47.255 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:57:47.305 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:57:47.307 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:57:47.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:47.308 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:57:47.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:47.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:47.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:57:47.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:47.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:47.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:47.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:57:47.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:57:47.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:57:47.360 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 04:57:47.360 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 04:57:47.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:47.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:47.727 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:57:47.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:47.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:47.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:47.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:48.199 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:57:48.672 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:57:48.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:48.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:48.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:48.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:49.145 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:57:49.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:49.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:57:49.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:57:49.362 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 04:57:49.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:57:49.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:57:49.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:57:49.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:57:49.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:57:49.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:57:49.618 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:57:49.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:49.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:49.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:49.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:50.090 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:57:50.563 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:57:50.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:50.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:50.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:50.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:51.033 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:57:51.507 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:57:51.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:57:51.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:57:51.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:57:51.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:57:51.979 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:57:52.451 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:57:52.922 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:57:53.396 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:57:53.868 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:57:54.340 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:57:54.814 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:57:55.286 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:57:55.759 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:57:56.232 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:57:56.705 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:57:57.176 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:57:57.648 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:57:58.118 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:57:58.591 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:57:59.064 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:57:59.536 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:58:00.007 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:58:00.481 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:58:00.953 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:58:01.425 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:58:01.896 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:58:02.369 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:58:02.841 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:58:03.314 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:58:03.787 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:58:04.260 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:58:04.732 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:58:05.205 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:58:05.678 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:58:06.150 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:58:06.621 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:58:07.094 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:58:07.567 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:58:08.039 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:58:08.510 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:58:08.983 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:58:09.456 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:58:09.928 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:58:10.399 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:58:10.887 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:58:11.359 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:58:11.830 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:58:12.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:58:12.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:58:12.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:58:12.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:12.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:12.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:12.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:12.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:58:12.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:58:12.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:58:12.120 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:58:12.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:58:12.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:58:12.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:58:12.121 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:12.121 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:12.121 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:12.121 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:12.121 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:12.121 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:17.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:58:17.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:58:17.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:58:17.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:58:17.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:58:17.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:58:17.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:58:17.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:58:17.135 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:58:17.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:58:17.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:58:17.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:58:17.141 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:58:17.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:58:17.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:58:17.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:58:17.143 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:58:17.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:58:17.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:58:17.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:17.146 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:58:17.146 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:58:17.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:58:17.147 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:58:17.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:58:17.147 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:58:17.147 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:58:17.147 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:58:17.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:17.150 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:58:17.150 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:58:17.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:58:17.151 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:58:17.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:58:17.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:58:17.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:58:17.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:58:17.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:17.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:58:17.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:58:17.156 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:58:17.156 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:17.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:17.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:17.161 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:58:17.638 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:58:17.687 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:58:17.689 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:58:17.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:58:17.690 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:58:17.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:58:17.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:58:17.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:58:17.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:58:17.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:58:17.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:58:17.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:58:17.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:58:18.110 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:58:18.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:18.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:18.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:18.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:18.581 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:58:19.054 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:58:19.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:19.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:19.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:19.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:19.527 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:58:19.999 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:58:20.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:20.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:20.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:20.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:20.473 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:58:20.945 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:58:21.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:21.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:21.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:21.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:21.417 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:58:21.888 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:58:22.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:22.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:22.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:22.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:22.362 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:58:22.834 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:58:23.306 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:58:23.777 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:58:24.251 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:58:24.723 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:58:25.195 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:58:25.666 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:58:26.139 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:58:26.611 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:58:27.083 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:58:27.555 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:58:28.028 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:58:28.500 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:58:28.972 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:58:29.443 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:58:29.917 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:58:30.389 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:58:30.861 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:58:31.332 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:58:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:58:32.278 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:58:32.750 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:58:33.221 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:58:33.695 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:58:34.167 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:58:34.640 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:58:35.113 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:58:35.585 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:58:36.057 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:58:36.530 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:58:37.003 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:58:37.475 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:58:37.946 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:58:38.419 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:58:38.891 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:58:39.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:58:39.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:58:39.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:39.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:39.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:39.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:39.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:58:39.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:58:39.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:58:39.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:58:39.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:58:39.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:58:39.182 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:58:39.183 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4756 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.183 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4756 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.183 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4756 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.183 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4756 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.183 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4757 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.183 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4757 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4757 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4757 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4757 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4757 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:39.184 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:58:44.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:58:44.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:58:44.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:58:44.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:58:44.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:58:44.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:58:44.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:58:44.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:58:44.192 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:58:44.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:58:44.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:58:44.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:58:44.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:58:44.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:58:44.195 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:58:44.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:58:44.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:58:44.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:58:44.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:58:44.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:44.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:58:44.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:58:44.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:58:44.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:58:44.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:58:44.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:58:44.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:58:44.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:58:44.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:44.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:58:44.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:58:44.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:58:44.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:58:44.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:58:44.199 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:58:44.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:58:44.199 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:58:44.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:44.200 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:58:44.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:58:44.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:58:44.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:58:44.200 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:58:44.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:58:44.201 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:58:44.201 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:58:44.201 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:58:44.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:58:44.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:58:44.685 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:58:44.727 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:58:44.729 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:58:44.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:58:44.731 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:58:44.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:58:44.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:58:44.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:58:44.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:58:44.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:58:44.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:58:44.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:58:44.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:58:45.157 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:58:45.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:45.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:45.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:45.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:45.628 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:58:46.099 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:58:46.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:46.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:46.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:46.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:46.572 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:58:47.045 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:58:47.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:47.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:47.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:47.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:47.517 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:58:47.990 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:58:48.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:48.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:48.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:48.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:48.463 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:58:48.934 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:58:49.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:58:49.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:58:49.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:58:49.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:58:49.406 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:58:49.879 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:58:50.351 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:58:50.823 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:58:51.294 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:58:51.768 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:58:52.240 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:58:52.713 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:58:53.186 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:58:53.658 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:58:54.130 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:58:54.601 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:58:55.074 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:58:55.547 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:58:56.019 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:58:56.490 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:58:56.963 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:58:57.435 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:58:57.908 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:58:58.379 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:58:58.852 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:58:59.324 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:58:59.796 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:59:00.267 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:59:00.740 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:59:01.207 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:59:01.679 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:59:02.152 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:59:02.625 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:59:03.097 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:59:03.569 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:59:04.040 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:59:04.514 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:59:04.986 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:59:05.458 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:59:05.932 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:59:06.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:59:06.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:59:06.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:06.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:06.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:06.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:06.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:59:06.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:59:06.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:59:06.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:59:06.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:59:06.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:59:06.226 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:59:06.227 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4758 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:06.227 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4758 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:06.227 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:06.227 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:06.227 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:06.227 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:11.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:59:11.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:59:11.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:59:11.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:59:11.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:59:11.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:59:11.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:59:11.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:59:11.240 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:59:11.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:59:11.240 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:59:11.243 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:59:11.243 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:59:11.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:59:11.243 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:59:11.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:59:11.244 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:59:11.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:59:11.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:59:11.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:11.247 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:59:11.247 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:59:11.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:59:11.247 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:59:11.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:59:11.247 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:59:11.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:59:11.247 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:59:11.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:11.249 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:59:11.249 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:59:11.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:59:11.249 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:59:11.250 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:59:11.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:59:11.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:59:11.250 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:59:11.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:11.253 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:59:11.253 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:59:11.253 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:59:11.253 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:11.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:11.258 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:59:11.737 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:59:11.781 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:59:11.783 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:59:11.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:59:11.785 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:59:11.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:59:11.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:59:11.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:59:11.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:59:11.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:59:11.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:59:11.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:59:11.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:59:12.209 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:59:12.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:12.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:12.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:12.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:12.680 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:59:13.153 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:59:13.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:13.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:13.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:13.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:13.626 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:59:14.098 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:59:14.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:14.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:14.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:14.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:14.569 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:59:15.042 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:59:15.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:15.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:15.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:15.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:15.515 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:59:15.987 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:59:16.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:16.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:16.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:16.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:16.458 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:59:16.941 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:59:17.413 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:59:17.884 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:59:18.355 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:59:18.828 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:59:19.301 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:59:19.773 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:59:20.244 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:59:20.717 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 04:59:21.189 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 04:59:21.661 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 04:59:22.132 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 04:59:22.606 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 04:59:23.078 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 04:59:23.549 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 04:59:24.021 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 04:59:24.494 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 04:59:24.967 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 04:59:25.439 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 04:59:25.910 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 04:59:26.381 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 04:59:26.854 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 04:59:27.327 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 04:59:27.799 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 04:59:28.270 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 04:59:28.743 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 04:59:29.215 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 04:59:29.688 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 04:59:30.161 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 04:59:30.633 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 04:59:31.105 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 04:59:31.576 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 04:59:32.049 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 04:59:32.522 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 04:59:32.994 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 04:59:33.467 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 04:59:33.940 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 04:59:34.412 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 04:59:34.883 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 04:59:35.356 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 04:59:35.828 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 04:59:36.300 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 04:59:36.772 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 04:59:37.245 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 04:59:37.717 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 04:59:38.190 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 04:59:38.663 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 04:59:39.135 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 04:59:39.608 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 04:59:40.081 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 04:59:40.553 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 04:59:41.025 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 04:59:41.496 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 04:59:41.969 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 04:59:42.442 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 04:59:42.914 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 04:59:43.385 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 04:59:43.859 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 04:59:44.331 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 04:59:44.803 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 04:59:45.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:59:45.274 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 04:59:45.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:59:45.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:45.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:45.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:45.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:45.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:59:45.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:59:45.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:59:45.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:59:45.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:59:45.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:59:45.283 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 04:59:45.284 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7348 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:45.284 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7348 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:45.284 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:45.284 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:45.284 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:45.284 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:45.284 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:45.284 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 04:59:50.286 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 04:59:50.286 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 04:59:50.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:59:50.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:59:50.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:59:50.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:59:50.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 04:59:50.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:59:50.292 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:59:50.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 04:59:50.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 04:59:50.293 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 04:59:50.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 04:59:50.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:59:50.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:59:50.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 04:59:50.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 04:59:50.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 04:59:50.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 04:59:50.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:50.297 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 04:59:50.297 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 04:59:50.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:59:50.297 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:59:50.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 04:59:50.298 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 04:59:50.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 04:59:50.298 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 04:59:50.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:50.301 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 04:59:50.302 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 04:59:50.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:59:50.302 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 04:59:50.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 04:59:50.302 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 04:59:50.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 04:59:50.302 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 04:59:50.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:50.307 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 04:59:50.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:50.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:50.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:50.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 04:59:50.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 04:59:50.309 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 04:59:50.309 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 04:59:50.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:50.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:50.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:50.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 04:59:50.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:50.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:50.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 04:59:50.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 04:59:50.313 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 04:59:50.791 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 04:59:50.838 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 04:59:50.840 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 04:59:50.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 04:59:50.843 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 04:59:50.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 04:59:50.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 04:59:50.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 04:59:50.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 04:59:50.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 04:59:50.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 04:59:50.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 04:59:50.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 04:59:51.263 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 04:59:51.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:51.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:51.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:51.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:51.734 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 04:59:52.208 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 04:59:52.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:52.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:52.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:52.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:52.680 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 04:59:53.152 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 04:59:53.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:53.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:53.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:53.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:53.623 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 04:59:54.097 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 04:59:54.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:54.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:54.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:54.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:54.569 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 04:59:55.042 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 04:59:55.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 04:59:55.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 04:59:55.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 04:59:55.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 04:59:55.515 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 04:59:55.987 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 04:59:56.459 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 04:59:56.933 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 04:59:57.405 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 04:59:57.877 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 04:59:58.348 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 04:59:58.821 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 04:59:59.293 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 04:59:59.766 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:00:00.236 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:00:00.710 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:00:01.182 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:00:01.654 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:00:02.125 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:00:02.598 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:00:03.071 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:00:03.543 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:00:04.014 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:00:04.487 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:00:04.960 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:00:05.432 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:00:05.903 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:00:06.374 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:00:06.847 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:00:07.319 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:00:07.791 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:00:08.263 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:00:08.736 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:00:09.208 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:00:09.680 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:00:10.151 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:00:10.625 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:00:11.097 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:00:11.569 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:00:12.040 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:00:12.513 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:00:12.985 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:00:13.457 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:00:13.928 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:00:14.402 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:00:14.874 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:00:15.346 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:00:15.817 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:00:16.291 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:00:16.763 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:00:17.235 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:00:17.706 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:00:18.179 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:00:18.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:00:18.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:00:18.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:18.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:18.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:18.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:18.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:18.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:00:18.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:00:18.334 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:00:18.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:18.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:18.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:18.334 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6054 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:18.334 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6054 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:18.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6054 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:18.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6054 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:18.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6054 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:18.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6054 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:23.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:00:23.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:00:23.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:23.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:23.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:23.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:23.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:23.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:00:23.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:23.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:00:23.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:00:23.350 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:00:23.350 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:00:23.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:00:23.350 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:23.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:23.350 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:00:23.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:00:23.350 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:00:23.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:23.354 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:00:23.354 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:00:23.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:00:23.354 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:23.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:23.355 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:00:23.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:00:23.355 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:00:23.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:23.357 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:00:23.357 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:00:23.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:00:23.357 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:23.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:23.358 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:00:23.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:00:23.358 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:00:23.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:00:23.361 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:00:23.361 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:00:23.361 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:23.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:23.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:23.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:23.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:23.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:23.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:23.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:23.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:23.366 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:00:23.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:00:23.888 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:00:23.891 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:00:23.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:00:23.893 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:00:23.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:23.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:23.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:23.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:23.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:23.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:23.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:23.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:23.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:00:23.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:00:23.910 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:00:23.910 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:23.910 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:23.910 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:23.910 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:23.910 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:23.910 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:28.915 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:00:28.915 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:00:28.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:28.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:28.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:28.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:28.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:28.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:00:28.925 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:28.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:00:28.926 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:00:28.930 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:00:28.931 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:00:28.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:00:28.931 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:28.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:28.932 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:00:28.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:00:28.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:00:28.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:28.934 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:00:28.935 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:00:28.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:00:28.935 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:28.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:28.935 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:00:28.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:00:28.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:00:28.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:28.937 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:00:28.938 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:00:28.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:00:28.938 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:28.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:28.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:00:28.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:00:28.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:00:28.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:28.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:00:28.942 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:00:28.942 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:00:28.942 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:28.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:28.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:28.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:28.946 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:00:29.425 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:00:29.469 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:00:29.471 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:00:29.473 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:00:29.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:00:29.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:29.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:29.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:29.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:29.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:29.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:29.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:29.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:29.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:00:29.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:00:29.492 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:00:29.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:29.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:29.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:29.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:29.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:29.493 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:34.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:00:34.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:00:34.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:34.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:34.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:34.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:34.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:34.502 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:00:34.502 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:34.502 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:00:34.502 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:00:34.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:00:34.504 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:00:34.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:00:34.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:34.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:34.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:00:34.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:00:34.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:00:34.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:34.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:00:34.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:00:34.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:00:34.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:34.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:34.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:00:34.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:00:34.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:00:34.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:34.506 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:00:34.506 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:00:34.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:00:34.506 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:34.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:34.506 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:00:34.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:00:34.506 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:00:34.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:34.508 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:00:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:00:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:00:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:00:34.508 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:00:34.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:00:34.509 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:00:34.509 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:00:34.509 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:34.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:34.513 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:00:34.991 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:00:35.039 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:00:35.040 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:00:35.043 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:00:35.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:00:35.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:35.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:35.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:35.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:35.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:35.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:35.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:35.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:00:35.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:00:35.061 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:00:35.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:35.061 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:35.061 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:35.061 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:35.061 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:35.061 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:35.061 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:00:40.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:00:40.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:00:40.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:40.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:40.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:40.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:40.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:40.074 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:00:40.074 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:40.074 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:00:40.075 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:00:40.078 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:00:40.079 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:00:40.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:00:40.079 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:40.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:40.080 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:00:40.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:00:40.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:00:40.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:40.084 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:00:40.084 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:00:40.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:00:40.085 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:40.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:40.085 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:00:40.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:00:40.086 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:00:40.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:40.088 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:00:40.088 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:00:40.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:00:40.088 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:40.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:40.089 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:00:40.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:00:40.089 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:00:40.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:40.092 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:00:40.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:00:40.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:40.093 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:00:40.093 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:00:40.093 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:00:40.093 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:40.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:40.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:40.098 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:00:40.575 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:00:40.622 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:00:40.624 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:00:40.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:00:40.627 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:00:40.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:00:40.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:00:40.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:00:40.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:00:40.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:00:40.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:00:40.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:00:40.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:00:41.048 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:00:41.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:41.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:41.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:41.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:41.518 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:00:41.990 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:00:42.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:42.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:42.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:42.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:42.463 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:00:42.935 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:00:43.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:43.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:43.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:43.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:43.407 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:00:43.878 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:00:44.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:44.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:44.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:44.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:44.352 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:00:44.824 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:00:45.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:45.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:45.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:45.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:45.296 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:00:45.767 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:00:46.238 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:00:46.711 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:00:47.184 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:00:47.656 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:00:48.127 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:00:48.600 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:00:48.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:00:48.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:00:48.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:48.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:48.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:48.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:48.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:48.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:48.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:48.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:48.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:00:48.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:00:48.683 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:00:53.688 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:00:53.688 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:00:53.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:53.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:53.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:53.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:53.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:00:53.699 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:00:53.699 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:53.699 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:00:53.699 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:00:53.702 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:00:53.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:00:53.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:00:53.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:53.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:00:53.704 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:00:53.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:00:53.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:00:53.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:53.706 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:00:53.706 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:00:53.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:00:53.707 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:53.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:00:53.707 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:00:53.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:00:53.707 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:00:53.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:53.710 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:00:53.711 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:00:53.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:00:53.711 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:00:53.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:00:53.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:00:53.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:00:53.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:00:53.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:00:53.716 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:00:53.717 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:00:53.717 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:00:53.717 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:00:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:00:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:00:53.722 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:00:54.199 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:00:54.251 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:00:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:00:54.253 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:00:54.255 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:00:54.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:00:54.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:00:54.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:00:54.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:00:54.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:00:54.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:00:54.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:00:54.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:00:54.671 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:00:54.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:54.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:54.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:54.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:55.142 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:00:55.616 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:00:55.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:55.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:55.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:55.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:56.088 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:00:56.559 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:00:56.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:56.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:56.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:56.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:57.030 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:00:57.501 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:00:57.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:57.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:57.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:57.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:57.972 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:00:58.443 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:00:58.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:00:58.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:00:58.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:00:58.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:00:58.916 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:00:59.389 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:00:59.861 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:01:00.332 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:01:00.805 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:01:01.277 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:01:01.749 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:01:02.220 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:01:02.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:01:02.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:01:02.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:02.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:02.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:02.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:02.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:02.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:02.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:02.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:02.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:01:02.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:01:02.303 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:01:02.303 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:02.304 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:02.304 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:02.304 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:02.304 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:02.304 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:02.304 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:02.304 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:02.304 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:07.306 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:01:07.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:01:07.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:07.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:07.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:07.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:07.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:07.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:01:07.314 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:07.315 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:01:07.315 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:01:07.318 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:01:07.318 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:01:07.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:01:07.319 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:07.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:07.320 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:01:07.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:01:07.320 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:01:07.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:07.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:01:07.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:01:07.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:01:07.323 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:07.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:07.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:01:07.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:01:07.324 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:01:07.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:07.325 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:01:07.325 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:01:07.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:01:07.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:07.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:07.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:01:07.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:01:07.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:01:07.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:07.329 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:01:07.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:01:07.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:01:07.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:01:07.329 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:01:07.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:01:07.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:01:07.330 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:01:07.330 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:01:07.330 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:07.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:07.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:07.335 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:01:07.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:01:07.861 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:01:07.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:01:07.863 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:01:07.866 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:01:07.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:01:07.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:01:07.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:01:07.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:01:07.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:01:07.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:01:07.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:01:07.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:01:08.285 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:01:08.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:08.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:08.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:08.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:08.757 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:01:09.230 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:01:09.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:09.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:09.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:09.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:09.702 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:01:10.174 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:01:10.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:10.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:10.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:10.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:10.645 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:01:11.119 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:01:11.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:11.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:11.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:11.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:11.591 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:01:12.063 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:01:12.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:12.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:12.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:12.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:12.534 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:01:13.007 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:01:13.479 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:01:13.951 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:01:14.423 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:01:14.896 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:01:15.368 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:01:15.840 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:01:15.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:01:15.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:01:15.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:15.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:15.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:15.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:15.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:15.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:15.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:15.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:15.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:01:15.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:01:15.920 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:01:15.920 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:15.920 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:15.920 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:15.920 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:20.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:01:20.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:01:20.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:20.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:20.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:20.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:20.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:20.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:01:20.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:20.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:01:20.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:01:20.939 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:01:20.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:01:20.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:01:20.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:20.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:20.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:01:20.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:01:20.942 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:01:20.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:20.945 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:01:20.945 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:01:20.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:01:20.946 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:20.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:20.946 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:01:20.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:01:20.947 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:01:20.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:20.949 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:01:20.949 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:01:20.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:01:20.950 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:20.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:20.950 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:01:20.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:01:20.950 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:01:20.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:20.955 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:01:20.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:01:20.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:01:20.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:01:20.955 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:20.956 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:01:20.956 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:01:20.956 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:01:20.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:01:20.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:20.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:20.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:20.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:01:20.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:20.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:20.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:20.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:20.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:20.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:20.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:20.961 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:01:21.440 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:01:21.489 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:01:21.491 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:01:21.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:01:21.493 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:01:21.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:01:21.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:01:21.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:01:21.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:01:21.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:01:21.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:01:21.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:01:21.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:01:21.912 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:01:21.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:21.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:21.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:21.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:22.384 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:01:22.857 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:01:22.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:22.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:22.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:22.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:23.329 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:01:23.801 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:01:23.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:23.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:23.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:23.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:24.272 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:01:24.743 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:01:24.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:24.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:24.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:24.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:25.214 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:01:25.687 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:01:25.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:25.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:25.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:25.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:26.160 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:01:26.632 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:01:27.103 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:01:27.576 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:01:28.048 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:01:28.520 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:01:28.991 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:01:29.464 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:01:29.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:01:29.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:01:29.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:29.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:29.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:29.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:29.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:29.543 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:29.543 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:29.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:29.543 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:01:29.543 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:01:29.543 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:01:34.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:01:34.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:01:34.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:34.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:34.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:34.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:34.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:34.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:01:34.559 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:34.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:01:34.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:01:34.565 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:01:34.565 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:01:34.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:01:34.566 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:34.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:34.566 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:01:34.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:01:34.566 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:01:34.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:34.570 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:01:34.570 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:01:34.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:01:34.571 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:34.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:34.571 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:01:34.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:01:34.571 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:01:34.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:34.574 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:01:34.574 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:01:34.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:01:34.574 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:34.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:34.574 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:01:34.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:01:34.575 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:01:34.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:01:34.578 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:01:34.579 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:01:34.579 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:01:34.579 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:34.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:34.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:34.584 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:01:35.062 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:01:35.108 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:01:35.109 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:01:35.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:01:35.110 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:01:35.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:01:35.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:01:35.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:01:35.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:01:35.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:01:35.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:01:35.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:01:35.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:01:35.534 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:01:35.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:35.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:35.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:35.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:36.005 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:01:36.478 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:01:36.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:36.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:36.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:36.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:36.951 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:01:37.422 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:01:37.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:37.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:37.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:37.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:37.894 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:01:38.367 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:01:38.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:38.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:38.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:38.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:38.840 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:01:39.312 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:01:39.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:39.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:39.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:39.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:39.783 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:01:40.253 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:01:40.724 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:01:41.198 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:01:41.670 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:01:42.142 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:01:42.613 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:01:43.087 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:01:43.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:01:43.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:01:43.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:43.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:43.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:43.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:43.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:43.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:43.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:43.172 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:43.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:01:43.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:01:43.172 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:01:43.172 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:43.173 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:43.173 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:43.173 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:43.173 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:43.173 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:01:48.175 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:01:48.175 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:01:48.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:48.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:48.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:48.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:48.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:01:48.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:01:48.186 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:48.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:01:48.187 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:01:48.190 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:01:48.191 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:01:48.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:01:48.191 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:48.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:01:48.192 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:01:48.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:01:48.192 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:01:48.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:48.194 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:01:48.194 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:01:48.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:01:48.194 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:48.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:01:48.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:01:48.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:01:48.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:01:48.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:48.196 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:01:48.196 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:01:48.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:01:48.197 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:01:48.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:01:48.197 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:01:48.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:01:48.197 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:01:48.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:01:48.200 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:01:48.200 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:01:48.200 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:48.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:01:48.205 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:01:48.682 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:01:48.726 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:01:48.728 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:01:48.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:01:48.730 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:01:48.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:01:48.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:01:48.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:01:48.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:01:48.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:01:48.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:01:48.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:01:48.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:01:49.155 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:01:49.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:49.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:49.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:49.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:49.626 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:01:50.099 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:01:50.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:50.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:50.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:50.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:50.572 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:01:51.044 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:01:51.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:51.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:51.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:51.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:51.515 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:01:51.988 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:01:52.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:52.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:52.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:52.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:52.461 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:01:52.933 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:01:53.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:01:53.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:01:53.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:01:53.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:01:53.403 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:01:53.874 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:01:54.345 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:01:54.819 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:01:55.291 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:01:55.763 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:01:56.234 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:01:56.707 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:01:57.180 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:01:57.652 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:01:58.123 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:01:58.596 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:01:59.068 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:01:59.540 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:02:00.011 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:02:00.485 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:02:00.957 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:02:01.429 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:02:01.900 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:02:02.371 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:02:02.842 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:02:03.315 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:02:03.787 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:02:04.259 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:02:04.732 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:02:04.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:02:04.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:02:04.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:04.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:04.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:04.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:04.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:04.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:04.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:04.791 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:02:04.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:04.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:04.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:04.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3585 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:04.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3585 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:04.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3585 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:04.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:04.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:04.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:04.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:09.792 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:09.792 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:09.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:09.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:09.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:09.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:09.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:09.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:02:09.800 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:09.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:02:09.801 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:02:09.802 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:02:09.803 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:02:09.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:02:09.803 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:09.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:09.804 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:02:09.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:02:09.804 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:02:09.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:09.805 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:02:09.805 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:02:09.805 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:02:09.805 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:09.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:09.805 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:02:09.805 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:02:09.805 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:02:09.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:09.807 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:02:09.807 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:02:09.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:02:09.807 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:09.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:09.807 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:02:09.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:02:09.807 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:02:09.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:02:09.810 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:02:09.810 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:02:09.810 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:09.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:09.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:09.815 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:02:10.293 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:02:10.339 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:02:10.341 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:02:10.343 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:02:10.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:02:10.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:02:10.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:02:10.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:02:10.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:02:10.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:02:10.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:02:10.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:02:10.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:02:10.764 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:02:10.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:10.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:10.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:10.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:11.236 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:02:11.709 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:02:11.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:11.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:11.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:11.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:12.182 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:02:12.653 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:02:12.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:12.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:12.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:12.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:13.125 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:02:13.598 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:02:13.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:13.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:13.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:13.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:14.070 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:02:14.542 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:02:14.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:14.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:14.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:14.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:15.013 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:02:15.487 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:02:15.959 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:02:16.431 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:02:16.902 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:02:17.375 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:02:17.847 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:02:18.319 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:02:18.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:02:18.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:02:18.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:18.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:18.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:18.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:18.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:18.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:18.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:18.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:18.407 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:02:18.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:18.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:18.408 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:18.408 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:18.408 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:18.408 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:18.408 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:18.408 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:23.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:23.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:23.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:23.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:23.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:23.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:23.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:23.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:02:23.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:23.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:02:23.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:02:23.414 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:02:23.414 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:02:23.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:02:23.414 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:23.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:23.415 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:02:23.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:02:23.415 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:02:23.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:23.417 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:02:23.417 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:02:23.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:02:23.417 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:23.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:23.418 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:02:23.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:02:23.418 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:02:23.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:23.421 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:02:23.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:02:23.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:02:23.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:23.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:23.422 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:02:23.422 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:02:23.422 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:02:23.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:23.426 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:02:23.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:02:23.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:02:23.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:02:23.426 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:23.427 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:02:23.427 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:02:23.427 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:02:23.428 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:02:23.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:23.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:23.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:23.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:02:23.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:23.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:23.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:23.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:23.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:23.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:23.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:23.432 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:02:23.909 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:02:23.961 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:02:23.963 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:02:23.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:02:23.967 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:02:23.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:02:23.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:02:23.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:02:23.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:02:23.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:02:23.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:02:23.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:02:23.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:02:24.382 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:02:24.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:24.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:24.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:24.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:24.853 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:02:25.326 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:02:25.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:25.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:25.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:25.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:25.799 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:02:26.271 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:02:26.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:26.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:26.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:26.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:26.742 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:02:27.215 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:02:27.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:27.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:27.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:27.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:27.688 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:02:28.160 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:02:28.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:28.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:28.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:28.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:28.631 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:02:29.104 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:02:29.577 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:02:30.049 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:02:30.520 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:02:30.993 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:02:31.465 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:02:31.937 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:02:32.408 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:02:32.882 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:02:33.354 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:02:33.827 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:02:34.300 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:02:34.772 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:02:35.244 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:02:35.715 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:02:36.188 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:02:36.661 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:02:37.133 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:02:37.604 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:02:38.075 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:02:38.548 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:02:39.020 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:02:39.492 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:02:39.966 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:02:40.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:02:40.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:02:40.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:40.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:40.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:40.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:40.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:40.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:40.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:40.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:40.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:40.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:40.030 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:02:45.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:45.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:45.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:45.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:45.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:45.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:45.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:45.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:02:45.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:45.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:02:45.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:02:45.047 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:02:45.047 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:02:45.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:02:45.047 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:45.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:45.048 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:02:45.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:02:45.048 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:02:45.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:45.049 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:02:45.049 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:02:45.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:02:45.050 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:45.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:45.050 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:02:45.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:02:45.050 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:02:45.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:45.052 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:02:45.052 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:02:45.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:02:45.052 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:45.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:45.052 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:02:45.052 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:02:45.052 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:02:45.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:45.054 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:02:45.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:02:45.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:02:45.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:02:45.054 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:02:45.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:02:45.055 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:02:45.055 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:02:45.055 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:45.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:45.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:45.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:45.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:45.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:45.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:45.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:45.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:45.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:45.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:02:45.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:02:45.586 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:02:45.590 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:02:45.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:02:45.592 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:02:45.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:02:45.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:02:45.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:02:45.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:45.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:45.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:45.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:45.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:45.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:45.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:45.630 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:02:45.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:45.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:45.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:45.630 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:45.630 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:45.630 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:45.630 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:45.631 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:45.631 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:50.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:50.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:50.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:50.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:50.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:50.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:50.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:50.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:02:50.641 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:50.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:02:50.641 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:02:50.643 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:02:50.644 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:02:50.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:02:50.644 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:50.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:50.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:02:50.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:02:50.646 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:02:50.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:50.648 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:02:50.648 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:02:50.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:02:50.648 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:50.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:50.649 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:02:50.649 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:02:50.649 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:02:50.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:50.652 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:02:50.652 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:02:50.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:02:50.653 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:50.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:50.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:02:50.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:02:50.653 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:02:50.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:50.658 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:02:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:02:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:02:50.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:02:50.658 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:50.659 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:02:50.660 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:02:50.660 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:02:50.660 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:02:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:50.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:02:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:50.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:50.665 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:02:51.142 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:02:51.193 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:02:51.196 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:02:51.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:02:51.198 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:02:51.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:02:51.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:02:51.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:02:51.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:51.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:51.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:51.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:51.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:51.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:51.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:51.250 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:02:51.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:51.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:51.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:51.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:51.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:51.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:51.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:51.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:51.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:51.252 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:56.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:56.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:56.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:56.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:56.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:56.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:56.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:56.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:02:56.261 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:56.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:02:56.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:02:56.264 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:02:56.264 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:02:56.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:02:56.264 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:56.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:56.265 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:02:56.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:02:56.265 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:02:56.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:56.267 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:02:56.267 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:02:56.267 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:02:56.267 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:56.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:56.267 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:02:56.267 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:02:56.267 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:02:56.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:56.269 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:02:56.269 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:02:56.269 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:02:56.269 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:02:56.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:56.269 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:02:56.269 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:02:56.269 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:02:56.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:56.271 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:02:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:02:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:02:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:02:56.271 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:02:56.272 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:02:56.272 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:02:56.272 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:02:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:56.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:56.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:56.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:02:56.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:02:56.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:02:56.277 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:02:56.755 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:02:56.791 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:02:56.792 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:02:56.793 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:02:56.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:02:56.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:02:56.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:02:56.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:02:56.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:02:56.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:02:56.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:02:56.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:02:56.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:02:56.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:02:56.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:02:56.830 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:02:56.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:02:56.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:02:56.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:02:56.830 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:56.830 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:56.830 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:56.830 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:56.830 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:56.830 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:02:56.830 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:01.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:03:01.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:03:01.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:01.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:01.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:01.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:01.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:01.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:03:01.842 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:01.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:03:01.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:03:01.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:03:01.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:03:01.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:03:01.845 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:01.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:01.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:03:01.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:03:01.846 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:03:01.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:01.847 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:03:01.848 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:03:01.848 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:03:01.848 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:01.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:01.848 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:03:01.848 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:03:01.848 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:03:01.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:01.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:03:01.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:03:01.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:03:01.850 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:01.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:01.850 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:03:01.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:03:01.850 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:03:01.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:03:01.853 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:03:01.853 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:03:01.853 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:03:01.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:01.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:01.858 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:03:02.336 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:03:02.382 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:03:02.384 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:03:02.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:03:02.386 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:03:02.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:03:02.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:03:02.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:03:02.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:02.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:02.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:02.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:02.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:02.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:02.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:02.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:02.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:03:02.432 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:03:02.432 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:03:02.432 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:02.432 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:02.432 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:02.432 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:02.432 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:02.432 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:07.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:03:07.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:03:07.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:07.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:07.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:07.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:07.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:07.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:03:07.447 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:07.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:03:07.448 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:03:07.452 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:03:07.453 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:03:07.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:03:07.453 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:07.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:07.454 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:03:07.455 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:03:07.455 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:03:07.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:07.457 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:03:07.457 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:03:07.458 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:03:07.458 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:07.458 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:07.458 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:03:07.458 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:03:07.459 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:03:07.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:07.461 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:03:07.461 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:03:07.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:03:07.461 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:07.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:07.461 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:03:07.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:03:07.461 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:03:07.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:07.465 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:03:07.465 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:03:07.465 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:03:07.466 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:07.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:07.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:07.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:07.470 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:03:07.948 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:03:07.991 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:03:07.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:03:07.994 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:03:07.997 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:03:08.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:03:08.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:03:08.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:03:08.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:03:08.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:03:08.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:03:08.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:08.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:08.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:08.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:08.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:08.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:08.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:08.036 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:03:08.036 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:03:08.036 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:03:08.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:13.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:03:13.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:03:13.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:13.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:13.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:13.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:13.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:13.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:03:13.050 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:13.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:03:13.051 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:03:13.054 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:03:13.054 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:03:13.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:03:13.054 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:13.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:13.055 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:03:13.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:03:13.055 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:03:13.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:13.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:03:13.058 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:03:13.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:03:13.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:13.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:13.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:03:13.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:03:13.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:03:13.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:13.061 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:03:13.061 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:03:13.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:03:13.061 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:13.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:13.061 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:03:13.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:03:13.061 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:03:13.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:13.064 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:03:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:03:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:03:13.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:03:13.064 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:03:13.065 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:03:13.065 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:03:13.065 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:13.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:13.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:13.070 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:03:13.547 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:03:13.593 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:03:13.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:03:13.596 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:03:13.599 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:03:13.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:03:13.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:03:13.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:03:13.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:03:13.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:03:13.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:03:13.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:13.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:13.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:13.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:13.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:13.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:13.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:03:13.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:03:13.666 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:03:13.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:13.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:18.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:03:18.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:03:18.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:18.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:18.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:18.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:18.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:18.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:03:18.679 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:18.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:03:18.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:03:18.681 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:03:18.681 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:03:18.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:03:18.681 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:18.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:18.682 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:03:18.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:03:18.682 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:03:18.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:18.684 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:03:18.684 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:03:18.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:03:18.684 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:18.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:18.684 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:03:18.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:03:18.684 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:03:18.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:18.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:03:18.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:03:18.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:03:18.687 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:18.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:18.687 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:03:18.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:03:18.687 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:03:18.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:18.690 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:03:18.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:03:18.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:03:18.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:03:18.690 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:03:18.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:03:18.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:03:18.691 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:03:18.691 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:03:18.691 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:18.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:18.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:18.696 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:03:19.173 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:03:19.222 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:03:19.223 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:03:19.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:03:19.226 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:03:19.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:03:19.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:03:19.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:03:19.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:03:19.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:03:19.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:03:19.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:03:19.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:03:19.646 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:03:19.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:19.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:19.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:19.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:20.117 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:03:20.590 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:03:20.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:20.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:20.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:20.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:21.063 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:03:21.534 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:03:21.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:21.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:21.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:21.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:22.006 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:03:22.479 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:03:22.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:22.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:22.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:22.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:22.951 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:03:23.423 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:03:23.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:23.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:23.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:23.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:23.894 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:03:24.365 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:03:24.838 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:03:25.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:03:25.783 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:03:26.254 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:03:26.727 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:03:27.200 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:03:27.672 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:03:28.145 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:03:28.617 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:03:29.089 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:03:29.560 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:03:30.034 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:03:30.506 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:03:30.978 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:03:31.449 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:03:31.923 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:03:32.395 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:03:32.867 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:03:33.341 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:03:33.813 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:03:34.285 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:03:34.756 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:03:35.229 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:03:35.702 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:03:36.174 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:03:36.646 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:03:37.119 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:03:37.591 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:03:38.065 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:03:38.537 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:03:39.009 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:03:39.480 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:03:39.953 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:03:40.426 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:03:40.898 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:03:41.372 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:03:41.844 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:03:42.316 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:03:42.787 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:03:43.260 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:03:43.732 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:03:44.204 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:03:44.675 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:03:45.146 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:03:45.619 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:03:46.092 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:03:46.564 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:03:47.035 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:03:47.508 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:03:47.981 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 05:03:48.453 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 05:03:48.926 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 05:03:49.399 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 05:03:49.871 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 05:03:50.342 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 05:03:50.815 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 05:03:51.287 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 05:03:51.759 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 05:03:52.230 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 05:03:52.704 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 05:03:52.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:03:52.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:03:52.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:52.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:52.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:52.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:52.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:52.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:52.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:52.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:52.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:03:52.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:03:52.722 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:03:52.723 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7350 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.723 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7350 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.723 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7350 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.723 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.723 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.723 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.723 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.724 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.724 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7351 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.724 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7351 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.724 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7351 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.724 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7351 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:52.724 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=7351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:03:57.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:03:57.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:03:57.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:57.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:57.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:57.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:57.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:03:57.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:03:57.737 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:57.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:03:57.737 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:03:57.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:03:57.740 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:03:57.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:03:57.740 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:57.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:03:57.741 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:03:57.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:03:57.741 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:03:57.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:57.743 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:03:57.743 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:03:57.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:03:57.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:57.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:03:57.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:03:57.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:03:57.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:03:57.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:57.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:03:57.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:03:57.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:03:57.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:03:57.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:03:57.745 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:03:57.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:03:57.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:03:57.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:57.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:03:57.749 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:03:57.749 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:03:57.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:03:57.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:57.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:03:57.753 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:03:58.233 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:03:58.271 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:03:58.273 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:03:58.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:03:58.275 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:03:58.704 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:03:58.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:58.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:58.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:58.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:03:59.178 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:03:59.651 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:03:59.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:03:59.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:03:59.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:03:59.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:00.122 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:04:00.596 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:04:00.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:00.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:00.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:00.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:01.069 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:04:01.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:04:01.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:01.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:01.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:01.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:01.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:01.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:01.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:01.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:01.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:01.303 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:04:01.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:06.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:06.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:06.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:06.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:06.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:06.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:06.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:06.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:04:06.317 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:06.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:04:06.318 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:04:06.320 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:04:06.321 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:04:06.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:04:06.321 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:06.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:06.322 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:04:06.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:04:06.322 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:04:06.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:06.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:04:06.323 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:04:06.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:04:06.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:06.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:06.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:04:06.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:04:06.324 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:04:06.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:06.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:04:06.326 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:04:06.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:04:06.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:06.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:06.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:04:06.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:04:06.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:04:06.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:04:06.329 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:04:06.329 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:04:06.329 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:06.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:06.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:06.334 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:04:06.812 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:04:06.854 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:04:06.856 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:04:06.858 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:04:06.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:04:07.284 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:04:07.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:07.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:07.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:07.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:07.758 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:04:08.230 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:04:08.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:08.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:08.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:08.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:08.702 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:04:09.176 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:04:09.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:09.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:09.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:09.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:09.649 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:04:10.120 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:04:10.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:10.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:10.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:10.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:10.596 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:04:11.068 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:04:11.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:11.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:11.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:11.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:11.543 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:04:12.015 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:04:12.490 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:04:12.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:12.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:12.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:12.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:12.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:12.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:12.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:12.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:12.872 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:04:12.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:12.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:17.879 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:17.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:17.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:17.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:17.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:17.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:17.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:17.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:04:17.889 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:17.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:04:17.889 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:04:17.892 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:04:17.892 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:04:17.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:04:17.893 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:17.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:17.894 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:04:17.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:04:17.894 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:04:17.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:17.895 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:04:17.896 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:04:17.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:04:17.896 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:17.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:17.896 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:04:17.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:04:17.896 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:04:17.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:17.898 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:04:17.898 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:04:17.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:04:17.898 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:17.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:17.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:04:17.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:04:17.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:04:17.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:17.901 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:04:17.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:04:17.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:04:17.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:04:17.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:04:17.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:04:17.902 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:04:17.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:17.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:17.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:17.907 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:04:18.385 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:04:18.423 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:04:18.423 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:04:18.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:04:18.426 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:04:18.856 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:04:18.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:18.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:18.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:18.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:19.330 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:04:19.803 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:04:19.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:19.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:19.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:19.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:20.275 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:04:20.750 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:04:20.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:20.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:20.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:20.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:21.224 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:04:21.697 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:04:21.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:21.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:21.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:21.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:22.169 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:04:22.644 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:04:22.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:22.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:22.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:22.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:23.116 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:04:23.591 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:04:24.062 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:04:24.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:24.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:24.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:24.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:24.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:24.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:24.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:24.443 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:04:24.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:24.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:24.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:24.443 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:04:24.443 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:04:24.443 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:04:24.443 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:04:24.443 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:04:24.443 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:04:24.443 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:04:29.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:29.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:29.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:29.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:29.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:29.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:29.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:29.458 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:04:29.458 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:29.458 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:04:29.458 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:04:29.464 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:04:29.464 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:04:29.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:04:29.464 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:29.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:29.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:04:29.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:04:29.465 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:04:29.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:29.469 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:04:29.469 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:04:29.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:04:29.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:29.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:29.470 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:04:29.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:04:29.470 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:04:29.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:29.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:04:29.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:04:29.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:04:29.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:29.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:29.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:04:29.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:04:29.475 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:04:29.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:29.480 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:04:29.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:04:29.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:04:29.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:04:29.480 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:04:29.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:04:29.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:04:29.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:04:29.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:04:29.481 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:04:29.481 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:29.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:04:29.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:29.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:29.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:29.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:29.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:29.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:29.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:29.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:29.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:29.486 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:04:29.964 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:04:30.006 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:04:30.008 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:04:30.011 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:04:30.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:04:30.436 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:04:30.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:30.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:30.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:30.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:30.909 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:04:31.382 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:04:31.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:31.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:31.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:31.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:31.854 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:04:32.329 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:04:32.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:32.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:32.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:32.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:32.803 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:04:33.276 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:04:33.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:33.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:33.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:33.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:33.748 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:04:34.222 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:04:34.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:34.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:34.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:34.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:34.694 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:04:35.166 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:04:35.642 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:04:36.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:36.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:36.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:36.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:36.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:36.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:36.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:36.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:36.028 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:36.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:36.028 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:04:41.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:41.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:41.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:41.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:41.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:41.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:41.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:41.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:04:41.041 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:41.041 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:04:41.041 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:04:41.043 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:04:41.043 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:04:41.044 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:04:41.044 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:41.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:41.044 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:04:41.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:04:41.045 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:04:41.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:41.047 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:04:41.047 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:04:41.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:04:41.047 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:41.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:41.048 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:04:41.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:04:41.048 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:04:41.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:41.050 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:04:41.050 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:04:41.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:04:41.050 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:41.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:41.050 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:04:41.050 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:04:41.050 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:04:41.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:41.053 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:04:41.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:04:41.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:04:41.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:04:41.053 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:04:41.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:04:41.054 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:04:41.054 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:04:41.054 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:41.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:41.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:41.059 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:04:41.538 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:04:41.582 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:04:41.584 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:04:41.586 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:04:41.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:04:42.009 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:04:42.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:42.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:42.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:42.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:42.482 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:04:42.955 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:04:43.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:43.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:43.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:43.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:43.427 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:04:43.903 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:04:44.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:44.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:44.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:44.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:44.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:04:44.848 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:04:45.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:45.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:45.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:45.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:45.321 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:04:45.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:04:45.793 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:04:46.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:46.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:46.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:46.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:46.267 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:04:46.739 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:04:47.211 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:04:47.684 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:04:48.157 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:04:48.629 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:04:49.104 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:04:49.576 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:04:49.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:49.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:49.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:49.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:49.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:49.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:49.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:49.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:49.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:49.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:49.611 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:04:54.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:54.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:54.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:54.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:54.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:54.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:54.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:54.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:04:54.621 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:54.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:04:54.621 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:04:54.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:04:54.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:04:54.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:04:54.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:54.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:54.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:04:54.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:04:54.625 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:04:54.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:54.626 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:04:54.626 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:04:54.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:04:54.626 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:54.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:54.627 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:04:54.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:04:54.627 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:04:54.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:54.628 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:04:54.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:04:54.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:04:54.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:04:54.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:54.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:04:54.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:04:54.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:04:54.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:54.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:04:54.632 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:04:54.632 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:04:54.632 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:54.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:04:54.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:04:54.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:04:54.636 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:04:55.115 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:04:55.159 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:04:55.161 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:04:55.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:04:55.163 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:04:55.587 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:04:55.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:55.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:55.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:55.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:56.062 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:04:56.534 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:04:56.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:56.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:56.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:56.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:57.010 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:04:57.482 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:04:57.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:57.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:57.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:57.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:57.957 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:04:58.429 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:04:58.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:58.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:58.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:58.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:58.904 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:04:59.178 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:04:59.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:04:59.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:04:59.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:04:59.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:04:59.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:04:59.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:04:59.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:04:59.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:04:59.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:04:59.179 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:05:04.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:04.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:04.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:04.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:04.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:04.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:04.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:04.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:04.197 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:04.197 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:04.198 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:05:04.199 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:05:04.199 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:05:04.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:04.199 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:04.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:04.199 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:05:04.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:04.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:05:04.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:04.201 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:05:04.201 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:05:04.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:04.201 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:04.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:04.201 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:05:04.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:04.201 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:05:04.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:04.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:05:04.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:05:04.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:04.202 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:04.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:04.202 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:05:04.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:04.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:05:04.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:04.204 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:05:04.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:05:04.205 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:05:04.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:04.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:04.209 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:05:04.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:05:04.731 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:05:04.734 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:05:04.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:04.736 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:05:04.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:04.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:04.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:04.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:04.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:04.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:04.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:04.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:04.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:04.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:04.753 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:05:04.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:04.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:04.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:04.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:04.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:04.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:04.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:09.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:09.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:09.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:09.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:09.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:09.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:09.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:09.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:09.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:09.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:09.765 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:05:09.768 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:05:09.768 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:05:09.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:09.768 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:09.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:09.769 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:05:09.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:09.769 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:05:09.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:09.773 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:05:09.773 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:05:09.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:09.773 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:09.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:09.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:05:09.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:09.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:05:09.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:09.778 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:05:09.778 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:05:09.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:09.778 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:09.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:09.778 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:05:09.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:09.778 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:05:09.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:09.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:09.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:09.785 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:05:09.785 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:05:09.785 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:05:09.785 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:05:09.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:09.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:09.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:09.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:05:09.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:09.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:09.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:09.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:09.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:09.790 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:05:10.267 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:05:10.322 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:05:10.324 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:05:10.325 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:05:10.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:10.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:10.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:10.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:10.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:10.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:10.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:10.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:10.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:10.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:10.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:10.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:10.340 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:05:15.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:15.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:15.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:15.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:15.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:15.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:15.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:15.363 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:15.364 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:15.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:15.364 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:05:15.368 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:05:15.368 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:05:15.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:15.368 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:15.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:15.369 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:05:15.369 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:15.369 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:05:15.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:15.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:05:15.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:05:15.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:15.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:15.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:15.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:05:15.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:15.374 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:05:15.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:15.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:05:15.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:05:15.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:15.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:15.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:15.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:05:15.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:15.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:05:15.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:05:15.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:15.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:15.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:15.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:15.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:15.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:15.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:15.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:05:15.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:05:15.384 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:05:15.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:05:15.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:15.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:15.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:15.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:15.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:15.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:15.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:15.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:05:15.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:05:15.918 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:05:15.920 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:05:15.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:15.922 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:05:15.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:15.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:15.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:15.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:15.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:15.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:15.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:15.938 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:05:15.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:15.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:15.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:15.939 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:15.939 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:15.939 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:15.939 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:15.939 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:15.939 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:20.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:20.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:20.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:20.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:20.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:20.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:20.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:20.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:20.954 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:20.955 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:20.955 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:05:20.960 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:05:20.961 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:05:20.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:20.961 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:20.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:20.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:05:20.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:20.962 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:05:20.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:20.966 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:05:20.966 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:05:20.966 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:20.966 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:20.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:20.966 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:05:20.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:20.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:05:20.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:20.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:05:20.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:05:20.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:20.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:20.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:20.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:05:20.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:20.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:05:20.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:20.974 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:05:20.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:05:20.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:05:20.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:05:20.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:05:20.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:05:20.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:05:20.975 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:05:20.975 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:05:20.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:20.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:20.980 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:05:21.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:05:21.507 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:05:21.510 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:05:21.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:21.512 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:05:21.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:05:21.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:05:21.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:05:21.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:21.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:05:21.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:05:21.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:05:21.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:05:21.930 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:05:21.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:21.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:21.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:21.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:22.401 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:05:22.875 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:05:22.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:22.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:22.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:22.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:23.346 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:05:23.818 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:05:23.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:23.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:23.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:23.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:24.289 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:05:24.573 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:05:24.574 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 05:05:24.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:24.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:24.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:05:24.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:05:24.619 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:05:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:24.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:24.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:24.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:24.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:24.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:24.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:24.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:24.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:24.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:24.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:24.627 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:05:29.631 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:29.631 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:29.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:29.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:29.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:29.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:29.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:29.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:29.642 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:29.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:29.642 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:05:29.647 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:05:29.647 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:05:29.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:29.647 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:29.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:29.647 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:05:29.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:29.648 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:05:29.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:29.651 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:05:29.651 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:05:29.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:29.652 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:29.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:29.652 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:05:29.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:29.652 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:05:29.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:29.655 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:05:29.655 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:05:29.656 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:29.656 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:29.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:29.656 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:05:29.656 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:29.656 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:05:29.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:29.661 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:05:29.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:05:29.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:05:29.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:05:29.661 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:05:29.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:29.662 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:05:29.662 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:05:29.662 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:05:29.662 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:29.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:29.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:29.667 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:05:30.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:05:30.200 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:05:30.202 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:05:30.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:30.204 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:05:30.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:05:30.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:05:30.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:05:30.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:30.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:05:30.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:05:30.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:05:30.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:05:30.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:05:30.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:30.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:30.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:30.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:31.089 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:05:31.562 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:05:31.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:31.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:31.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:31.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:32.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:05:32.506 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:05:32.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:32.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:32.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:32.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:32.977 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:05:33.261 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:05:33.261 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 05:05:33.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:33.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:33.451 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:05:33.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:33.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:33.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:33.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:33.923 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:05:33.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:05:33.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:05:33.935 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:05:33.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:33.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:33.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:33.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:33.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:33.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:33.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:33.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:33.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:33.946 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:05:33.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:33.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:38.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:38.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:38.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:38.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:38.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:38.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:38.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:38.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:38.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:38.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:38.953 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:05:38.954 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:05:38.954 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:05:38.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:38.954 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:38.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:38.954 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:05:38.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:38.954 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:05:38.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:38.955 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:05:38.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:05:38.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:38.955 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:38.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:38.955 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:05:38.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:38.955 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:05:38.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:38.957 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:05:38.957 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:05:38.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:38.957 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:38.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:38.957 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:05:38.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:38.957 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:05:38.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:05:38.959 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:05:38.959 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:05:38.959 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:38.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:38.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:38.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:38.964 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:05:39.442 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:05:39.492 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:05:39.495 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:05:39.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:39.498 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:05:39.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:05:39.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:05:39.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:05:39.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:39.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:05:39.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:05:39.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:05:39.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:05:39.914 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:05:39.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:39.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:39.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:39.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:40.385 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:05:40.858 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:05:40.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:40.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:40.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:40.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:41.331 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:05:41.803 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:05:41.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:41.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:41.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:41.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:42.274 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:05:42.557 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:05:42.557 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 05:05:42.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:42.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:42.747 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:05:42.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:42.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:42.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:42.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:43.219 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:05:43.691 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:05:43.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:43.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:43.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:43.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:44.162 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:05:44.636 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:05:45.108 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:05:45.579 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:05:46.051 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:05:46.524 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:05:46.996 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:05:47.468 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:05:47.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:05:47.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:05:47.560 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:05:47.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:47.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:47.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:47.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:47.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:47.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:47.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:47.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:47.579 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:05:47.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:47.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:47.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:47.579 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:47.579 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:47.579 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:47.579 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:47.579 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:47.579 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:05:52.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:05:52.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:05:52.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:52.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:52.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:52.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:52.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:05:52.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:52.594 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:52.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:05:52.595 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:05:52.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:05:52.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:05:52.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:52.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:52.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:05:52.601 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:05:52.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:05:52.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:05:52.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:52.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:05:52.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:05:52.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:52.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:52.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:05:52.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:05:52.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:05:52.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:05:52.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:52.606 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:05:52.606 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:05:52.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:52.607 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:05:52.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:05:52.607 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:05:52.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:05:52.607 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:05:52.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:52.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:05:52.611 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:05:52.611 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:05:52.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:52.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:05:52.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:52.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:52.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:52.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:05:52.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:52.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:52.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:05:52.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:52.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:05:52.615 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:05:53.094 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:05:53.140 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:05:53.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:05:53.143 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:05:53.145 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:05:53.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:05:53.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:05:53.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:05:53.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:53.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:05:53.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:05:53.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:05:53.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:05:53.566 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:05:53.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:53.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:53.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:53.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:54.037 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:05:54.508 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:05:54.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:54.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:54.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:54.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:54.979 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:05:55.452 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:05:55.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:55.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:55.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:55.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:55.925 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:05:56.209 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:05:56.209 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 05:05:56.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:56.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:05:56.397 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:05:56.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:56.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:56.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:56.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:56.870 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:05:57.343 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:05:57.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:05:57.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:05:57.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:05:57.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:05:57.814 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:05:58.286 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:05:58.759 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:05:59.231 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:05:59.703 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:06:00.175 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:06:00.648 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:06:01.120 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:06:01.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:01.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:01.213 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:06:01.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:01.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:01.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:01.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:01.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:01.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:01.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:01.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:01.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:01.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:01.228 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:06:01.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:01.229 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.229 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.229 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.229 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.229 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1861 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.229 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1861 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.229 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.229 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.229 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.229 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.230 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:01.230 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:06.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:06.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:06.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:06.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:06.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:06.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:06.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:06.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:06.233 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:06.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:06.233 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:06:06.234 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:06:06.234 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:06:06.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:06.234 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:06.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:06.235 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:06:06.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:06.235 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:06:06.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:06.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:06:06.236 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:06:06.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:06.236 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:06.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:06.236 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:06:06.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:06.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:06:06.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:06.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:06:06.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:06:06.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:06.237 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:06.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:06.237 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:06:06.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:06.237 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:06:06.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:06:06.239 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:06:06.239 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:06:06.239 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:06.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:06.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:06.244 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:06:06.721 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:06:06.767 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:06:06.770 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:06:06.772 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:06:06.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:06.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:06.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:06.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:06:06.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:06.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:06:06.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:06:06.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:06:06.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:06:07.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:06:07.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:07.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:07.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:07.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:07.664 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:06:08.135 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:06:08.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:08.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:08.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:08.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:08.607 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:06:09.080 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:06:09.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:09.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:09.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:09.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:09.552 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:06:09.836 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:06:09.836 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 05:06:09.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:09.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:10.023 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:06:10.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:10.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:10.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:10.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:10.496 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:06:10.969 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:06:11.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:11.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:11.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:11.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:11.441 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:06:11.912 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:06:12.385 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:06:12.857 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:06:13.328 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:06:13.800 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:06:14.274 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:06:14.745 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:06:14.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:14.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:14.839 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:06:14.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:14.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:14.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:14.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:14.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:14.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:14.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:14.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:14.859 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:06:14.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:14.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:14.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:14.859 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:14.859 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:14.859 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:14.859 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:14.859 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:14.859 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:19.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:19.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:19.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:19.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:19.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:19.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:19.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:19.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:19.883 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:19.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:19.884 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:06:19.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:06:19.886 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:06:19.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:19.886 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:19.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:19.887 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:06:19.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:19.887 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:06:19.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:19.889 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:06:19.889 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:06:19.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:19.889 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:19.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:19.889 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:06:19.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:19.889 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:06:19.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:19.891 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:06:19.891 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:06:19.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:19.891 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:19.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:19.891 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:06:19.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:19.891 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:06:19.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:06:19.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:06:19.894 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:06:19.894 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:19.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:19.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:19.899 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:06:20.378 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:06:20.424 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:06:20.427 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:06:20.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:20.429 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:06:20.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:20.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:20.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:06:20.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:20.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:06:20.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:06:20.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:06:20.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:06:20.468 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:06:20.469 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 05:06:20.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:20.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:20.849 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:06:20.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:20.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:20.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:20.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:21.321 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:06:21.794 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:06:21.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:21.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:21.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:21.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:22.267 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:06:22.738 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:06:22.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:22.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:22.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:22.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:23.210 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:06:23.683 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:06:23.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:23.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:23.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:23.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:24.155 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:06:24.627 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:06:24.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:24.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:24.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:24.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:25.098 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:06:25.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:25.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:25.470 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:06:25.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:25.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:25.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:25.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:25.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:25.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:25.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:25.487 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:06:25.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:25.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:25.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:25.487 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:25.487 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:25.487 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:25.488 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:25.488 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:25.488 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:25.488 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:30.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:30.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:30.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:30.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:30.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:30.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:30.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:30.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:30.497 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:30.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:30.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:06:30.501 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:06:30.501 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:06:30.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:30.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:30.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:30.502 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:06:30.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:30.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:06:30.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:30.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:06:30.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:06:30.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:30.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:30.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:30.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:06:30.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:30.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:06:30.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:30.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:06:30.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:06:30.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:30.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:30.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:30.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:06:30.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:30.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:06:30.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:30.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:06:30.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:06:30.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:06:30.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:06:30.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:06:30.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:06:30.512 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:06:30.512 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:30.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:30.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:30.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:06:30.995 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:06:31.040 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:06:31.042 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:06:31.044 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:06:31.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:31.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:31.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:31.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:06:31.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:31.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:06:31.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:06:31.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:06:31.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:06:31.467 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:06:31.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:31.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:31.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:31.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:31.938 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:06:32.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:06:32.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:32.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:32.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:32.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:32.884 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:06:33.356 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:06:33.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:33.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:33.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:33.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:33.827 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:06:34.110 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:06:34.111 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 05:06:34.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:34.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:34.300 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:06:34.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:34.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:34.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:34.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:34.773 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:06:35.244 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:06:35.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:35.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:35.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:35.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:35.716 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:06:36.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:36.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:36.115 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:06:36.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:36.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:36.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:36.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:36.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:36.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:36.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:36.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:36.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:36.127 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:06:36.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:36.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:41.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:41.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:41.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:41.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:41.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:41.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:41.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:41.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:41.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:41.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:41.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:06:41.148 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:06:41.148 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:06:41.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:41.149 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:41.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:41.149 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:06:41.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:41.150 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:06:41.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:41.151 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:06:41.151 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:06:41.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:41.152 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:41.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:41.152 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:06:41.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:41.152 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:06:41.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:41.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:06:41.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:06:41.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:41.154 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:41.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:41.154 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:06:41.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:41.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:06:41.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:41.157 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:06:41.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:06:41.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:06:41.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:06:41.157 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:06:41.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:06:41.158 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:06:41.158 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:06:41.158 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:41.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:41.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:41.163 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:06:41.641 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:06:41.679 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:06:41.680 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:06:41.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:41.682 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:06:41.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:41.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:41.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:06:41.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:41.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:06:41.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:06:41.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:06:41.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:06:42.112 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:06:42.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:42.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:42.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:42.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:42.584 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:06:43.057 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:06:43.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:43.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:43.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:43.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:43.529 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:06:44.001 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:06:44.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:44.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:44.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:44.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:44.472 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:06:44.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:44.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:44.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:44.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:44.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:44.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:44.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:44.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:44.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:44.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:44.794 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:06:44.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:44.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:44.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:44.794 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:44.794 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:44.794 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:44.794 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:44.794 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:44.794 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:49.799 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:49.799 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:49.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:49.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:49.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:49.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:49.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:49.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:49.810 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:49.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:49.811 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:06:49.813 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:06:49.813 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:06:49.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:49.814 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:49.814 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:49.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:06:49.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:49.815 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:06:49.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:49.816 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:06:49.816 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:06:49.816 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:49.816 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:49.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:49.816 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:06:49.816 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:49.816 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:06:49.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:49.818 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:06:49.819 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:06:49.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:49.819 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:49.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:49.819 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:06:49.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:49.819 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:06:49.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:49.822 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:06:49.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:06:49.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:06:49.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:06:49.822 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:06:49.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:06:49.823 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:06:49.823 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:06:49.823 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:49.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:49.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:49.828 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:06:50.307 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:06:50.359 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:06:50.361 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:06:50.362 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:06:50.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:50.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:50.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:50.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:06:50.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:50.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:06:50.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:06:50.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:06:50.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:06:50.779 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:06:50.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:50.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:50.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:50.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:51.250 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:06:51.723 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:06:51.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:51.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:51.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:51.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:52.196 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:06:52.667 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:06:52.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:52.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:52.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:52.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:53.138 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:06:53.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:53.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:53.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:53.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:53.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:53.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:53.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:53.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:53.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:53.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:53.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:53.462 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:06:53.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:53.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:53.462 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:53.462 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:53.462 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:53.462 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:53.462 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:53.462 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:06:58.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:58.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:58.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:58.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:58.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:58.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:58.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:58.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:58.474 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:58.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:06:58.475 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:06:58.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:06:58.478 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:06:58.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:58.479 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:58.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:58.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:06:58.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:06:58.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:06:58.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:58.481 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:06:58.481 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:06:58.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:58.481 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:58.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:58.481 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:06:58.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:06:58.482 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:06:58.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:58.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:06:58.484 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:06:58.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:58.484 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:06:58.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:06:58.484 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:06:58.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:06:58.484 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:06:58.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:58.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:06:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:06:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:06:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:06:58.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:06:58.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:06:58.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:06:58.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:06:58.487 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:06:58.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:58.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:06:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:06:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:58.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:06:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:06:58.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:06:58.970 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:06:59.020 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:06:59.022 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:06:59.024 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:06:59.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:06:59.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:59.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:59.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:06:59.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:06:59.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:06:59.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:06:59.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:06:59.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:06:59.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:06:59.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:06:59.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:06:59.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:06:59.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:06:59.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:06:59.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:06:59.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:06:59.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:06:59.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:06:59.293 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:06:59.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:06:59.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:04.300 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:04.300 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:04.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:04.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:04.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:04.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:04.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:04.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:04.310 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:04.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:04.310 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:07:04.313 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:07:04.314 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:07:04.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:04.314 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:04.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:04.315 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:07:04.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:04.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:07:04.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:04.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:07:04.317 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:07:04.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:04.318 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:04.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:04.318 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:07:04.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:04.318 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:07:04.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:04.320 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:07:04.320 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:07:04.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:04.320 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:04.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:04.320 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:07:04.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:04.320 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:07:04.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:04.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:07:04.324 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:07:04.324 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:07:04.324 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:04.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:04.328 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:07:04.806 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:07:04.851 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:07:04.851 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:07:04.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:07:04.854 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:07:04.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:07:04.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:07:04.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:07:04.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:07:04.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:07:04.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:07:04.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:07:04.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:07:05.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:07:05.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:07:05.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:05.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:05.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:05.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:05.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:05.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:05.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:05.085 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:07:05.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:05.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:05.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:05.085 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=163 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:05.085 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=163 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:05.085 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:05.085 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:05.085 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:05.085 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:05.085 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:05.085 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:05.085 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:05.085 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:10.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:10.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:10.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:10.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:10.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:10.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:10.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:10.101 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:10.101 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:10.101 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:10.101 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:07:10.104 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:07:10.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:07:10.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:10.105 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:10.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:10.106 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:07:10.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:10.106 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:07:10.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:10.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:07:10.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:07:10.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:10.108 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:10.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:10.108 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:07:10.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:10.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:07:10.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:10.110 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:07:10.110 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:07:10.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:10.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:10.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:10.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:07:10.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:10.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:07:10.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:10.113 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:07:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:07:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:07:10.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:07:10.113 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:07:10.114 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:07:10.114 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:07:10.114 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:10.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:10.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:10.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:10.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:10.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:10.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:10.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:10.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:10.119 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:07:10.597 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:07:10.641 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:07:10.643 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:07:10.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:07:10.644 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:07:10.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:07:10.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:07:10.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:07:10.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:07:10.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:07:10.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:07:10.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:07:10.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:07:11.069 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:07:11.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:11.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:11.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:11.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:11.540 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:07:12.011 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:07:12.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:12.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:12.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:12.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:12.484 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:07:12.956 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:07:13.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:13.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:13.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:13.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:13.428 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:07:13.899 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:07:14.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:14.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:14.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:14.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:14.370 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:07:14.841 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:07:15.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:15.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:15.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:15.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:15.312 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:07:15.783 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:07:16.253 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:07:16.727 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:07:17.199 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:07:17.671 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:07:18.142 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:07:18.615 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:07:19.088 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:07:19.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:07:19.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:07:19.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:19.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:19.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:19.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:19.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:19.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:19.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:19.491 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:07:19.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:19.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:19.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:19.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2027 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:19.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2027 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:19.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2027 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:19.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2027 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:19.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2027 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:19.492 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2027 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:24.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:24.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:24.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:24.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:24.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:24.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:24.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:24.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:24.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:24.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:24.504 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:07:24.507 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:07:24.507 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:07:24.508 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:24.508 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:24.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:24.509 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:07:24.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:24.509 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:07:24.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:24.510 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:07:24.511 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:07:24.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:24.511 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:24.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:24.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:07:24.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:24.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:07:24.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:24.514 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:07:24.514 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:07:24.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:24.514 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:24.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:24.515 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:07:24.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:24.515 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:07:24.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:24.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:24.520 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:07:24.520 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:07:24.520 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:07:24.520 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:07:24.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:24.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:24.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:24.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:07:24.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:24.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:24.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:24.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:24.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:24.524 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:07:25.003 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:07:25.054 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:07:25.056 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:07:25.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:07:25.058 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:07:25.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:07:25.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:07:25.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:07:25.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:07:25.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:07:25.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:07:25.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:07:25.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:07:25.475 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:07:25.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:25.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:25.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:25.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:25.946 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:07:26.419 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:07:26.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:26.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:26.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:26.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:26.892 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:07:27.364 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:07:27.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:27.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:27.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:27.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:27.835 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:07:28.308 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:07:28.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:28.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:28.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:28.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:28.781 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:07:29.253 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:07:29.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:29.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:29.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:29.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:29.726 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:07:30.198 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:07:30.670 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:07:31.144 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:07:31.616 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:07:32.088 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:07:32.559 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:07:33.030 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:07:33.501 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:07:33.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:07:33.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:07:33.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:33.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:33.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:33.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:33.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:33.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:33.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:33.870 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:33.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:33.870 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:07:33.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:33.870 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2020 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:33.870 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2020 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:33.870 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2020 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:38.875 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:38.875 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:38.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:38.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:38.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:38.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:38.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:38.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:38.883 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:38.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:38.883 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:07:38.887 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:07:38.887 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:07:38.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:38.888 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:38.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:38.888 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:07:38.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:38.889 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:07:38.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:38.891 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:07:38.891 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:07:38.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:38.891 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:38.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:38.892 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:07:38.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:38.892 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:07:38.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:38.895 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:07:38.895 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:07:38.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:38.895 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:38.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:38.895 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:07:38.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:38.895 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:07:38.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:38.900 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:07:38.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:07:38.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:07:38.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:07:38.900 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:07:38.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:07:38.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:07:38.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:38.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:07:38.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:07:38.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:07:38.901 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:07:38.901 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:38.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:38.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:38.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:38.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:07:39.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:07:39.437 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:07:39.439 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:07:39.440 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:07:39.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:07:39.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:07:39.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:07:39.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:07:39.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:07:39.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:07:39.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:07:39.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:07:39.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:07:39.857 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:07:39.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:39.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:39.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:39.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:40.328 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:07:40.801 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:07:40.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:40.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:40.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:40.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:41.274 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:07:41.745 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:07:41.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:41.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:41.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:41.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:42.217 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:07:42.500 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:07:42.500 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-04-19 05:07:42.500 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:07:42.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:07:42.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:07:42.690 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:07:42.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:42.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:42.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:42.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:43.162 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:07:43.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:07:43.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:07:43.550 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:07:43.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:07:43.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:43.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:43.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:43.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:43.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:43.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:43.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:43.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:43.559 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:43.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:43.559 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:07:43.559 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1006 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:43.559 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1006 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:43.559 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1006 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:43.559 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1006 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:43.559 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1006 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:43.559 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1006 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:43.559 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1006 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:43.559 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1006 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:48.565 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:48.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:48.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:48.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:48.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:48.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:48.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:48.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:48.574 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:48.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:48.574 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:07:48.576 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:07:48.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:07:48.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:48.577 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:48.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:48.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:07:48.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:48.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:07:48.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:48.579 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:07:48.579 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:07:48.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:48.579 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:48.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:48.580 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:07:48.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:48.580 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:07:48.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:48.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:07:48.582 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:07:48.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:48.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:48.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:48.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:07:48.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:48.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:07:48.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:48.584 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:07:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:07:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:07:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:07:48.584 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:07:48.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:07:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:07:48.585 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:07:48.585 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:07:48.585 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:48.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:48.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:48.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:48.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:48.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:48.589 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:07:49.068 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:07:49.109 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:07:49.111 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:07:49.113 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:07:49.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:07:49.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:49.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:49.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:49.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:49.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:49.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:49.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:49.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:49.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:49.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:49.318 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:07:49.319 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=158 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:49.319 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=158 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:49.319 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=158 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:49.319 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=158 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:49.319 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=158 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:49.319 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=158 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:49.319 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=158 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:07:54.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:07:54.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:07:54.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:54.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:54.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:54.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:54.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:07:54.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:54.327 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:54.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:07:54.327 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:07:54.328 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:07:54.328 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:07:54.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:54.328 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:54.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:07:54.329 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:07:54.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:07:54.329 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:07:54.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:54.329 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:07:54.329 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:07:54.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:54.330 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:54.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:07:54.330 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:07:54.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:07:54.330 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:07:54.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:54.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:07:54.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:07:54.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:54.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:07:54.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:07:54.331 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:07:54.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:07:54.331 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:07:54.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:07:54.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:07:54.333 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:07:54.333 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:54.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:07:54.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:07:54.338 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:07:54.816 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:07:54.860 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:07:54.862 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:07:54.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:07:54.865 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:07:55.288 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:07:55.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:55.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:55.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:55.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:55.763 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:07:56.234 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:07:56.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:56.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:56.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:56.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:56.709 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:07:57.181 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:07:57.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:57.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:57.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:57.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:57.652 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:07:58.123 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:07:58.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:58.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:58.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:58.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:58.596 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:07:59.069 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:07:59.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:07:59.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:07:59.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:07:59.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:07:59.541 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:08:00.017 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:08:00.489 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:08:00.962 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:08:01.435 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:08:01.907 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:08:02.382 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:08:02.854 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:08:03.328 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:08:03.800 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:08:03.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:03.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:03.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:03.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:03.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:03.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:03.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:03.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:03.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:03.885 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:03.885 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:03.885 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:08:08.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:08.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:08.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:08.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:08.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:08.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:08.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:08.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:08.901 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:08.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:08.901 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:08:08.906 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:08:08.907 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:08:08.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:08.907 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:08.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:08.907 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:08:08.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:08.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:08:08.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:08.912 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:08:08.912 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:08:08.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:08.912 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:08.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:08.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:08:08.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:08.913 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:08:08.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:08.916 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:08:08.916 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:08:08.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:08.916 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:08.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:08.916 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:08:08.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:08.916 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:08:08.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:08:08.920 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:08:08.921 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:08:08.921 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:08:08.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:08.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:08.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:08.926 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:08:09.405 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:08:09.455 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:08:09.457 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:08:09.459 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:08:09.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:09.877 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:08:09.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:09.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:09.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:09.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:10.352 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:08:10.824 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:08:10.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:10.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:10.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:10.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:11.299 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:08:11.771 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:08:11.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:11.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:11.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:11.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:12.247 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:08:12.719 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:08:12.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:12.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:12.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:12.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:13.192 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:08:13.665 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:08:13.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:13.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:13.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:13.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:14.137 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:08:14.610 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:08:15.083 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:08:15.554 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:08:16.028 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:08:16.501 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:08:16.972 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:08:17.446 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:08:17.919 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:08:18.387 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:08:18.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:18.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:18.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:18.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:18.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:18.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:18.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:18.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:18.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:18.480 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:18.480 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:08:18.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:18.480 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2062 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:18.480 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2062 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:23.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:23.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:23.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:23.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:23.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:23.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:23.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:23.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:23.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:23.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:23.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:08:23.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:08:23.499 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:08:23.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:23.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:23.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:23.500 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:08:23.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:23.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:08:23.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:23.502 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:08:23.502 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:08:23.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:23.502 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:23.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:23.502 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:08:23.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:23.502 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:08:23.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:23.504 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:08:23.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:08:23.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:23.504 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:23.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:23.504 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:08:23.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:23.504 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:08:23.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:23.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:08:23.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:08:23.507 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:08:23.507 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:23.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:23.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:08:23.991 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:08:24.035 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:08:24.038 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:08:24.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:24.042 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:08:24.463 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:08:24.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:24.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:24.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:24.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:24.936 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:08:25.409 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:08:25.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:25.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:25.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:25.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:25.881 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:08:26.356 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:08:26.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:26.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:26.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:26.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:26.828 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:08:27.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:27.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:27.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:27.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:27.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:27.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:27.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:27.095 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:27.096 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:08:27.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:27.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:27.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:27.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:27.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:27.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:27.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:27.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:27.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:27.096 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:32.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:32.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:32.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:32.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:32.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:32.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:32.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:32.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:32.104 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:32.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:32.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:08:32.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:08:32.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:08:32.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:32.105 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:32.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:32.105 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:08:32.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:32.105 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:08:32.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:32.106 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:08:32.106 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:08:32.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:32.106 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:32.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:32.106 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:08:32.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:32.106 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:08:32.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:32.107 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:08:32.107 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:08:32.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:32.108 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:32.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:32.108 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:08:32.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:32.108 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:08:32.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:32.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:08:32.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:08:32.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:08:32.110 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:08:32.110 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:08:32.110 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:32.115 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:08:32.593 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:08:32.638 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:08:32.640 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:08:32.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:32.643 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:08:32.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:08:32.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:08:32.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:08:32.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:08:32.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:08:32.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:08:32.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:08:32.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:08:32.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:32.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:08:32.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:08:32.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:08:32.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:08:33.065 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:08:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:33.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:08:33.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:08:33.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:08:33.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:33.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:33.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:33.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:33.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:33.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:33.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:33.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:33.091 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:08:33.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:33.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:33.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:33.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:33.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:33.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:33.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:33.091 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:38.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:38.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:38.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:38.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:38.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:38.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:38.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:38.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:38.097 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:38.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:38.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:08:38.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:08:38.098 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:08:38.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:38.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:38.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:38.099 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:08:38.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:38.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:08:38.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:38.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:08:38.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:08:38.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:38.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:38.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:38.099 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:08:38.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:38.099 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:08:38.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:38.101 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:08:38.101 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:08:38.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:38.101 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:38.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:38.101 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:08:38.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:38.101 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:08:38.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:08:38.103 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:08:38.103 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:08:38.103 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:38.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:38.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:38.108 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:08:38.584 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:08:38.632 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:08:38.634 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:08:38.637 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:08:38.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:38.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:38.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:38.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:38.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:38.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:38.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:38.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:38.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:38.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:38.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:38.655 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:08:38.655 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:38.655 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:38.655 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:38.655 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:38.655 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:38.655 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:43.657 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:43.657 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:43.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:43.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:43.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:43.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:43.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:43.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:43.666 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:43.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:43.666 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:08:43.669 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:08:43.669 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:08:43.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:43.670 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:43.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:43.670 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:08:43.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:43.670 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:08:43.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:43.673 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:08:43.673 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:08:43.673 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:43.673 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:43.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:43.674 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:08:43.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:43.674 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:08:43.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:43.677 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:08:43.677 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:08:43.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:43.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:43.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:43.678 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:08:43.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:43.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:08:43.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:43.683 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:08:43.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:08:43.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:08:43.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:08:43.683 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:08:43.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:43.684 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:08:43.684 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:08:43.684 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:08:43.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:08:43.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:43.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:43.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:43.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:08:43.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:43.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:43.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:43.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:43.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:43.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:43.689 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:08:44.168 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:08:44.224 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:08:44.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:44.227 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:08:44.230 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:08:44.640 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:08:44.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:44.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:44.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:44.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:45.115 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:08:45.587 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:08:45.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:45.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:45.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:45.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:46.060 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:08:46.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:46.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:46.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:46.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:46.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:46.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:46.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:46.250 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:08:46.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:46.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:46.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:46.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=553 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:46.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=553 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:46.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=553 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:46.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=553 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:46.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=553 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:46.251 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=553 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:08:51.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:51.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:51.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:51.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:51.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:51.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:51.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:51.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:51.256 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:51.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:51.257 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:08:51.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:08:51.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:08:51.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:51.258 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:51.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:51.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:08:51.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:51.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:08:51.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:51.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:08:51.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:08:51.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:51.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:51.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:51.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:08:51.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:51.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:08:51.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:51.260 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:08:51.260 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:08:51.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:51.260 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:51.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:51.260 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:08:51.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:51.260 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:08:51.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:51.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:08:51.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:08:51.262 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:08:51.263 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:51.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:08:51.745 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:08:51.794 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:08:51.796 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:08:51.798 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:08:51.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:08:51.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:08:51.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:08:51.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:08:51.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:08:51.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:08:51.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:08:51.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:08:51.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:08:52.217 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:08:52.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:52.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:52.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:52.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:52.688 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:08:53.162 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:08:53.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:53.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:53.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:53.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:53.634 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:08:54.106 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:08:54.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:54.268 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:54.268 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:54.268 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:54.579 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:08:54.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:08:54.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:08:54.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:54.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:54.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:54.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:54.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:54.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:54.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:54.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:54.601 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:08:54.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:54.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:59.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:08:59.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:08:59.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:59.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:59.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:59.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:59.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:08:59.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:59.609 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:59.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:08:59.609 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:08:59.610 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:08:59.610 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:08:59.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:59.610 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:59.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:08:59.611 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:08:59.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:08:59.611 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:08:59.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:08:59.611 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:08:59.611 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:08:59.611 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:59.611 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:59.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:08:59.611 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:08:59.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:08:59.612 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:08:59.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:08:59.613 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:08:59.613 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:08:59.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:59.613 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:08:59.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:08:59.613 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:08:59.613 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:08:59.613 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:08:59.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:08:59.615 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:08:59.615 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:08:59.615 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:59.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:59.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:08:59.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:08:59.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:08:59.620 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:09:00.097 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:09:00.145 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:09:00.147 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:09:00.148 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:09:00.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:00.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:00.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:00.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:09:00.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:09:00.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:09:00.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:09:00.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:09:00.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:09:00.568 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:09:00.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:00.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:00.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:00.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:01.040 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:09:01.511 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:09:01.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:01.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:01.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:01.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:01.984 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:09:02.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:02.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:02.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:02.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:02.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:02.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:02.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:02.238 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:02.238 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:02.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:02.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:02.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:02.238 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:09:07.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:07.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:07.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:07.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:07.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:07.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:07.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:07.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:07.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:07.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:07.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:09:07.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:09:07.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:09:07.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:07.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:07.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:07.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:09:07.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:07.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:09:07.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:07.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:09:07.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:09:07.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:07.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:07.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:07.261 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:09:07.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:07.261 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:09:07.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:07.263 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:09:07.263 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:09:07.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:07.263 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:07.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:07.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:09:07.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:07.263 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:09:07.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:07.266 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:09:07.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:09:07.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:09:07.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:09:07.266 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:09:07.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:09:07.267 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:09:07.267 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:09:07.267 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:07.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:07.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:07.272 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:09:07.751 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:09:07.797 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:09:07.799 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:09:07.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:07.801 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:09:07.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:07.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:07.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:09:07.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:09:07.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:09:07.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:09:07.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:09:07.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:09:08.223 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:09:08.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:08.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:08.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:08.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:08.694 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:09:09.167 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:09:09.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:09.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:09.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:09.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:09.640 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:09:10.112 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:09:10.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:10.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:10.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:10.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:10.583 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:09:10.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:10.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:10.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:10.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:10.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:10.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:10.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:10.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:10.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:10.611 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:09:10.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:10.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:10.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:10.611 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:10.611 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:10.611 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:10.611 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:10.611 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:10.611 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:10.611 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:15.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:15.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:15.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:15.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:15.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:15.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:15.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:15.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:15.626 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:15.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:15.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:09:15.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:09:15.631 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:09:15.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:15.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:15.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:15.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:09:15.633 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:15.633 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:09:15.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:15.635 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:09:15.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:09:15.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:15.636 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:15.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:15.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:09:15.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:15.638 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:09:15.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:15.640 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:09:15.640 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:09:15.640 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:15.640 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:15.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:15.640 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:09:15.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:15.641 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:09:15.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:09:15.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:15.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:15.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:15.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:15.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:15.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:15.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:15.646 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:09:15.646 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:09:15.646 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:09:15.646 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:09:15.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:15.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:15.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:15.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:15.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:15.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:15.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:15.651 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:09:16.126 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:09:16.184 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:09:16.186 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:09:16.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:16.189 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:09:16.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:16.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:16.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:09:16.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:09:16.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:09:16.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:09:16.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:09:16.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:09:16.599 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:09:16.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:16.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:16.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:16.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:17.072 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:09:17.544 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:09:17.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:17.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:17.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:17.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:18.016 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:09:18.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:18.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:18.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:18.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:18.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:18.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:18.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:18.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:18.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:18.280 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:09:18.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:18.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:18.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:18.280 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:18.280 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:18.280 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:18.281 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:18.281 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:18.281 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:18.281 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:23.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:23.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:23.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:23.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:23.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:23.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:23.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:23.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:23.291 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:23.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:23.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:09:23.295 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:09:23.295 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:09:23.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:23.295 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:23.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:23.296 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:09:23.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:23.296 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:09:23.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:23.299 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:09:23.299 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:09:23.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:23.299 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:23.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:23.299 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:09:23.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:23.299 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:09:23.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:23.301 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:09:23.301 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:09:23.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:23.301 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:23.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:23.301 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:09:23.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:23.302 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:09:23.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:23.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:09:23.305 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:09:23.305 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:09:23.305 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:23.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:23.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:23.309 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:09:23.787 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:09:23.835 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:09:23.837 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:09:23.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:23.840 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:09:23.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:23.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:23.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:09:23.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:09:23.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:09:23.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:09:23.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:09:23.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:09:24.257 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:09:24.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:24.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:24.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:24.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:24.729 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:09:25.202 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:09:25.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:25.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:25.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:25.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:25.675 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:09:26.147 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:09:26.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:26.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:26.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:26.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:26.619 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:09:27.090 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:09:27.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:27.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:27.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:27.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:27.564 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:09:27.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:27.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:27.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:27.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:27.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:27.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:27.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:27.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:27.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:27.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:27.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:27.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:27.590 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:09:27.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:27.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:27.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:27.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:27.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:27.590 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:32.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:32.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:32.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:32.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:32.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:32.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:32.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:32.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:32.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:32.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:32.598 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:09:32.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:09:32.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:09:32.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:32.599 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:32.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:32.599 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:09:32.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:32.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:09:32.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:32.600 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:09:32.600 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:09:32.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:32.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:32.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:32.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:09:32.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:32.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:09:32.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:32.602 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:09:32.602 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:09:32.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:32.602 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:32.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:32.602 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:09:32.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:32.602 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:09:32.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:09:32.604 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:09:32.604 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:09:32.604 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:32.609 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:09:33.087 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:09:33.135 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:09:33.137 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:09:33.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:33.139 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:09:33.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:33.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:33.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:09:33.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:09:33.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:09:33.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:09:33.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:09:33.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:09:33.559 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:09:33.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:33.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:33.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:33.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:34.031 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:09:34.504 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:09:34.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:34.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:34.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:34.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:34.976 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:09:35.448 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:09:35.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:35.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:35.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:35.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:35.919 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:09:36.390 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:09:36.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:36.863 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:09:37.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:37.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:37.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:37.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:37.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:37.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:37.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:37.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:37.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:37.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:37.124 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:09:37.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:37.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:37.124 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=977 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:37.124 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=977 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:37.124 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=977 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:37.124 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=977 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:37.124 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=977 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:37.125 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=977 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:09:42.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:42.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:42.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:42.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:42.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:42.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:42.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:42.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:42.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:42.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:42.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:09:42.143 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:09:42.144 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:09:42.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:42.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:42.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:42.145 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:09:42.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:42.146 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:09:42.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:42.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:09:42.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:09:42.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:42.149 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:42.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:42.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:09:42.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:42.150 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:09:42.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:42.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:09:42.153 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:09:42.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:42.153 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:42.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:42.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:09:42.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:42.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:09:42.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:42.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:09:42.159 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:09:42.159 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:09:42.159 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:42.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:42.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:42.163 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:09:42.642 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:09:42.691 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:09:42.694 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:09:42.695 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:09:42.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:43.114 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:09:43.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:43.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:43.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:43.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:43.589 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:09:44.061 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:09:44.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:44.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:44.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:44.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:44.532 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:09:44.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:44.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:44.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:44.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:44.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:44.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:44.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:44.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:44.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:44.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:44.715 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:09:49.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:49.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:49.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:49.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:49.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:49.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:49.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:49.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:49.723 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:49.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:49.724 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:09:49.726 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:09:49.726 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:09:49.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:49.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:49.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:49.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:09:49.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:49.728 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:09:49.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:49.729 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:09:49.729 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:09:49.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:49.729 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:49.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:49.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:09:49.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:49.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:09:49.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:49.731 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:09:49.731 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:09:49.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:49.731 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:49.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:49.732 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:09:49.732 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:49.732 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:09:49.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:49.734 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:09:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:09:49.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:49.735 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:09:49.735 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:09:49.735 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:09:49.735 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:49.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:49.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:49.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:49.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:49.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:49.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:49.740 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:09:50.218 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:09:50.269 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:09:50.271 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:09:50.273 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:09:50.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:50.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:50.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:50.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:09:50.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:50.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:50.690 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:09:50.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:50.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:50.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:50.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:51.161 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:09:51.634 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:09:51.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:51.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:51.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:51.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:52.116 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:09:52.588 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:09:52.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:52.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:52.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:52.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:53.062 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:09:53.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:53.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:53.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:53.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:53.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:53.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:53.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:53.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:53.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:53.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:53.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:53.334 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:09:58.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:58.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:58.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:58.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:58.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:58.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:58.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:58.351 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:58.351 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:58.351 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:09:58.352 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:09:58.355 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:09:58.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:09:58.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:58.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:58.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:58.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:09:58.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:09:58.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:09:58.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:58.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:09:58.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:09:58.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:58.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:58.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:58.363 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:09:58.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:09:58.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:09:58.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:58.365 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:09:58.365 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:09:58.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:58.366 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:09:58.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:58.366 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:09:58.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:09:58.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:09:58.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:58.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:09:58.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:09:58.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:09:58.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:09:58.371 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:58.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:09:58.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:09:58.372 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:09:58.372 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:58.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:09:58.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:58.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:58.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:58.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:09:58.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:58.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:58.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:09:58.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:58.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:58.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:58.377 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:09:58.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:09:58.903 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:09:58.905 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:09:58.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:58.906 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:09:58.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:09:58.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:09:58.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:09:58.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:09:58.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:58.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:09:58.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:09:58.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:09:58.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:09:58.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:09:58.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:09:58.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:09:58.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:09:58.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:09:58.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:09:58.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:09:58.945 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:10:03.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:03.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:03.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:03.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:03.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:03.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:03.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:03.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:03.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:03.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:03.960 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:10:03.962 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:10:03.962 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:10:03.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:03.963 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:03.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:03.963 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:10:03.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:03.964 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:10:03.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:03.965 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:10:03.965 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:10:03.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:03.965 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:03.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:03.965 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:10:03.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:03.965 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:10:03.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:03.967 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:10:03.967 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:10:03.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:03.967 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:03.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:03.967 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:10:03.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:03.967 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:10:03.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:03.969 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:10:03.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:10:03.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:10:03.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:10:03.969 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:10:03.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:10:03.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:10:03.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:03.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:10:03.970 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:10:03.970 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:10:03.970 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:03.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:03.974 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:10:04.451 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:10:04.496 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:10:04.498 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:10:04.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:04.500 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:10:04.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:10:04.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:10:04.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:10:04.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:04.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:04.922 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:10:04.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:04.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:04.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:04.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:05.393 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:10:05.866 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:10:05.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:05.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:05.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:05.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:06.340 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:10:06.811 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:10:06.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:06.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:06.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:06.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:07.287 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:10:07.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:07.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:07.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:07.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:07.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:07.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:07.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:07.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:07.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:07.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:07.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:07.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:07.546 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=771 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=771 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=771 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=771 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=772 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=772 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=772 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:07.546 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:12.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:12.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:12.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:12.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:12.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:12.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:12.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:12.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:12.560 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:12.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:12.561 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:10:12.566 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:10:12.566 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:10:12.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:12.566 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:12.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:12.567 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:10:12.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:12.567 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:10:12.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:12.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:10:12.572 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:10:12.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:12.572 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:12.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:12.572 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:10:12.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:12.572 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:10:12.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:12.576 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:10:12.576 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:10:12.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:12.576 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:12.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:12.576 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:10:12.576 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:12.576 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:10:12.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:12.580 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:10:12.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:10:12.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:10:12.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:10:12.581 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:10:12.581 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:10:12.581 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:10:12.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:12.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:12.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:12.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:12.586 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:10:13.064 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:10:13.118 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:10:13.120 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:10:13.122 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:10:13.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:13.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:10:13.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:10:13.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:10:13.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:13.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:13.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:13.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:13.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:13.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:13.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:13.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:13.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:13.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:13.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:13.195 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:10:13.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:13.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:13.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:13.196 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:13.196 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:13.196 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:13.196 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:13.196 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:13.196 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:18.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:18.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:18.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:18.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:18.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:18.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:18.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:18.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:18.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:18.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:18.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:10:18.207 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:10:18.207 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:10:18.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:18.208 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:18.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:18.208 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:10:18.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:18.208 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:10:18.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:18.211 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:10:18.211 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:10:18.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:18.211 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:18.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:18.212 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:10:18.212 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:18.212 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:10:18.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:18.215 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:10:18.215 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:10:18.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:18.215 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:18.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:18.215 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:10:18.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:18.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:10:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:10:18.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:10:18.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:10:18.222 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:10:18.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:18.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:18.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:18.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:18.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:18.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:18.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:18.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:18.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:18.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:10:18.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:10:18.756 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:10:18.758 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:10:18.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:18.761 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:10:18.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:18.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:18.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:18.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:18.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:18.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:18.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:18.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:18.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:18.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:18.774 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:10:23.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:23.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:23.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:23.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:23.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:23.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:23.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:23.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:23.788 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:23.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:23.788 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:10:23.793 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:10:23.793 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:10:23.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:23.794 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:23.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:23.794 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:10:23.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:23.794 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:10:23.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:23.799 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:10:23.799 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:10:23.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:23.799 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:23.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:23.800 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:10:23.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:23.800 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:10:23.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:23.804 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:10:23.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:10:23.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:23.804 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:23.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:23.805 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:10:23.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:23.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:10:23.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:23.811 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:10:23.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:10:23.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:10:23.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:10:23.811 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:10:23.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:10:23.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:10:23.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:10:23.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:10:23.812 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:10:23.812 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:10:23.812 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:10:23.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:23.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:23.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:23.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:10:23.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:23.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:23.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:23.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:23.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:23.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:23.817 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:10:24.296 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:10:24.346 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:10:24.348 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:10:24.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:24.350 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:10:24.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:24.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:24.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:24.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:24.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:24.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:24.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:24.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:24.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:24.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:24.364 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:10:24.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:24.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:24.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:24.364 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:29.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:29.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:29.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:29.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:29.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:29.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:29.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:29.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:29.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:29.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:29.376 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:10:29.377 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:10:29.378 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:10:29.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:29.378 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:29.378 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:29.378 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:10:29.378 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:29.378 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:10:29.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:29.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:10:29.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:10:29.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:29.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:29.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:29.379 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:10:29.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:29.379 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:10:29.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:29.380 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:10:29.380 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:10:29.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:29.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:29.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:29.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:10:29.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:29.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:10:29.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:29.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:10:29.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:10:29.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:10:29.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:10:29.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:10:29.383 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:10:29.383 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:10:29.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:29.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:29.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:29.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:29.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:29.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:29.387 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:10:29.865 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:10:29.912 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:10:29.914 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:10:29.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:29.917 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:10:29.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:29.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:29.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:29.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:29.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:29.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:29.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:29.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:29.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:29.934 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:29.934 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:10:34.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:34.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:34.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:34.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:34.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:34.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:34.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:34.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:34.949 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:34.949 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:34.949 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:10:34.955 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:10:34.955 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:10:34.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:34.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:34.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:34.956 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:10:34.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:34.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:10:34.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:34.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:10:34.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:10:34.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:34.961 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:34.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:34.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:10:34.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:34.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:10:34.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:34.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:10:34.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:10:34.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:34.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:34.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:34.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:10:34.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:34.966 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:10:34.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:34.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:10:34.971 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:10:34.971 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:10:34.971 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:34.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:34.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:34.976 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:10:35.452 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:10:35.502 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:10:35.503 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:10:35.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:35.505 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:10:35.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:35.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:35.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:35.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:35.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:35.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:35.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:35.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:35.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:35.517 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:10:35.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:40.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:40.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:40.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:40.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:40.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:40.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:40.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:40.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:40.533 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:40.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:40.533 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:10:40.537 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:10:40.537 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:10:40.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:40.537 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:40.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:40.537 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:10:40.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:40.537 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:10:40.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:40.540 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:10:40.540 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:10:40.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:40.541 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:40.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:40.541 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:10:40.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:40.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:10:40.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:40.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:10:40.544 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:10:40.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:40.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:40.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:40.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:10:40.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:40.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:10:40.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:40.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:10:40.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:10:40.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:10:40.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:10:40.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:10:40.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:40.551 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:10:40.551 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:10:40.551 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:10:40.551 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:10:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:10:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:40.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:40.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:40.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:40.556 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:10:41.034 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:10:41.086 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:10:41.088 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:10:41.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:41.090 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:10:41.506 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:10:41.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:41.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:41.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:41.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:41.979 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:10:42.452 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:10:42.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:42.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:42.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:42.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:42.924 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:10:43.397 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:10:43.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:43.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:43.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:43.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:43.870 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:10:44.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:10:44.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:10:44.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:10:44.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:10:44.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:10:44.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:10:44.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:10:44.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:10:44.342 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:10:44.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:44.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:44.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:44.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:44.816 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:10:45.288 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:10:45.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:45.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:45.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:45.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:45.760 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:10:46.232 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:10:46.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:10:46.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:10:46.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:46.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:46.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:46.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:46.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:46.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:46.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:46.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:46.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:46.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:46.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:46.365 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:10:46.366 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:46.366 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1255 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:46.366 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:46.366 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:46.366 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:46.366 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:46.366 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:46.366 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:46.366 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:51.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:51.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:51.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:51.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:51.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:51.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:51.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:51.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:51.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:51.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:51.377 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:10:51.379 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:10:51.379 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:10:51.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:51.379 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:51.380 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:10:51.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:51.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:51.380 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:10:51.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:51.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:10:51.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:10:51.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:51.383 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:51.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:51.383 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:10:51.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:51.383 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:10:51.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:51.385 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:10:51.385 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:10:51.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:51.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:51.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:51.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:10:51.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:51.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:10:51.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:10:51.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:10:51.388 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:10:51.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:51.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:51.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:51.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:10:51.871 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:10:51.921 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:10:51.923 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:10:51.924 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:10:51.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:51.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:10:51.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:10:51.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:10:51.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:51.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:51.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:51.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:51.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:51.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:51.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:51.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:51.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:51.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:51.967 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:10:51.967 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:51.967 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:51.967 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:51.967 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:51.967 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:51.967 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:51.967 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:51.967 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:56.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:56.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:56.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:56.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:56.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:56.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:56.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:56.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:56.968 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:56.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:10:56.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:10:56.969 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:10:56.969 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:10:56.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:56.969 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:56.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:56.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:10:56.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:10:56.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:10:56.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:56.970 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:10:56.970 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:10:56.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:56.970 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:56.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:56.970 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:10:56.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:10:56.970 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:10:56.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:56.971 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:10:56.972 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:10:56.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:56.972 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:10:56.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:56.972 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:10:56.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:10:56.972 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:10:56.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:56.973 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:10:56.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:10:56.974 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:10:56.974 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:10:56.974 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:56.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:56.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:56.979 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:10:57.457 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:10:57.505 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:10:57.507 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:10:57.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:57.510 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:10:57.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:10:57.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:10:57.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:10:57.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:10:57.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:10:57.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:10:57.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:10:57.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:10:57.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:10:57.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:10:57.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:10:57.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:10:57.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:10:57.575 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:10:57.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:10:57.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:10:57.575 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:57.575 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:57.575 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:57.575 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:57.575 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:10:57.575 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:02.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:02.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:02.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:02.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:02.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:02.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:02.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:02.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:02.583 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:02.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:02.583 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:11:02.584 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:11:02.584 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:11:02.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:02.584 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:02.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:02.584 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:11:02.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:02.585 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:11:02.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:02.585 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:11:02.585 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:11:02.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:02.585 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:02.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:02.586 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:11:02.586 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:02.586 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:11:02.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:02.587 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:11:02.587 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:11:02.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:02.587 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:02.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:02.587 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:11:02.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:02.587 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:11:02.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:11:02.589 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:11:02.589 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:11:02.589 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:02.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:02.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:02.594 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:11:03.072 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:11:03.118 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:11:03.121 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:11:03.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:03.123 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:11:03.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:03.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:03.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:03.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:03.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:03.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:03.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:03.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:03.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:03.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:03.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:03.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:03.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:03.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:03.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:03.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:03.179 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:11:03.179 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:03.179 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:03.179 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:03.179 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:03.179 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:03.179 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:08.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:08.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:08.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:08.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:08.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:08.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:08.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:08.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:08.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:08.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:08.185 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:11:08.186 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:11:08.186 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:11:08.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:08.186 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:08.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:08.186 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:11:08.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:08.186 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:11:08.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:08.187 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:11:08.187 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:11:08.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:08.187 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:08.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:08.187 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:11:08.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:08.187 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:11:08.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:08.188 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:11:08.189 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:11:08.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:08.189 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:08.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:08.189 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:11:08.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:08.189 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:11:08.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:11:08.191 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:11:08.191 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:11:08.191 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:08.191 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:08.196 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:11:08.671 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:11:08.716 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:11:08.718 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:11:08.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:08.719 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:11:08.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:08.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:08.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:08.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:08.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:08.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:08.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:08.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:08.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:08.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:08.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:08.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:08.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:08.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:08.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:08.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:08.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:08.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:08.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:08.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:08.796 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:11:08.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:08.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:08.796 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:08.796 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:08.796 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:08.796 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:08.796 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:08.796 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:13.799 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:13.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:13.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:13.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:13.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:13.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:13.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:13.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:13.810 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:13.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:13.811 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:11:13.815 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:11:13.816 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:11:13.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:13.816 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:13.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:13.816 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:11:13.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:13.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:11:13.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:13.820 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:11:13.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:11:13.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:13.821 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:13.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:13.821 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:11:13.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:13.821 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:11:13.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:13.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:11:13.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:11:13.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:13.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:13.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:13.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:11:13.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:13.826 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:11:13.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:13.831 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:11:13.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:11:13.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:11:13.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:11:13.831 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:11:13.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:11:13.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:11:13.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:11:13.832 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:11:13.832 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:11:13.832 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:13.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:13.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:11:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:13.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:13.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:13.837 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:11:14.314 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:11:14.373 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:11:14.375 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:11:14.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:14.378 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:11:14.380 [DEBUG] fake_trx.py:382 (BTS@172.18.173.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 05:11:14.380 [INFO] fake_trx.py:385 (BTS@172.18.173.20:5700) Artificial TRXC delay set to 200
2026-04-19 05:11:14.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 05:11:14.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:14.789 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:11:14.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:15.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:15.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:15.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:15.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:15.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:15.263 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:11:15.735 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:11:15.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:16.021 [DEBUG] fake_trx.py:382 (BTS@172.18.173.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 05:11:16.021 [INFO] fake_trx.py:385 (BTS@172.18.173.20:5700) Artificial TRXC delay set to 0
2026-04-19 05:11:16.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 05:11:16.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:16.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:16.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:16.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:16.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:16.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:16.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:16.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:16.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:16.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:16.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:16.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:16.034 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:16.034 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:16.034 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:11:21.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:21.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:21.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:21.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:21.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:21.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:21.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:21.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:21.049 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:21.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:21.049 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:11:21.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:11:21.054 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:11:21.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:21.054 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:21.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:21.055 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:11:21.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:21.056 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:11:21.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:21.057 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:11:21.057 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:11:21.058 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:21.058 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:21.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:21.058 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:11:21.058 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:21.058 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:11:21.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:21.060 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:11:21.060 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:11:21.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:21.060 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:21.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:21.060 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:11:21.060 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:21.060 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:11:21.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:21.063 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:11:21.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:11:21.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:11:21.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:11:21.063 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:11:21.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:11:21.064 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:11:21.064 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:11:21.064 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:21.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:21.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:21.069 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:11:21.547 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:11:21.595 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:11:21.598 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:11:21.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:21.601 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:11:21.602 [DEBUG] fake_trx.py:382 (BTS@172.18.173.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 05:11:21.602 [INFO] fake_trx.py:385 (BTS@172.18.173.20:5700) Artificial TRXC delay set to 200
2026-04-19 05:11:21.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 05:11:21.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:22.019 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:11:22.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:22.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:22.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:22.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:22.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:22.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:22.492 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:11:22.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:22.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:22.965 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:11:23.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.229 [DEBUG] fake_trx.py:382 (BTS@172.18.173.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-04-19 05:11:23.229 [INFO] fake_trx.py:385 (BTS@172.18.173.20:5700) Artificial TRXC delay set to 0
2026-04-19 05:11:23.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-04-19 05:11:23.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:23.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:23.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:23.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:23.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:23.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:23.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:23.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:23.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:23.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:23.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:23.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:23.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:23.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:23.239 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:11:28.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:28.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:28.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:28.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:28.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:28.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:28.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:28.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:28.249 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:28.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:28.249 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:11:28.251 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:11:28.251 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:11:28.251 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:28.251 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:28.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:28.251 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:11:28.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:28.252 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:11:28.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:28.252 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:11:28.252 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:11:28.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:28.252 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:28.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:28.252 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:11:28.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:28.252 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:11:28.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:28.254 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:11:28.254 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:11:28.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:28.254 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:28.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:28.254 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:11:28.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:28.254 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:11:28.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:11:28.256 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:11:28.256 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:11:28.256 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:28.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:28.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:28.261 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:11:28.740 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:11:28.786 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:11:28.788 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:11:28.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:28.790 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:11:28.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:28.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:28.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:28.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:28.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:28.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:28.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:28.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:28.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:28.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:28.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:28.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:28.853 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:11:28.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:28.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:28.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:28.853 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:28.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:28.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:28.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:28.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:28.854 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:11:33.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:33.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:33.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:33.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:33.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:33.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:33.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:33.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:33.868 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:33.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:33.868 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:11:33.874 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:11:33.874 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:11:33.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:33.875 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:33.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:33.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:11:33.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:33.875 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:11:33.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:33.879 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:11:33.880 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:11:33.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:33.880 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:33.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:33.880 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:11:33.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:33.880 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:11:33.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:33.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:11:33.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:11:33.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:33.884 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:33.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:33.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:11:33.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:33.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:11:33.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:33.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:33.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:33.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:33.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:33.892 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:11:33.892 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:11:33.892 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:11:33.892 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:11:33.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:33.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:33.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:33.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:33.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:33.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:33.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:33.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:33.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:33.897 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:11:34.374 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:11:34.431 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:11:34.434 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:11:34.435 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:11:34.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:34.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:34.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:34.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:34.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:34.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:34.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:34.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:34.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:34.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:34.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:34.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:34.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:34.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:34.476 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:11:34.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:34.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:39.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:11:39.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:11:39.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:39.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:39.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:39.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:39.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:11:39.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:39.489 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:39.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:11:39.489 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:11:39.491 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:11:39.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:11:39.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:39.492 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:39.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:11:39.492 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:11:39.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:11:39.492 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:11:39.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:39.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:11:39.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:11:39.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:39.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:39.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:11:39.495 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:11:39.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:11:39.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:11:39.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:39.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:11:39.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:11:39.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:39.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:11:39.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:11:39.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:11:39.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:11:39.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:11:39.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:39.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:11:39.506 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:11:39.506 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:11:39.506 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:39.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:11:39.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:11:39.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:11:39.988 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:11:40.039 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:11:40.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:40.042 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:11:40.045 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:11:40.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:40.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:40.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:40.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:40.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:40.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:40.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:40.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:40.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:40.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:40.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:40.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:40.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:40.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:40.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:40.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:40.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:40.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:40.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:40.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:40.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:40.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:40.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:40.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:40.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:40.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:40.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:40.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:40.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:40.461 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:11:40.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:40.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:40.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:40.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:40.932 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:11:41.405 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:11:41.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:41.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:41.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:41.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:41.878 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:11:42.350 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:11:42.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:42.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:42.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:42.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:42.824 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:11:43.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:43.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:43.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:43.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:43.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:43.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:43.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:43.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:43.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:43.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:43.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:43.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:43.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:43.296 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:11:43.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:43.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:43.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:43.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:43.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:43.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:43.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:43.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:43.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:43.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:43.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:43.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:43.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:43.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:43.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:43.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:43.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:43.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:43.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:43.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:43.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:43.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:43.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:43.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:43.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:43.769 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:11:44.239 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:11:44.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:11:44.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:11:44.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:11:44.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:11:44.713 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:11:45.185 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:11:45.658 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:11:46.131 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:11:46.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:46.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:46.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:46.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:46.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:46.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:46.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:46.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:46.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:46.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:46.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:46.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:46.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:46.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:46.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:46.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:46.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:46.603 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:11:47.076 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:11:47.547 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:11:48.031 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:11:48.503 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:11:48.977 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:11:49.449 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:11:49.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:49.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:49.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:49.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:49.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:49.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:49.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:49.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:49.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:49.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:49.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:49.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:49.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:49.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:49.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:49.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:49.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:49.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:49.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:49.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:49.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:49.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:49.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:49.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:49.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:49.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:49.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:49.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:49.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:49.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:49.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:49.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:49.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:49.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:49.921 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:11:50.392 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:11:50.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:50.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:50.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:50.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:50.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:50.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:50.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:50.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:50.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:50.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:50.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:50.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:50.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:50.625 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:11:50.625 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:11:50.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:50.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:50.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:50.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:50.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:50.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:50.700 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:11:50.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:50.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:50.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:50.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:50.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:50.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:50.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:50.723 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:50.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:50.774 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:11:50.774 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:11:50.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:50.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:50.863 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:11:51.337 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:11:51.810 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:11:52.283 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:11:52.756 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:11:53.229 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:11:53.702 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:11:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:53.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:53.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:53.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:53.782 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:11:53.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:53.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:53.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:53.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:53.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:53.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:53.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:53.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:53.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:53.845 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:11:53.845 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:11:53.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:53.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:53.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:53.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:53.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:53.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:53.905 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:11:53.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:53.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:53.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:53.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:53.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:53.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:53.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:53.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:53.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:53.932 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:11:53.932 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:11:53.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:53.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:54.171 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:11:54.644 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:11:55.117 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:11:55.590 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:11:56.062 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:11:56.535 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:11:56.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:56.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:56.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:56.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:56.939 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:11:56.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:11:56.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:11:56.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:11:56.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:56.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:11:56.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:11:56.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:11:56.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:11:57.007 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:11:57.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:11:57.014 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:11:57.015 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:11:57.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:57.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:11:57.480 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:11:57.952 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:11:58.425 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:11:58.898 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:11:59.371 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:11:59.844 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:12:00.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:00.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:00.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:00.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:00.023 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:00.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:00.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:00.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:00.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:00.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:00.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:00.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:00.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:00.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:00.083 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:00.083 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:12:00.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:00.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:00.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:00.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:00.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:00.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:00.169 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:00.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:00.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:00.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:00.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:00.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:00.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:00.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:00.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:00.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:00.224 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:00.224 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:12:00.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:00.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:00.316 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:12:00.789 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:12:01.263 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:12:01.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:01.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:01.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:01.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:01.446 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:01.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:01.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:01.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:01.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:01.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:01.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:01.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:01.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:01.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:01.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:01.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:01.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:01.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:01.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:01.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:01.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:01.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:01.735 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:12:01.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:01.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:01.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:01.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:01.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:01.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:01.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:01.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:01.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:01.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:01.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:01.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:01.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:02.206 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:12:02.677 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:12:03.150 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:12:03.622 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:12:04.094 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:12:04.565 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:12:04.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:04.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:04.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:04.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:04.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:04.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:04.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:04.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:04.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:04.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:04.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:04.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:04.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:04.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:04.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:04.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:04.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:05.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:05.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:05.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:05.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:05.038 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:12:05.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:05.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:05.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:05.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:05.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:05.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:05.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:05.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:05.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:05.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:05.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:05.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:05.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:05.511 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:12:05.983 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:12:06.454 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:12:06.927 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:12:07.399 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:12:07.871 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:12:08.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:08.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:08.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:08.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:08.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:08.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:08.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:08.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:08.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:08.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:08.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:08.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:08.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:08.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:08.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:08.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:08.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:08.342 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:12:08.813 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 05:12:09.287 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 05:12:09.759 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 05:12:10.231 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 05:12:10.702 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 05:12:11.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:11.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:11.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:11.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:11.173 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 05:12:11.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:11.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:11.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:11.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:11.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:11.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:11.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:11.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:11.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:11.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:11.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:11.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:11.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:11.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:11.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:11.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:11.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:11.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:11.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:11.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:11.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:11.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:11.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:11.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:11.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:11.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:11.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:11.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:11.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:11.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:11.644 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 05:12:12.114 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 05:12:12.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:12.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:12.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:12.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:12.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:12.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:12.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:12.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:12.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:12.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:12.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:12.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:12.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:12.214 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:12.214 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:12.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:12.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:12.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:12.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:12.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:12.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:12.272 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:12.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:12.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:12.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:12.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:12.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:12.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:12.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:12.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:12.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:12.296 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:12.296 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:12.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:12.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:12.585 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 05:12:13.059 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 05:12:13.531 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 05:12:14.003 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 05:12:14.477 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 05:12:14.948 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 05:12:15.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:15.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:15.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:15.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:15.303 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:15.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:15.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:15.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:15.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:15.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:15.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:15.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:15.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:15.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:15.378 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:15.379 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:15.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:15.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:15.420 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 05:12:15.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:15.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:15.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:15.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:15.813 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:15.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:15.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:15.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:15.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:15.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:15.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:15.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:15.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:15.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:15.837 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:15.838 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:15.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:15.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:15.891 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 05:12:16.363 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 05:12:16.836 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 05:12:17.309 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 05:12:17.782 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 05:12:18.255 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 05:12:18.727 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 05:12:18.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:18.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:18.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:18.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:18.844 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:18.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:18.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:18.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:18.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:18.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:18.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:18.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:18.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:18.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:18.921 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:18.921 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:18.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:18.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:19.198 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 05:12:19.671 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 05:12:20.144 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 05:12:20.616 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 05:12:21.089 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 05:12:21.562 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 05:12:21.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:21.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:21.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:21.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:21.930 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:21.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:21.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:21.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:21.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:21.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:21.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:21.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:21.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:21.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:21.990 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:21.990 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:21.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:21.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:22.033 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 05:12:22.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:22.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:22.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:22.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:22.411 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:22.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:22.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:22.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:22.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:22.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:22.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:22.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:22.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:22.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:22.455 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:22.455 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:22.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:22.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:22.504 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 05:12:22.976 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 05:12:23.449 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 05:12:23.922 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 05:12:24.394 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 05:12:24.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:24.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:24.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:24.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:24.852 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:24.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:24.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:24.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:24.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:24.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:24.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:24.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:24.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:24.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:12:24.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:12:24.866 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:12:24.866 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9794 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:24.866 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9794 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:24.866 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9794 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:24.866 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9794 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:24.866 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9794 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:24.866 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9794 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:29.870 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:12:29.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:12:29.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:29.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:29.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:29.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:29.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:29.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:12:29.879 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:29.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:12:29.879 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:12:29.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:12:29.882 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:12:29.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:12:29.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:29.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:29.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:12:29.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:12:29.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:12:29.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:29.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:12:29.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:12:29.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:12:29.885 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:29.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:29.885 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:12:29.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:12:29.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:12:29.886 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:29.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:12:29.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:12:29.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:12:29.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:29.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:29.887 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:12:29.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:12:29.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:12:29.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:29.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:12:29.891 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:12:29.891 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:12:29.891 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:29.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:29.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:29.895 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:12:30.373 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:12:30.420 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:12:30.421 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:12:30.423 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:12:30.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:30.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:30.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:30.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:30.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:30.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:30.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:30.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:30.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:30.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:30.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:30.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:30.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:30.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:30.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:30.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:30.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:30.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:30.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:30.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:30.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:30.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:30.556 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:30.556 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:12:30.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:30.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:30.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:30.653 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:30.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:30.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:30.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:30.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:30.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:30.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:30.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:30.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:30.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:30.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:30.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:30.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:30.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:30.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:30.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:30.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:30.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:30.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:30.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:30.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:30.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:30.791 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:30.791 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:30.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.840 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:12:30.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:30.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:30.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:30.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:30.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:30.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:30.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:30.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:30.927 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:30.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:30.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:30.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:30.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:30.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:30.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:30.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:30.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:12:30.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:12:30.939 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:12:30.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:35.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:12:35.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:12:35.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:35.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:35.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:35.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:35.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:35.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:12:35.956 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:35.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:12:35.956 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:12:35.958 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:12:35.959 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:12:35.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:12:35.959 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:35.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:35.960 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:12:35.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:12:35.960 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:12:35.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:35.962 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:12:35.962 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:12:35.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:12:35.962 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:35.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:35.962 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:12:35.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:12:35.962 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:12:35.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:35.965 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:12:35.965 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:12:35.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:12:35.965 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:35.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:35.965 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:12:35.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:12:35.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:12:35.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:35.969 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:12:35.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:12:35.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:12:35.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:12:35.969 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:12:35.970 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:12:35.970 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:12:35.970 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:35.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:35.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:35.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:35.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:35.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:35.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:35.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:35.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:35.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:35.975 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:12:36.454 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:12:36.505 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:12:36.507 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:12:36.509 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:12:36.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:36.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:36.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:36.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:36.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:36.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:36.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:36.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:36.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:36.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:36.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:36.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:36.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:36.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:36.926 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:12:36.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:36.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:36.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:36.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:37.397 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:12:37.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:37.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:37.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:37.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:37.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:37.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:37.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:37.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:37.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:37.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:37.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:37.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:37.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:37.440 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:37.440 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:12:37.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:37.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:37.869 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:12:37.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:37.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:37.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:37.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:38.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:38.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:38.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:38.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:38.141 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:38.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:38.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:38.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:38.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:38.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:38.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:38.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:38.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:38.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:38.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:38.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:38.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:38.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:38.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:38.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:38.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:38.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:38.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:38.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:38.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:38.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:38.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:38.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:38.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:38.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:38.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:38.336 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:38.336 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:38.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:38.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:38.340 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:12:38.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:38.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:38.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:38.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:38.734 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:38.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:38.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:38.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:38.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:38.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:38.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:38.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:38.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:38.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:12:38.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:12:38.746 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:12:38.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:38.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:38.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:38.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:38.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:38.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:43.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:12:43.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:12:43.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:43.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:43.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:43.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:43.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:43.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:12:43.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:43.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:12:43.765 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:12:43.767 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:12:43.768 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:12:43.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:12:43.768 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:43.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:43.768 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:12:43.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:12:43.768 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:12:43.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:43.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:12:43.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:12:43.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:12:43.770 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:43.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:43.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:12:43.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:12:43.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:12:43.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:43.771 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:12:43.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:12:43.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:12:43.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:43.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:43.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:12:43.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:12:43.772 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:12:43.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:43.773 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:12:43.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:12:43.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:12:43.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:12:43.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:12:43.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:12:43.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:12:43.774 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:12:43.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:43.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:43.778 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:12:44.257 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:12:44.305 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:12:44.307 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:12:44.308 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:12:44.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:44.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:44.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:44.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:44.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:44.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:44.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:44.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:44.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:44.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:44.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:44.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:44.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:44.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:44.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:44.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:44.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:44.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:44.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:44.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:44.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:44.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:44.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:44.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:44.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:44.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:44.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:44.595 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:44.595 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:12:44.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:44.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:44.729 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:12:44.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:44.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:44.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:44.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:44.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:44.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:44.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:44.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:44.877 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:44.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:44.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:44.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:44.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:44.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:44.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:44.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:44.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:44.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:44.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:44.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:44.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:44.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:45.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:45.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:45.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:45.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:45.202 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:12:45.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:45.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:45.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:45.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:45.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:45.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:45.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:45.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:45.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:45.256 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:45.257 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:45.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:45.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:45.675 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:12:45.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:45.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:45.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:45.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:46.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:46.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:46.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:46.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:46.069 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:46.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:46.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:46.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:46.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:46.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:46.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:12:46.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:12:46.081 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:12:51.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:12:51.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:12:51.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:51.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:51.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:51.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:51.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:51.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:12:51.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:51.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:12:51.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:12:51.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:12:51.100 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:12:51.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:12:51.100 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:51.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:51.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:12:51.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:12:51.101 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:12:51.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:51.105 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:12:51.105 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:12:51.105 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:12:51.105 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:51.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:51.105 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:12:51.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:12:51.106 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:12:51.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:51.109 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:12:51.110 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:12:51.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:12:51.110 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:51.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:51.110 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:12:51.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:12:51.110 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:12:51.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:51.116 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:12:51.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:12:51.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:12:51.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:12:51.116 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:12:51.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:12:51.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:12:51.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:12:51.117 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:12:51.117 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:12:51.117 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:51.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:51.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:51.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:51.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:51.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:51.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:51.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:51.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:51.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:51.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:51.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:51.122 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:12:51.598 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:12:51.646 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:12:51.649 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:12:51.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:51.651 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:12:51.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:51.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:51.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:51.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:51.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:51.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:51.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:51.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:51.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:51.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:51.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:51.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:51.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:51.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:51.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:51.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:51.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:51.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:51.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:51.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:51.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:51.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:51.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:51.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:51.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:51.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:51.937 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:51.937 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:12:51.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:51.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:52.070 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:12:52.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:52.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:52.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:52.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:52.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:52.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:52.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:52.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:52.217 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:52.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:52.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:52.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:52.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:52.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:52.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:52.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:52.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:52.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:52.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:52.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:52.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:52.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:52.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:52.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:52.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:52.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:52.541 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:12:52.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:52.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:52.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:52.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:52.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:52.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:52.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:52.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:52.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:52.595 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:12:52.595 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:12:52.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:52.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:53.012 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:12:53.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:53.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:53.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:53.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:53.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:53.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:53.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:53.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:53.403 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:12:53.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:53.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:53.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:53.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:53.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:53.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:53.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:12:53.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:12:53.418 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:12:53.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:53.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:53.419 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.419 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.419 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.419 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.419 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.419 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.419 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.419 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.419 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.420 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.420 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.420 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.420 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:53.420 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:12:58.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:12:58.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:12:58.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:58.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:58.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:58.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:58.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:12:58.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:12:58.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:58.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:12:58.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:12:58.430 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:12:58.430 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:12:58.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:12:58.430 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:58.430 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:12:58.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:12:58.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:12:58.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:12:58.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:58.435 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:12:58.435 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:12:58.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:12:58.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:58.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:12:58.435 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:12:58.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:12:58.436 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:12:58.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:58.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:12:58.438 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:12:58.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:12:58.438 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:12:58.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:12:58.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:12:58.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:12:58.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:12:58.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:58.442 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:12:58.443 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:12:58.443 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:12:58.443 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:58.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:12:58.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:12:58.448 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:12:58.926 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:12:58.972 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:12:58.975 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:12:58.977 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:12:58.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:58.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:12:59.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:12:59.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:12:59.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:59.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:59.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:59.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:12:59.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:12:59.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:12:59.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:12:59.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:12:59.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:59.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:12:59.399 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:12:59.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:12:59.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:12:59.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:12:59.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:12:59.872 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:13:00.344 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:13:00.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:00.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:00.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:00.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:00.817 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:13:00.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:00.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:00.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:00.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:00.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:00.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:00.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:13:00.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:00.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:13:00.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:13:00.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:13:00.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:13:00.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:00.915 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:13:00.915 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:13:00.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:00.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:01.289 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:13:01.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:01.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:01.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:01.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:01.755 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:13:02.223 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:13:02.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:02.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:02.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:02.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:02.694 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:13:03.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:03.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:03.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:03.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:03.026 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:13:03.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:03.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:03.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:13:03.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:03.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:13:03.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:13:03.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:13:03.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:13:03.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:03.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:13:03.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:13:03.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:03.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:03.164 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:13:03.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:03.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:03.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:03.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:03.636 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:13:04.108 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:13:04.579 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:13:04.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:04.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:04.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:04.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:04.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:04.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:04.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:13:04.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:04.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:13:04.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:13:04.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:13:04.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:13:04.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:04.679 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:13:04.679 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:13:04.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:04.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:05.051 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:13:05.524 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:13:05.997 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:13:06.470 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:13:06.942 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:13:07.414 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:13:07.886 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:13:08.358 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:13:08.831 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:13:09.303 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:13:09.777 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:13:10.249 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:13:10.721 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:13:11.192 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:13:11.665 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:13:12.138 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:13:12.610 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:13:13.083 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:13:13.556 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:13:14.028 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:13:14.502 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:13:14.974 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:13:15.446 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:13:15.917 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:13:16.401 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:13:16.869 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:13:17.339 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:13:17.812 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:13:18.285 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:13:18.757 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:13:19.230 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:13:19.703 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:13:20.174 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:13:20.647 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:13:21.120 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:13:21.592 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:13:22.064 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:13:22.537 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:13:23.009 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:13:23.481 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:13:23.953 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:13:24.426 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:13:24.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:24.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:24.641 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:13:24.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:24.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:24.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:24.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:24.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:13:24.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:13:24.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:13:24.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:13:24.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:13:24.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:13:24.643 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:13:24.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5660 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:24.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5660 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:24.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5660 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:24.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5660 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:24.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5660 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:24.644 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5660 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:24.644 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5660 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:29.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:13:29.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:13:29.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:13:29.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:13:29.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:13:29.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:13:29.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:13:29.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:13:29.661 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:13:29.661 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:13:29.661 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:13:29.665 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:13:29.665 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:13:29.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:13:29.666 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:13:29.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:13:29.666 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:13:29.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:13:29.667 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:13:29.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:29.668 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:13:29.668 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:13:29.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:13:29.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:13:29.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:13:29.668 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:13:29.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:13:29.669 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:13:29.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:29.670 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:13:29.670 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:13:29.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:13:29.670 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:13:29.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:13:29.671 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:13:29.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:13:29.671 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:13:29.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:13:29.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:13:29.674 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:13:29.674 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:13:29.674 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:13:29.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:13:29.678 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:13:30.156 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:13:30.195 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:13:30.195 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:13:30.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:30.196 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:13:30.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:30.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:30.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:13:30.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:30.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:13:30.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:13:30.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:13:30.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:13:30.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:30.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:13:30.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:13:30.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:30.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:30.629 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:13:30.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:30.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:30.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:30.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:31.100 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:13:31.571 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:13:31.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:31.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:31.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:31.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:32.041 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:13:32.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:32.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:32.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:32.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:32.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:32.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:32.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:13:32.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:32.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:13:32.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:13:32.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:13:32.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:13:32.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:32.146 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:13:32.146 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:13:32.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:32.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:32.514 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:13:32.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:32.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:32.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:32.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:32.987 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:13:33.458 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:13:33.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:33.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:33.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:33.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:33.931 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:13:34.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:34.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:34.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:34.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:34.261 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:13:34.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:34.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:34.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:13:34.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:34.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:13:34.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:13:34.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:13:34.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:13:34.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:34.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:13:34.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:13:34.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:34.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:34.404 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:13:34.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:34.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:34.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:34.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:34.876 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:13:35.347 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:13:35.818 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:13:35.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:35.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:35.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:35.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:35.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:35.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:35.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:13:35.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:35.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:13:35.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:13:35.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:13:35.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:13:35.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:13:35.920 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:13:35.920 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:13:35.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:35.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:13:36.289 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:13:36.762 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:13:37.235 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:13:37.707 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:13:38.180 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:13:38.653 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:13:39.125 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:13:39.597 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:13:40.070 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:13:40.542 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:13:41.015 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:13:41.488 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:13:41.960 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:13:42.431 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:13:42.905 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:13:43.377 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:13:43.849 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:13:44.323 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:13:44.795 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:13:45.268 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:13:45.740 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:13:46.213 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:13:46.685 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:13:47.158 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:13:47.630 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:13:48.103 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:13:48.577 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:13:49.049 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:13:49.520 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:13:49.994 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:13:50.466 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:13:50.938 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:13:51.412 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:13:51.884 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:13:52.356 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:13:52.829 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:13:53.301 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:13:53.772 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:13:54.243 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:13:54.716 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:13:55.188 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:13:55.661 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:13:55.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:13:55.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:13:55.873 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:13:55.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:13:55.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:13:55.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:13:55.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:13:55.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:13:55.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:13:55.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:13:55.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:13:55.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:13:55.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:13:55.876 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:13:55.877 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5659 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:55.877 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5659 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:55.877 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5659 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:55.877 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5659 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:55.877 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5659 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:13:55.877 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5659 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:00.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:14:00.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:14:00.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:00.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:00.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:00.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:00.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:00.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:14:00.892 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:00.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:14:00.893 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:14:00.896 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:14:00.897 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:14:00.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:14:00.897 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:00.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:00.897 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:14:00.897 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:14:00.897 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:14:00.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:00.901 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:14:00.902 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:14:00.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:14:00.902 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:00.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:00.902 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:14:00.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:14:00.902 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:14:00.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:00.906 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:14:00.906 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:14:00.906 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:14:00.906 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:00.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:00.907 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:14:00.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:14:00.907 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:14:00.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:00.912 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:14:00.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:14:00.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:14:00.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:14:00.912 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:00.913 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:14:00.913 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:14:00.913 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:14:00.914 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:14:00.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:00.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:00.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:00.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:14:00.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:00.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:00.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:00.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:00.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:00.918 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:14:01.397 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:14:01.447 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:14:01.450 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:14:01.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:01.452 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:14:01.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:01.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:01.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:01.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:01.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:01.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:01.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:01.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:01.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:01.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:01.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:01.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:01.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:01.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:01.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:01.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:01.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:01.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:01.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:01.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:01.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:01.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:01.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:01.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:01.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:01.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:01.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:01.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:01.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:01.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:01.869 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:14:01.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:01.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:01.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:01.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:02.340 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:14:02.813 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:14:02.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:02.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:02.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:02.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:03.286 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:14:03.758 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:14:03.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:03.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:03.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:03.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:03.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:03.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:03.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:03.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:03.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:03.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:03.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:03.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:03.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:03.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:03.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:03.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:03.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:03.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:03.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:03.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:03.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:04.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:04.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:04.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:04.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:04.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:04.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:04.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:04.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:04.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:04.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:04.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:04.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:04.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:04.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:04.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:04.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:04.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:04.229 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:14:04.700 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:14:04.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:04.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:04.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:04.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:05.171 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:14:05.641 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:14:05.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:05.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:05.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:05.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:06.114 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:14:06.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:06.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:06.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:06.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:06.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:06.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:06.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:06.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:06.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:06.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:06.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:06.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:06.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:06.248 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:06.248 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:14:06.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:06.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:06.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:06.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:06.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:06.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:06.525 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:06.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:06.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:06.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:06.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:06.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:06.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:06.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:06.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:06.582 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:14:06.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:06.590 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:06.590 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:14:06.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:06.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:07.053 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:14:07.526 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:14:07.999 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:14:08.469 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:14:08.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:08.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:08.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:08.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:08.848 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:08.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:08.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:08.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:08.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:08.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:08.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:08.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:08.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:08.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:08.889 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:08.890 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:14:08.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:08.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:08.941 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:14:09.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:09.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:09.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:09.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:09.172 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:09.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:09.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:09.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:09.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:09.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:09.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:09.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:09.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:09.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:09.234 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:09.234 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:14:09.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:09.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:09.414 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:14:09.885 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:14:10.356 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:14:10.829 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:14:11.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:11.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:11.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:11.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:11.259 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:11.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:11.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:11.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:11.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:11.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:11.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:11.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:11.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:11.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:11.300 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:14:11.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:11.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:11.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:11.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:11.772 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:14:11.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:11.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:11.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:11.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:11.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:11.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:11.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:11.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:11.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:11.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:11.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:11.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:12.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:12.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:12.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:12.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:12.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:12.243 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:14:12.714 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:14:13.188 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:14:13.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:13.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:13.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:13.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:13.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:13.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:13.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:13.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:13.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:13.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:13.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:13.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:13.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:13.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:13.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:13.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:13.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:13.659 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:14:14.131 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:14:14.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:14.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:14.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:14.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:14.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:14.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:14.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:14.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:14.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:14.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:14.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:14.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:14.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:14.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:14.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:14.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:14.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:14.603 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:14:15.073 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:14:15.547 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:14:15.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:15.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:15.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:15.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:16.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:16.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:16.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:16.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:16.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:16.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:16.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:16.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:16.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:16.013 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:16.013 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:14:16.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:16.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:16.019 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:14:16.490 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:14:16.962 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:14:17.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:17.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:17.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:17.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:17.283 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:17.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:17.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:17.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:17.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:17.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:17.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:17.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:17.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:17.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:17.345 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:17.345 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:14:17.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:17.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:17.435 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:14:17.908 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:14:18.380 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:14:18.853 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:14:19.326 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:14:19.797 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:14:20.269 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:14:20.743 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:14:21.215 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:14:21.686 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:14:22.160 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:14:22.633 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:14:23.104 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:14:23.575 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:14:24.048 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:14:24.521 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:14:24.993 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:14:25.466 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:14:25.939 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:14:26.411 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:14:26.884 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:14:27.357 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:14:27.829 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:14:28.302 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:14:28.775 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:14:29.248 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:14:29.720 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:14:30.193 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 05:14:30.666 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 05:14:31.139 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 05:14:31.611 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 05:14:32.083 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 05:14:32.555 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 05:14:33.029 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 05:14:33.501 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 05:14:33.974 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 05:14:34.447 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 05:14:34.919 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 05:14:35.392 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 05:14:35.865 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 05:14:36.337 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 05:14:36.810 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 05:14:37.297 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 05:14:37.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:37.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:37.301 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:37.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:37.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:37.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:37.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:37.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:37.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:37.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:37.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:37.306 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:14:37.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:14:37.306 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:14:42.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:14:42.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:14:42.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:42.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:42.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:42.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:42.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:42.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:14:42.321 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:42.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:14:42.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:14:42.326 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:14:42.326 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:14:42.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:14:42.326 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:42.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:42.327 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:14:42.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:14:42.327 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:14:42.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:42.330 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:14:42.330 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:14:42.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:14:42.330 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:42.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:42.331 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:14:42.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:14:42.331 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:14:42.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:42.333 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:14:42.333 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:14:42.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:14:42.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:42.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:42.334 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:14:42.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:14:42.334 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:14:42.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:42.338 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:14:42.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:14:42.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:14:42.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:14:42.338 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:14:42.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:14:42.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:14:42.339 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:14:42.339 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:14:42.339 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:42.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:42.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:42.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:42.344 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:14:42.822 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:14:42.866 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:14:42.867 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:14:42.869 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:14:42.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:42.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:42.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:42.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:42.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:42.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:42.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:42.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:42.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:42.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:42.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:42.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:42.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:42.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:42.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:42.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:42.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:42.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:43.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:43.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:43.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:43.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:43.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:43.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:43.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:43.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:43.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:43.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:43.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.113 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:43.113 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:14:43.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.223 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:43.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:43.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:43.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:43.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:43.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:43.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.241 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:43.241 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:14:43.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.292 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:14:43.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.339 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:43.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:43.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:43.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:43.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:43.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:43.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:43.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:43.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:43.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:43.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:43.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:43.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:43.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:43.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:43.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:43.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:43.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:43.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:43.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:43.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:43.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:43.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:43.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:43.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.709 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:43.709 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:14:43.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.760 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:14:43.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.848 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:43.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:43.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:43.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:43.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:43.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:43.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:43.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:43.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:43.907 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:43.907 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:14:43.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:43.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:44.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:44.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:44.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:44.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:44.083 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:44.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:44.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:44.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:44.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:44.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:44.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:14:44.088 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:14:44.088 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:14:44.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:44.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:44.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:44.088 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=379 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:44.088 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=379 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:44.088 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=379 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:44.088 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=379 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:44.088 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=379 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:44.088 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=379 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:49.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:14:49.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:14:49.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:49.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:49.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:49.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:49.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:49.105 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:14:49.105 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:49.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:14:49.106 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:14:49.108 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:14:49.109 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:14:49.109 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:14:49.109 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:49.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:49.110 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:14:49.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:14:49.111 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:14:49.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:49.113 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:14:49.113 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:14:49.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:14:49.113 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:49.113 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:14:49.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:49.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:14:49.114 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:14:49.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:49.117 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:14:49.117 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:14:49.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:14:49.118 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:49.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:49.118 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:14:49.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:14:49.118 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:14:49.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:49.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:14:49.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:14:49.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:14:49.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:49.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:49.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:14:49.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:14:49.125 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:14:49.125 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:14:49.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:49.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:49.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:49.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:14:49.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:49.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:49.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:49.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:49.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:49.129 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:14:49.608 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:14:49.658 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:14:49.660 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:14:49.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:49.662 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:14:49.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:49.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:49.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:49.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:49.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:49.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:49.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:49.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:49.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:49.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:49.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:49.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:49.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:50.080 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:14:50.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:50.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:50.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:50.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:50.554 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:14:50.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:50.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:50.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:50.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:50.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:50.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:50.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:50.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:50.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:50.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:50.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:50.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:50.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:50.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:50.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:50.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:50.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:51.026 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:14:51.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:51.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:51.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:51.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:51.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:51.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:51.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:51.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:51.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:51.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:51.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:51.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:51.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:51.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:51.129 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:51.129 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:14:51.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:51.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:51.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:51.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:51.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:51.497 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:14:51.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:51.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:51.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:51.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:51.777 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:51.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:51.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:51.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:51.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:51.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:51.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:51.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:51.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:51.859 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:51.859 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:14:51.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:51.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:51.968 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:14:52.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:52.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:52.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:52.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:52.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:52.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:52.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:52.259 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:52.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:52.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:52.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:52.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:52.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:52.274 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:52.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:52.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:52.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:52.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:52.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:52.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:52.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:52.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:52.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:52.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:52.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:52.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:52.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:52.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:52.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:52.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:52.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:52.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.439 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:14:52.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:52.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:52.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:52.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:52.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:52.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:52.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:52.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:52.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:52.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:52.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:52.907 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:52.907 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:14:52.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:52.910 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:14:53.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:53.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:53.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:53.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:53.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:53.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:53.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:53.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:53.305 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:53.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:53.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:53.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:53.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:53.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:53.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:53.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:53.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:53.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:53.327 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:53.327 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:14:53.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:53.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:53.380 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:14:53.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:53.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:53.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:53.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:53.776 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:53.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:53.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:53.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:53.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:53.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:53.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:53.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:53.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:53.790 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:14:53.790 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:14:53.791 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:14:53.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1009 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.791 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1009 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.792 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1009 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.792 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1009 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.792 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1009 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.792 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1009 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.792 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1009 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:53.792 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1009 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:14:58.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:14:58.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:14:58.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:58.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:58.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:58.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:58.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:14:58.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:14:58.806 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:58.806 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:14:58.806 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:14:58.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:14:58.808 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:14:58.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:14:58.808 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:58.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:14:58.809 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:14:58.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:14:58.809 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:14:58.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:58.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:14:58.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:14:58.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:14:58.810 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:58.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:14:58.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:14:58.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:14:58.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:14:58.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:58.812 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:14:58.812 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:14:58.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:14:58.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:14:58.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:14:58.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:14:58.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:14:58.812 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:14:58.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:14:58.814 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:14:58.814 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:14:58.814 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:58.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:14:58.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:14:58.819 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:14:59.297 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:14:59.340 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:14:59.342 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:14:59.344 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:14:59.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:59.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:59.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:59.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:59.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:59.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:59.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:59.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:59.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:59.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:59.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:59.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:59.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:59.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:59.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:59.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:59.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:59.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:59.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:59.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:59.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:59.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:59.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:59.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:59.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:59.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:59.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:59.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:59.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:59.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.623 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:59.623 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:14:59.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:59.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:59.718 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:59.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:59.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:59.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:59.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:59.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:59.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:59.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:59.767 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:14:59.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.779 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:14:59.779 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:14:59.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:14:59.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:14:59.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:14:59.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:14:59.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:59.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:59.874 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:14:59.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:59.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:14:59.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:14:59.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:59.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:59.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:14:59.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:14:59.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:14:59.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:14:59.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:14:59.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:14:59.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:14:59.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:00.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:00.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:00.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:00.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:00.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:00.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:00.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:00.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:00.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:00.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:00.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:00.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:00.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:00.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:00.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:00.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:00.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:00.237 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:15:00.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:00.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:00.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:00.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:00.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:00.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:00.250 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:00.250 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:00.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:00.291 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:00.291 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:15:00.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:00.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:00.710 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:15:00.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:00.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:00.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:00.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:00.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:00.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:00.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:00.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:00.869 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:00.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:00.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:00.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:00.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:00.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:00.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:00.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:00.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:00.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:00.893 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:00.893 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:15:00.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:00.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:01.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:01.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:01.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:01.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:01.103 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:01.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:01.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:01.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:01.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:01.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:01.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:01.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:01.117 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:15:01.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:01.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:01.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:01.118 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:01.118 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:01.118 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:01.118 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:01.118 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:01.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:01.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:06.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:06.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:06.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:06.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:06.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:06.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:06.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:06.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:06.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:06.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:06.130 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:15:06.133 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:15:06.133 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:15:06.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:06.134 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:06.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:06.134 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:15:06.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:06.135 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:15:06.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:06.136 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:15:06.136 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:15:06.136 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:06.136 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:06.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:06.136 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:15:06.136 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:06.136 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:15:06.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:06.137 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:15:06.137 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:15:06.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:06.137 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:06.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:06.137 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:15:06.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:06.137 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:15:06.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:15:06.142 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:15:06.142 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:15:06.142 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:15:06.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:06.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:06.147 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:15:06.626 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:15:06.674 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:15:06.677 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:15:06.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:06.680 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:15:06.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:06.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:06.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:06.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:06.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:06.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:06.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:06.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:06.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:06.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:06.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:06.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:06.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:07.099 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:15:07.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:07.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:07.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:07.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:07.572 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:15:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:07.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:07.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:07.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:07.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:07.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:07.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:07.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:07.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:07.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:07.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:07.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:07.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:07.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:07.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:07.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:07.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:08.043 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:15:08.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:08.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:08.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:08.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:08.515 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:15:08.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:08.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:08.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:08.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:08.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:08.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:08.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:08.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:08.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:08.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:08.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:08.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:08.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:08.621 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:08.621 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:15:08.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:08.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:08.987 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:15:09.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:09.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:09.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:09.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:09.461 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:15:09.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:09.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:09.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:09.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:09.760 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:09.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:09.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:09.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:09.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:09.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:09.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:09.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:09.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:09.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:09.783 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:09.783 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:15:09.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:09.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:09.933 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:15:10.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:10.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:10.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:10.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:10.406 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:15:10.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:10.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:10.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:10.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:10.725 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:10.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:10.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:10.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:10.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:10.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:10.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:10.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:10.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:10.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:10.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:10.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:10.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:10.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:10.877 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:15:11.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:11.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:11.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:11.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:11.350 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:15:11.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:11.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:11.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:11.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:11.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:11.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:11.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:11.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:11.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:11.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:11.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:11.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:11.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:11.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:11.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:11.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:11.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:11.822 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:15:12.293 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:15:12.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:12.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:12.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:12.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:12.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:12.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:12.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:12.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:12.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:12.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:12.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:12.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:12.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:12.393 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:12.393 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:15:12.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:12.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:12.765 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:15:13.238 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:15:13.710 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:15:14.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:14.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:14.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:14.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:14.170 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:14.181 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:15:14.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:14.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:14.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:14.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:14.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:14.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:14.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:14.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:14.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:14.235 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:14.235 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:15:14.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:14.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:14.652 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:15:15.125 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:15:15.597 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:15:16.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:16.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:16.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:16.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:16.054 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:16.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:16.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:16.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:16.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:16.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:16.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:16.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:16.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:16.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:16.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:16.066 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:15:16.066 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:16.066 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:16.066 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:16.066 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:16.066 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:16.066 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:21.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:21.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:21.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:21.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:21.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:21.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:21.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:21.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:21.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:21.079 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:21.079 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:15:21.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:15:21.083 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:15:21.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:21.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:21.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:21.084 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:15:21.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:21.085 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:15:21.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:21.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:15:21.087 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:15:21.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:21.087 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:21.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:21.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:15:21.088 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:21.088 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:15:21.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:21.090 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:15:21.090 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:15:21.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:21.090 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:21.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:21.090 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:15:21.090 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:21.090 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:15:21.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:15:21.094 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:15:21.094 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:15:21.094 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:15:21.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:21.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:21.099 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:15:21.577 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:15:21.624 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:15:21.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:21.628 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:15:21.630 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:15:21.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:21.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:21.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:21.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:21.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:21.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:21.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:21.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:21.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:21.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:21.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:21.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:21.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:21.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:21.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:21.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:21.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:21.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:21.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:21.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:21.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:21.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:21.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:21.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:21.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:21.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:21.813 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:21.813 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:15:21.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:21.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:21.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:21.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:21.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:21.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:21.962 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:21.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:21.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:21.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:21.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:21.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:21.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:21.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:21.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:21.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:22.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:22.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:22.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:22.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:22.048 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:15:22.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:22.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:22.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:22.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:22.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:22.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:22.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:22.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:22.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:22.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:22.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:22.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:22.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:22.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:22.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:22.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:22.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:22.334 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:22.335 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:15:22.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:22.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:22.520 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:15:22.993 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:15:23.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:23.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:23.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:23.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:23.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:23.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:23.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:23.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:23.149 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:23.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:23.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:23.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:23.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:23.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:23.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:23.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:23.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:23.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:23.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:23.161 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:15:28.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:28.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:28.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:28.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:28.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:28.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:28.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:28.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:28.171 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:28.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:28.172 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:15:28.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:15:28.174 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:15:28.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:28.174 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:28.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:28.174 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:15:28.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:28.175 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:15:28.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:28.176 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:15:28.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:15:28.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:28.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:28.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:28.176 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:15:28.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:28.176 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:15:28.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:28.177 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:15:28.178 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:15:28.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:28.178 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:28.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:28.178 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:15:28.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:28.178 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:15:28.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:15:28.180 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:15:28.180 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:15:28.180 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:28.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:28.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:28.185 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:15:28.662 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:15:28.715 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:15:28.717 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:15:28.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:28.719 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:15:28.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:28.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:28.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:28.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:28.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:28.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:28.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:28.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:28.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:28.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:28.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:28.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:28.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:28.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:28.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:28.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:28.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:28.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:28.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:28.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:28.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:28.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:28.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:28.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:28.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:28.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:28.898 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:28.898 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:15:28.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:28.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:29.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:29.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:29.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:29.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:29.049 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:29.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:29.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:29.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:29.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:29.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:29.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:29.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:29.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:29.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:29.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:29.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:29.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:29.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:29.133 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:15:29.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:29.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:29.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:29.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:29.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:29.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:29.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:29.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:29.361 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=256 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:29.362 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=256 tn=7 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:29.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:29.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:29.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:29.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:29.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:29.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:29.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:29.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:29.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:29.420 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:29.420 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:15:29.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:29.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:29.605 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:15:30.077 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:15:30.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:30.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:30.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:30.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:30.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:30.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:30.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:30.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:30.235 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:30.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:30.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:30.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:30.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:30.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:30.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:30.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:30.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:30.247 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:15:30.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:30.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:30.247 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:30.247 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:30.247 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:30.247 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:30.247 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:30.247 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:35.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:35.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:35.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:35.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:35.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:35.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:35.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:35.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:35.257 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:35.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:35.258 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:15:35.260 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:15:35.260 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:15:35.260 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:35.260 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:35.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:35.260 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:15:35.261 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:35.261 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:15:35.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:35.263 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:15:35.263 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:15:35.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:35.263 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:35.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:35.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:15:35.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:35.264 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:15:35.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:35.265 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:15:35.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:15:35.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:35.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:35.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:35.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:15:35.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:35.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:15:35.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:35.269 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:15:35.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:15:35.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:15:35.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:15:35.270 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:15:35.270 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:15:35.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:35.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:35.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:35.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:35.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:35.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:35.275 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:15:35.751 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:15:35.805 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:15:35.807 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:15:35.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:35.809 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:15:35.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:35.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:35.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:35.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:35.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:35.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:35.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:35.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:35.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:35.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:35.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:35.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:35.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:35.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:35.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:35.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:35.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:35.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:35.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:35.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:35.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:35.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:35.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:35.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:35.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:35.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:35.986 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:35.986 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:15:35.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:35.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:36.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:36.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:36.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:36.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:36.135 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:36.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:36.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:36.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:36.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:36.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:36.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:36.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:36.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:36.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:36.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:36.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:36.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:36.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:36.219 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:15:36.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:36.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:36.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:36.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:36.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:36.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:36.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:36.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:36.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:36.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:36.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:36.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:36.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:36.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:36.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:36.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:36.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:36.509 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:36.509 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:15:36.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:36.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:36.691 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:15:37.165 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:15:37.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:37.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:37.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:37.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:37.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:37.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:37.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:37.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:37.325 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:37.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:37.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:37.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:37.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:37.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:37.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:37.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:37.338 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:15:37.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:37.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:37.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:37.339 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:37.339 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:37.339 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:37.339 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:37.340 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:37.340 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:37.340 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:42.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:42.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:42.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:42.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:42.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:42.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:42.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:42.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:42.348 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:42.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:42.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:15:42.351 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:15:42.351 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:15:42.351 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:42.351 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:42.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:42.352 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:15:42.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:42.352 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:15:42.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:42.356 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:15:42.356 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:15:42.356 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:42.356 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:42.357 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:42.357 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:15:42.357 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:42.357 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:15:42.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:42.361 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:15:42.361 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:15:42.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:42.361 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:42.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:42.361 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:15:42.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:42.361 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:15:42.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:42.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:42.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:42.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:42.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:15:42.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:15:42.368 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:15:42.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:15:42.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:42.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:42.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:42.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:15:42.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:42.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:42.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:42.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:42.373 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:15:42.849 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:15:42.898 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:15:42.900 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:15:42.902 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:15:42.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:42.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:42.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:42.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:42.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:42.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:42.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:42.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:42.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:42.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:42.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:42.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:42.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:42.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:43.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:43.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:43.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:43.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:43.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:43.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:43.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:43.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:43.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:43.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:43.141 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:43.141 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:15:43.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:43.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:43.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:43.313 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:43.319 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:15:43.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:43.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:43.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:43.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:43.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:43.331 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:43.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:43.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:43.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:43.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:43.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:43.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:43.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:43.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:43.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:43.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:43.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:43.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:43.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:43.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:43.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:43.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:43.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:43.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:43.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:43.606 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:43.606 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:15:43.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:43.789 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:15:44.262 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:15:44.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:44.391 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:44.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:44.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:44.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:44.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:44.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:44.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:44.420 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:44.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:44.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:44.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:44.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:44.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:44.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:44.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:44.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:44.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:44.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:44.431 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:15:49.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:49.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:49.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:49.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:49.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:49.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:49.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:49.446 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:49.446 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:49.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:49.447 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:15:49.449 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:15:49.449 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:15:49.450 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:49.450 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:49.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:49.450 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:15:49.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:49.451 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:15:49.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:49.452 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:15:49.452 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:15:49.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:49.452 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:49.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:49.453 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:15:49.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:49.453 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:15:49.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:49.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:15:49.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:15:49.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:49.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:49.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:49.456 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:15:49.456 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:49.456 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:15:49.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:49.459 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:15:49.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:15:49.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:15:49.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:15:49.459 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:15:49.460 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:15:49.460 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:15:49.460 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:49.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:49.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:49.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:49.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:49.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:49.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:49.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:49.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:49.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:49.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:49.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:49.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:49.465 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:15:49.943 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:15:49.992 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:15:49.993 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:15:49.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:49.995 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:15:50.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:50.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:50.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:50.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:50.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:50.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:50.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:50.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:50.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:50.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:50.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:50.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:50.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:50.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:50.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:50.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:50.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:50.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:50.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:50.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:50.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:50.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:50.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:50.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:50.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:50.416 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:15:50.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:50.423 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:50.424 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:15:50.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:50.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:50.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:50.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:50.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:50.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:50.889 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:15:50.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:50.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:50.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:50.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:50.903 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:50.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:50.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:50.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:50.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:50.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:50.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:50.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:50.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:50.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:50.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:50.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:50.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:50.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:51.362 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:15:51.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:51.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:51.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:51.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:51.834 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:15:51.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:51.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:51.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:51.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:52.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:52.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:52.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:52.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:52.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:52.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:52.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:52.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:52.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:52.015 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:15:52.015 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:15:52.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:52.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:52.304 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:15:52.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:52.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:52.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:52.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:52.777 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:15:53.250 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:15:53.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:53.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:53.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:53.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:53.722 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:15:54.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:54.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:54.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:54.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:54.042 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:15:54.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:54.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:54.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:54.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:54.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:54.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:54.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:54.055 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:15:54.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:54.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:54.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:54.055 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:54.055 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:54.055 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:54.055 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:54.055 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:54.055 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:15:59.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:15:59.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:15:59.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:59.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:59.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:59.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:59.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:15:59.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:59.066 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:59.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:15:59.066 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:15:59.070 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:15:59.070 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:15:59.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:59.071 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:59.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:15:59.071 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:15:59.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:15:59.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:15:59.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:15:59.075 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:15:59.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:15:59.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:59.076 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:59.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:15:59.076 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:15:59.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:15:59.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:15:59.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:15:59.081 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:15:59.081 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:15:59.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:59.081 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:15:59.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:15:59.082 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:15:59.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:15:59.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:15:59.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:15:59.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:15:59.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:15:59.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:15:59.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:15:59.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:15:59.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:15:59.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:15:59.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:59.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:15:59.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:15:59.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:15:59.090 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:15:59.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:59.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:59.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:59.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:15:59.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:59.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:59.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:59.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:59.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:59.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:15:59.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:15:59.095 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:15:59.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:15:59.628 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:15:59.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:59.630 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:15:59.630 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:15:59.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:15:59.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:15:59.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:15:59.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:59.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:59.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:59.662 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:15:59.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:15:59.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:15:59.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:15:59.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:15:59.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:15:59.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:00.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:00.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:00.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:00.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:00.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:16:00.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:00.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:00.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:00.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:00.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:00.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:00.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:00.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:00.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:00.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:00.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:00.096 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:00.096 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:16:00.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:00.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:00.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:00.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:00.516 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:16:00.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:00.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:00.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:00.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:00.617 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:16:00.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:00.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:00.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:00.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:00.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:00.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:00.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:00.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:00.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:00.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:00.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:00.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:00.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:00.988 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:16:01.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:01.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:01.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:01.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:01.459 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:16:01.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:01.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:01.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:01.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:01.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:01.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:01.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:01.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:01.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:01.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:01.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:01.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:01.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:01.703 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:01.703 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:16:01.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:01.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:01.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:16:02.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:02.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:02.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:02.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:02.403 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:16:02.876 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:16:03.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:03.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:03.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:03.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:03.348 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:16:03.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:03.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:03.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:03.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:03.668 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:16:03.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:03.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:03.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:03.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:03.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:03.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:03.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:03.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:03.682 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:16:03.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:03.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:03.683 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:03.683 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:03.683 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:03.683 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:03.683 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:03.683 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:08.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:08.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:08.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:08.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:08.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:08.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:08.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:08.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:08.694 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:08.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:08.695 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:16:08.699 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:16:08.700 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:16:08.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:08.700 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:08.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:08.701 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:16:08.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:08.702 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:16:08.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:08.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:16:08.705 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:16:08.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:08.705 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:08.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:08.706 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:16:08.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:08.706 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:16:08.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:08.709 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:16:08.709 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:16:08.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:08.709 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:08.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:08.709 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:16:08.710 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:08.710 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:16:08.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:08.714 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:16:08.714 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:16:08.714 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:16:08.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:08.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:08.719 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:16:09.198 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:16:09.244 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:16:09.247 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:16:09.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:09.250 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:16:09.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:09.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:09.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:09.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:09.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:09.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:09.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:09.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:09.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:09.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:09.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:09.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:09.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:09.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:09.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:09.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:09.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:09.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:09.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:09.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:09.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:09.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:09.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:09.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:09.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:09.668 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:16:09.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:09.681 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:09.681 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:16:09.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:09.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:09.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:09.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:09.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:09.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:10.141 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:16:10.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:10.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:10.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:10.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:10.201 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:16:10.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:10.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:10.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:10.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:10.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:10.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:10.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:10.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:10.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:10.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:10.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:10.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:10.613 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:16:10.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:10.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:10.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:10.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:11.084 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:16:11.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:11.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:11.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:11.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:11.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:11.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:11.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:11.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:11.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:11.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:11.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:11.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:11.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:11.324 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:11.324 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:16:11.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:11.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:11.555 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:16:11.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:11.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:11.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:11.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:12.028 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:16:12.501 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:16:12.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:12.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:12.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:12.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:12.973 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:16:13.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:13.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:13.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:13.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:13.293 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:16:13.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:13.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:13.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:13.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:13.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:13.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:13.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:13.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:13.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:13.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:13.307 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:16:13.307 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:13.307 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:13.307 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:13.307 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:13.307 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:13.307 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:18.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:18.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:18.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:18.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:18.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:18.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:18.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:18.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:18.320 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:18.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:18.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:16:18.324 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:16:18.325 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:16:18.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:18.325 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:18.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:18.326 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:16:18.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:18.326 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:16:18.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:18.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:16:18.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:16:18.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:18.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:18.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:18.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:16:18.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:18.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:16:18.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:18.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:16:18.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:16:18.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:18.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:18.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:18.331 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:16:18.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:18.331 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:16:18.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:18.334 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:16:18.334 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:16:18.334 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:16:18.334 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:18.339 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:16:18.817 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:16:18.866 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:16:18.868 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:16:18.869 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:16:18.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:18.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:18.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:18.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:18.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:18.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:18.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:18.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:18.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:18.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:18.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:18.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:18.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:18.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:19.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:19.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:19.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:19.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:19.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:19.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:19.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:19.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:19.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:19.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:19.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:19.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:19.289 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:16:19.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:19.297 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:19.297 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:16:19.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:19.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:19.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:19.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:19.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:19.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:19.762 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:16:19.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:19.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:19.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:19.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:19.776 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:16:19.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:19.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:19.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:19.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:19.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:19.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:19.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:19.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:19.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:19.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:19.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:19.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:19.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:20.235 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:16:20.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:20.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:20.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:20.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:20.707 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:16:20.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:20.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:20.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:20.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:20.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:20.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:20.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:20.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:20.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:20.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:20.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:20.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:20.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:20.892 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:20.892 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:16:20.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:20.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:21.179 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:16:21.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:21.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:21.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:21.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:21.652 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:16:22.124 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:16:22.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:22.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:22.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:22.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:22.598 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:16:22.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:22.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:22.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:22.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:22.916 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:16:22.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:22.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:22.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:22.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:22.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:22.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:22.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:22.930 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:16:22.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:22.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:22.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:22.930 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:22.930 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:22.930 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:22.930 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:22.930 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:22.930 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:27.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:27.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:27.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:27.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:27.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:27.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:27.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:27.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:27.942 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:27.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:27.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:16:27.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:16:27.946 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:16:27.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:27.946 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:27.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:27.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:16:27.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:27.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:16:27.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:27.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:16:27.949 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:16:27.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:27.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:27.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:27.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:16:27.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:27.949 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:16:27.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:27.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:16:27.951 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:16:27.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:27.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:27.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:27.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:16:27.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:27.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:16:27.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:27.955 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:16:27.955 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:16:27.955 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:16:27.955 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:27.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:27.960 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:16:28.435 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:16:28.482 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:16:28.484 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:16:28.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:28.486 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:16:28.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:28.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:28.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:28.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:28.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:28.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:28.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:28.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:28.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:28.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:28.528 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:16:28.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:28.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:28.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:28.528 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:28.528 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:28.528 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:28.528 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:28.528 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:28.528 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:28.528 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:33.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:33.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:33.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:33.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:33.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:33.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:33.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:33.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:33.541 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:33.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:33.542 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:16:33.546 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:16:33.546 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:16:33.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:33.546 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:33.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:33.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:16:33.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:33.547 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:16:33.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:33.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:16:33.551 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:16:33.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:33.552 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:33.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:33.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:16:33.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:33.552 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:16:33.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:33.556 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:16:33.556 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:16:33.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:33.556 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:33.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:33.557 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:16:33.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:33.557 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:16:33.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:33.562 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:16:33.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:33.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:33.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:33.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:33.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:16:33.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:16:33.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:16:33.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:16:33.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:33.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:33.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:33.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:33.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:33.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:33.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:33.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:33.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:33.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:33.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:33.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:33.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:33.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:16:34.047 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:16:34.093 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:16:34.095 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:16:34.097 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:16:34.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:34.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:34.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:34.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:34.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:34.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:34.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:34.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:34.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:34.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:34.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:34.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:34.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:34.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:34.141 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:34.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:34.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:34.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:34.142 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:16:34.142 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:34.142 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:34.142 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:34.142 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:34.142 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:34.142 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:39.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:39.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:39.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:39.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:39.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:39.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:39.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:39.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:39.161 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:39.162 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:39.162 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:16:39.166 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:16:39.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:16:39.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:39.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:39.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:39.166 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:16:39.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:39.167 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:16:39.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:39.171 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:16:39.171 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:16:39.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:39.171 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:39.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:39.172 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:16:39.172 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:39.172 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:16:39.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:39.176 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:16:39.176 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:16:39.176 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:39.176 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:39.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:39.177 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:16:39.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:39.177 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:16:39.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:39.182 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:16:39.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:16:39.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:16:39.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:39.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:39.184 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:16:39.184 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:16:39.184 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:16:39.184 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:16:39.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:39.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:39.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:39.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:16:39.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:39.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:39.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:39.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:39.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:39.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:39.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:39.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:39.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:39.189 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:16:39.665 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:16:39.718 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:16:39.721 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:16:39.721 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:16:39.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:39.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:39.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:39.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:39.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:39.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:39.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:39.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:39.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:39.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:39.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:39.752 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:16:39.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:39.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:39.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:16:44.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:44.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:44.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:44.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:44.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:44.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:44.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:44.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:44.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:44.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:44.764 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:16:44.768 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:16:44.768 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:16:44.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:44.769 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:44.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:44.769 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:16:44.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:44.770 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:16:44.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:44.773 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:16:44.773 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:16:44.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:44.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:44.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:44.775 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:16:44.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:44.775 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:16:44.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:44.778 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:16:44.778 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:16:44.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:44.778 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:44.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:44.778 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:16:44.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:44.779 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:16:44.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:44.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:16:44.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:16:44.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:16:44.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:16:44.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:16:44.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:16:44.784 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:16:44.784 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:16:44.784 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:44.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:44.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:16:44.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:44.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:44.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:44.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:44.786 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:16:44.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:49.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:16:49.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:16:49.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:49.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:49.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:49.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:49.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:16:49.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:49.800 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:49.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:16:49.801 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:16:49.802 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:16:49.802 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:16:49.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:49.803 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:49.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:16:49.803 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:16:49.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:16:49.803 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:16:49.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:49.805 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:16:49.805 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:16:49.805 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:49.805 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:49.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:16:49.805 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:16:49.805 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:16:49.805 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:16:49.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:49.807 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:16:49.807 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:16:49.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:49.807 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:16:49.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:16:49.807 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:16:49.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:16:49.807 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:16:49.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:49.809 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:16:49.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:16:49.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:16:49.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:16:49.809 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:16:49.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:16:49.810 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:16:49.810 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:16:49.810 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:16:49.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:49.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:49.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:16:49.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:16:49.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:49.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:49.814 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:16:50.292 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:16:50.338 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:16:50.340 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:16:50.342 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:16:50.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:50.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:50.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:50.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:50.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:50.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:50.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:50.359 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:50.359 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:50.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:50.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:50.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:50.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:50.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:50.764 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:16:50.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:50.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:50.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:50.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:51.235 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:16:51.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:51.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:51.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:51.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:51.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:51.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:51.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:51.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:51.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:51.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:51.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:51.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:51.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:51.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:51.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:51.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:51.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:51.706 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:16:51.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:51.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:51.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:51.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:52.180 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:16:52.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:52.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:52.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:52.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:52.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:52.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:52.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:52.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:52.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:52.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:52.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:52.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:52.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:52.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:52.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:52.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:52.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:52.652 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:16:52.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:52.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:52.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:52.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:53.124 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:16:53.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:53.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:53.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:53.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:53.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:53.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:53.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:53.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:53.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:53.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:53.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:53.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:53.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:53.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:53.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:53.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:53.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:53.595 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:16:53.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:53.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:53.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:53.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:54.066 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:16:54.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:54.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:54.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:54.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:54.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:54.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:54.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:54.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:54.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:54.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:54.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:54.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:54.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:54.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:54.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:54.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:54.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:54.539 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:16:54.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:16:54.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:16:54.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:16:54.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:16:54.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:54.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:54.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:54.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:54.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:54.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:54.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:54.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:54.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:54.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:54.875 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:54.875 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:54.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:54.920 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:54.920 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 05:16:54.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:54.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:55.012 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:16:55.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:55.484 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:16:55.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:55.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:55.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:55.485 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:16:55.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:55.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:55.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:55.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:55.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:55.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:55.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:55.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:55.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:55.537 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:55.537 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-04-19 05:16:55.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:55.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:55.954 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:16:56.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:56.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:56.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:56.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:56.085 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:16:56.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:56.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:56.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:56.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:56.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:56.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:56.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:56.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:56.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:56.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:56.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:56.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:56.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:56.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:56.427 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:16:56.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:56.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:56.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:56.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:56.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:56.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:56.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:56.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:56.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:56.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:56.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:56.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:56.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:56.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:56.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:56.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:56.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:56.900 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:16:57.373 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:16:57.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:57.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:57.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:57.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:57.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:57.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:57.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:57.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:57.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:57.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:57.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:57.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:57.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:16:57.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:57.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:57.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:57.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:57.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:57.844 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:16:57.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:57.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:57.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:57.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:57.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:57.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:57.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:57.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:57.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:57.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:57.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:57.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:58.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:58.037 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:58.037 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:16:58.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:58.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:58.316 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:16:58.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:58.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:58.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:58.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:58.625 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:16:58.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:58.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:58.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:58.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:58.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:58.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:58.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:58.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:58.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:58.697 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:58.697 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:16:58.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:58.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:58.788 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:16:59.259 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:16:59.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:59.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:59.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:59.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:59.313 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:16:59.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:16:59.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:16:59.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:16:59.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:59.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:16:59.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:16:59.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:16:59.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:16:59.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:16:59.356 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:16:59.356 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:16:59.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:59.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:16:59.731 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:17:00.204 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:17:00.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:00.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:00.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:00.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:00.212 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:17:00.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:00.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:00.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:00.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:00.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:00.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:00.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:00.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:00.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:00.248 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:17:00.248 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:17:00.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:00.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:00.677 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:17:01.148 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:17:01.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:01.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:01.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:01.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:01.178 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:17:01.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:01.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:01.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:01.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:01.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:01.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:01.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:01.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:01.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:01.250 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:17:01.250 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:17:01.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:01.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:01.620 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:17:02.093 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:17:02.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:02.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:02.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:02.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:02.138 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:17:02.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:02.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:02.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:02.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:02.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:02.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:02.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:02.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:02.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:02.191 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:17:02.191 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:17:02.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:02.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:02.566 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:17:03.038 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:17:03.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:03.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:03.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:03.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:03.104 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:17:03.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:03.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:03.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:03.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:03.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:03.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:03.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:03.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:03.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:03.131 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:17:03.131 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:17:03.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:03.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:03.511 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:17:03.984 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:17:04.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:04.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:04.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:04.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:04.071 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:17:04.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:04.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:04.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:04.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:04.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:04.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:04.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:04.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:04.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:04.133 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:17:04.133 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:17:04.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:04.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:04.456 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:17:04.930 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:17:05.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:05.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:05.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:05.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:05.031 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:17:05.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:05.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:05.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:05.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:05.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:05.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:05.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:05.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:05.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:05.065 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:17:05.065 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:17:05.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:05.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:05.402 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:17:05.874 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:17:05.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:05.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:05.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:05.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:05.996 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:17:06.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:06.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:06.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:06.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:06.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:06.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:06.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:06.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:06.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:06.069 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:17:06.069 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:17:06.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:06.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:06.345 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:17:06.819 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:17:06.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:06.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:06.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:06.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:06.960 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:17:06.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:17:06.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:17:06.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:17:06.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:17:06.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:17:06.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:17:06.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:17:06.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:17:06.966 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:17:06.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:17:06.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:17:11.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:17:11.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:17:11.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:17:11.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:17:11.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:17:11.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:17:11.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:17:11.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:17:11.983 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:11.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:17:11.984 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:17:11.989 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:17:11.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:17:11.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:17:11.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:11.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:17:11.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:17:11.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:17:11.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:17:11.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:17:11.995 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:17:11.995 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:17:11.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:17:11.996 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:11.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:17:11.996 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:17:11.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:17:11.996 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:17:11.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:17:12.000 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:17:12.000 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:17:12.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:17:12.000 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:12.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:17:12.000 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:17:12.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:17:12.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:17:12.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:12.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:17:12.006 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:17:12.006 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:17:12.006 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:12.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:12.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:12.011 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:17:12.489 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:17:12.536 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:17:12.538 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:17:12.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:12.539 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:17:12.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:12.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:12.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:12.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:12.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:12.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:12.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:12.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:12.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:12.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:12.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:12.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:12.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:12.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:12.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:12.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:12.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:12.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:12.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:12.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:12.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:12.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:12.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:12.856 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:12.856 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:12.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:12.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:12.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:12.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:12.961 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:17:13.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:17:13.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:17:13.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:17:13.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:17:13.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:13.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:13.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:13.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:13.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:13.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:13.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:13.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:13.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:13.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:13.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:13.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:13.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:13.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:13.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:13.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:13.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:13.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:13.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:13.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:13.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:13.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:13.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:13.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:17:13.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:13.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:13.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:13.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:17:13.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:17:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:13.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:17:13.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:17:13.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:13.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:13.431 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:17:13.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:17:13.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:17:13.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:17:13.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:17:13.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:17:13.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:17:13.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:17:13.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:17:13.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:17:13.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:17:13.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:17:13.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:17:13.618 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:17:13.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:17:13.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:17:18.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:17:18.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:17:18.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:17:18.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:17:18.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:17:18.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:17:18.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:17:18.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:17:18.634 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:18.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:17:18.634 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:17:18.637 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:17:18.638 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:17:18.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:17:18.638 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:18.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:17:18.639 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:17:18.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:17:18.639 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:17:18.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:17:18.641 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:17:18.641 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:17:18.641 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:17:18.641 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:18.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:17:18.641 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:17:18.641 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:17:18.641 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:17:18.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:17:18.643 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:17:18.644 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:17:18.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:17:18.644 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:18.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:17:18.644 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:17:18.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:17:18.644 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:17:18.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:17:18.647 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:17:18.647 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:17:18.647 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:18.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:18.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:18.652 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:17:19.130 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:17:19.602 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:17:20.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:17:20.549 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:17:21.025 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:17:21.497 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:17:21.972 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:17:22.444 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:17:22.917 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:17:23.390 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:17:23.863 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:17:24.337 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:17:24.809 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:17:25.284 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:17:25.753 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:17:26.216 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:17:26.679 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:17:27.143 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:17:27.606 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:17:28.074 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:17:28.538 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:17:29.001 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:17:29.465 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:17:29.928 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:17:30.391 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:17:30.855 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:17:31.327 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:17:31.798 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:17:32.270 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:17:32.742 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:17:33.211 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:17:33.679 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:17:34.154 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:17:34.626 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:17:35.095 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:17:35.568 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:17:36.040 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:17:36.510 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:17:36.981 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:17:37.452 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:17:37.927 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:17:38.399 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:17:38.870 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:17:39.334 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:17:39.801 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:17:40.265 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:17:40.728 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:17:41.191 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:17:41.656 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:17:42.128 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:17:42.600 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:17:42.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:17:42.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:17:42.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:17:42.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:17:42.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:17:42.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:17:42.672 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:17:42.672 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:17:42.672 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:17:42.672 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:17:42.672 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:17:42.673 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:17:42.673 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:17:42.673 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5219 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:17:47.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:17:47.678 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:17:47.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:17:47.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:17:47.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:17:47.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:17:47.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:17:47.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:17:47.692 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:47.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:17:47.692 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:17:47.697 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:17:47.697 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:17:47.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:17:47.698 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:47.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:17:47.699 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:17:47.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:17:47.699 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:17:47.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:17:47.701 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:17:47.701 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:17:47.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:17:47.701 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:47.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:17:47.702 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:17:47.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:17:47.702 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:17:47.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:17:47.704 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:17:47.704 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:17:47.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:17:47.705 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:17:47.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:17:47.705 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:17:47.705 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:17:47.705 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:17:47.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:47.708 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:17:47.708 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:17:47.708 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:17:47.709 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:17:47.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:17:47.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:47.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:47.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:17:47.713 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:17:48.190 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:17:48.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:17:49.137 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:17:49.609 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:17:50.084 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:17:50.556 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:17:51.032 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:17:51.503 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:17:51.979 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:17:52.451 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:17:52.924 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:17:53.397 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:17:53.868 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:17:54.344 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:17:54.816 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:17:55.291 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:17:55.763 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:17:56.238 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:17:56.710 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:17:57.173 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:17:57.637 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:17:58.105 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:17:58.575 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:17:59.050 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:17:59.526 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:17:59.998 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:18:00.471 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:18:00.944 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:18:01.416 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:18:01.891 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:18:02.363 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:18:02.836 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:18:03.309 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:18:03.781 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:18:04.256 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:18:04.728 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:18:05.204 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:18:05.676 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:18:06.151 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:18:06.623 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:18:07.098 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:18:07.570 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:18:08.046 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:18:08.517 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:18:08.991 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:18:09.464 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:18:09.935 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:18:10.411 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:18:10.883 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:18:11.358 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:18:11.830 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:18:12.305 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:18:12.777 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:18:13.253 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:18:13.725 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:18:14.200 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:18:14.672 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:18:15.145 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:18:15.618 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:18:16.090 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:18:16.565 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:18:17.037 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 05:18:17.512 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 05:18:17.984 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 05:18:18.457 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 05:18:18.930 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 05:18:19.394 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 05:18:19.858 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 05:18:20.321 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 05:18:20.784 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 05:18:21.247 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 05:18:21.719 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 05:18:22.183 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 05:18:22.646 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 05:18:23.109 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 05:18:23.573 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 05:18:24.039 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 05:18:24.503 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 05:18:24.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:24.969 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 05:18:25.432 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 05:18:25.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:25.895 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 05:18:26.361 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 05:18:26.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:26.825 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 05:18:27.288 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 05:18:27.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:27.760 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 05:18:28.231 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 05:18:28.705 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 05:18:28.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:29.178 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 05:18:29.649 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 05:18:29.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:29.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:18:29.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:18:29.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:18:29.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:18:29.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:18:29.746 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:18:29.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:18:29.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9101 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:18:29.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9101 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:18:29.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9101 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:18:29.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9101 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:18:29.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9101 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:18:29.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9101 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:18:29.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9101 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:18:29.746 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=9101 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:18:34.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:18:34.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:18:34.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:18:34.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:18:34.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:18:34.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:18:34.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:18:34.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:18:34.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:18:34.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:18:34.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:18:34.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:18:34.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:18:34.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:18:34.767 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:18:34.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:18:34.768 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:18:34.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:18:34.768 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:18:34.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:34.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:18:34.771 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:18:34.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:18:34.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:18:34.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:18:34.771 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:18:34.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:18:34.771 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:18:34.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:34.774 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:18:34.774 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:18:34.774 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:18:34.774 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:18:34.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:18:34.774 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:18:34.775 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:18:34.775 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:18:34.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:18:34.779 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:18:34.779 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:18:34.779 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:34.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:34.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:34.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:34.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:34.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:34.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:34.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:34.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:34.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:34.783 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:18:35.260 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:18:35.309 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:18:35.311 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:35.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:35.314 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:18:35.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:18:35.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:18:35.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:18:35.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:35.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:18:35.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:18:35.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:18:35.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:18:35.399 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:35.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:35.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:18:35.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:18:35.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:35.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:35.733 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:18:35.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:35.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:35.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:35.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:36.206 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:18:36.678 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:18:36.703 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 05:18:36.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:36.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:36.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:36.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:37.151 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:18:37.624 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:18:37.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:37.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:37.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:37.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:38.097 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:18:38.569 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:18:38.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:38.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:38.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:38.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:39.040 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:18:39.513 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:18:39.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:39.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:39.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:18:39.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:18:39.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:18:39.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:18:39.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:18:39.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:39.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:18:39.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:18:39.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:18:39.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:18:39.648 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:39.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:39.655 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:18:39.655 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:18:39.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:39.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:39.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:39.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:39.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:39.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:39.985 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:18:40.458 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:18:40.932 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:18:41.404 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:18:41.877 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:18:42.350 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:18:42.823 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:18:43.296 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:18:43.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:43.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:43.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:18:43.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:18:43.697 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:18:43.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:18:43.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:18:43.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:18:43.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:43.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:18:43.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:18:43.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:18:43.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:18:43.768 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:43.768 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:18:43.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:43.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:18:43.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:18:43.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:43.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:44.203 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 05:18:44.239 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:18:44.710 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:18:45.181 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:18:45.654 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:18:46.127 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:18:46.599 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:18:47.070 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:18:47.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:47.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:47.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:18:47.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:18:47.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:18:47.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:18:47.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:18:47.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:47.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:18:47.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:18:47.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:18:47.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:18:47.536 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:47.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:47.541 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:18:47.541 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:18:47.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:47.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:47.542 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:18:48.015 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:18:48.487 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:18:48.875 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 05:18:48.960 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:18:49.433 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:18:49.824 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 05:18:49.906 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:18:50.293 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 05:18:50.379 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:18:50.851 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:18:51.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:51.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:51.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:18:51.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:18:51.247 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:18:51.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:51.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:51.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:51.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:51.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:18:51.256 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:18:51.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:18:51.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:18:51.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:18:51.256 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:18:51.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:18:56.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:18:56.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:18:56.268 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:18:56.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:18:56.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:18:56.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:18:56.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:18:56.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:18:56.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:18:56.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:18:56.277 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:18:56.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:18:56.279 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:18:56.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:18:56.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:18:56.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:18:56.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:18:56.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:18:56.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:18:56.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:56.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:18:56.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:18:56.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:18:56.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:18:56.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:18:56.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:18:56.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:18:56.283 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:18:56.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:56.285 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:18:56.286 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:18:56.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:18:56.286 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:18:56.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:18:56.286 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:18:56.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:18:56.286 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:18:56.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:56.291 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:18:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:18:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:18:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:18:56.291 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:18:56.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:18:56.292 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:18:56.292 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:18:56.292 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:56.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:56.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:18:56.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:18:56.297 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:18:56.775 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:18:56.829 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:18:56.831 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:56.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:56.833 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:18:56.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:18:56.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:18:56.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:18:56.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:56.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:18:56.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:18:56.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:18:56.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:18:56.914 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:56.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:18:56.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:18:56.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:18:56.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:56.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:18:57.247 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:18:57.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:57.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:57.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:57.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:57.718 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:18:57.733 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:58.191 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:18:58.212 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:58.215 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 05:18:58.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:58.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:58.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:58.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:58.664 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:18:58.699 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:59.137 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:18:59.179 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:18:59.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:18:59.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:18:59.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:18:59.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:18:59.610 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:18:59.659 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:00.083 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:19:00.145 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:00.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:00.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:00.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:00.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:00.555 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:19:00.625 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:01.026 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:19:01.105 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:01.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:01.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:01.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:01.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:01.499 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:19:01.585 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:01.972 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:19:02.071 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:02.444 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:19:02.551 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:02.918 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:19:03.031 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:03.391 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:19:03.517 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:03.863 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:19:03.997 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:04.336 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:19:04.477 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:04.809 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:19:04.964 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:04.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:04.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:04.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:04.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:04.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:04.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:04.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:04.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:04.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:04.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:04.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:04.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:04.990 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:04.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:04.994 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:19:04.994 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:19:04.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:04.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:05.281 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:19:05.685 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:05.754 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:19:06.163 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:06.227 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:19:06.649 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:06.699 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:19:07.129 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:07.172 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:19:07.609 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:07.645 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:19:08.095 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:08.117 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:19:08.575 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:08.590 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:19:09.055 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:09.063 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:19:09.535 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:19:09.541 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:19:10.021 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:10.481 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:19:10.507 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:10.954 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:19:10.986 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:11.427 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:19:11.467 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:11.900 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:19:11.953 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:12.374 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:19:12.433 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:12.848 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:19:12.919 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:12.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:12.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:12.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:12.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:12.930 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:19:12.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:12.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:12.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:12.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:12.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:12.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:12.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:12.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:12.987 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:12.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:13.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:13.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:13.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:13.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:13.284 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:13.319 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:19:13.754 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:13.758 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 05:19:13.791 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:19:14.225 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:14.262 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:19:14.696 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:14.735 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:19:15.167 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:15.208 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:19:15.643 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:15.680 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:19:16.114 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:16.151 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:19:16.585 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:16.621 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:19:17.055 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:17.095 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:19:17.526 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:17.567 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:19:18.003 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:18.039 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:19:18.474 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:18.510 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:19:18.945 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:18.984 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:19:19.415 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:19.456 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:19:19.892 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:19.928 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:19:20.363 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:20.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:20.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:20.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:20.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:20.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:20.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:20.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:20.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:20.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:20.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:20.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:20.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:20.394 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:20.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:20.398 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:19:20.398 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:19:20.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:20.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:20.399 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:19:20.788 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:20.870 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:19:21.258 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:21.261 [DEBUG] fake_trx.py:269 (MS@172.18.173.22:6700) Recv SETTA cmd
2026-04-19 05:19:21.344 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:19:21.730 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:21.816 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:19:22.205 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:22.288 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:19:22.677 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:22.762 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:19:23.147 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:23.234 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:19:23.624 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:23.705 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:19:24.095 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:24.177 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:19:24.565 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:24.651 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:19:25.037 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:25.123 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:19:25.512 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:25.595 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 05:19:25.984 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:26.067 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 05:19:26.454 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:26.540 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 05:19:26.930 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:27.012 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 05:19:27.400 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:27.486 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 05:19:27.872 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:27.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:27.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:27.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:27.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:27.878 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:19:27.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:27.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:27.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:27.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:27.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:19:27.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:19:27.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:19:27.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:19:27.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:19:27.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:19:27.881 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:19:32.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:19:32.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:19:32.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:19:32.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:19:32.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:19:32.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:19:32.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:19:32.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:19:32.896 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:32.897 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:19:32.897 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:19:32.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:19:32.899 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:19:32.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:19:32.900 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:32.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:19:32.900 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:19:32.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:19:32.901 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:19:32.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:32.902 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:19:32.902 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:19:32.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:19:32.902 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:32.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:19:32.902 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:19:32.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:19:32.902 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:19:32.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:32.904 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:19:32.904 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:19:32.904 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:19:32.904 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:32.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:19:32.904 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:19:32.904 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:19:32.904 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:19:32.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:19:32.907 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:19:32.907 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:19:32.907 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:32.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:32.912 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:19:33.391 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:19:33.435 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:19:33.438 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:33.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:33.440 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:19:33.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:33.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:33.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:33.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:33.469 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:33.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:33.469 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:33.469 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:33.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:33.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:33.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:33.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:33.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:33.863 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:19:33.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:33.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:33.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:33.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:34.334 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:19:34.805 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:19:34.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:34.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:34.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:34.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:35.278 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:19:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:35.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:35.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:35.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:35.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:35.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:35.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:35.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:35.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:35.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:35.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:35.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:35.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:35.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:35.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:35.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:35.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:35.751 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:19:35.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:35.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:35.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:35.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:36.223 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:19:36.695 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:19:36.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:36.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:36.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:36.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:37.169 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:19:37.641 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:19:37.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:37.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:37.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:37.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:37.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:37.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:37.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:37.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:37.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:37.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:37.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:37.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:37.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:37.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:37.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:37.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:37.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:37.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:37.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:37.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:37.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:38.112 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:19:38.585 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:19:39.058 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:19:39.530 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:19:39.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:39.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:39.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:39.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:39.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:39.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:39.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:39.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:39.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:19:39.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:19:39.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:19:39.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:19:39.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:19:39.944 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:19:39.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:19:39.944 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:39.944 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:39.944 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:39.944 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:39.944 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:39.944 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:39.944 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:39.944 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:44.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:19:44.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:19:44.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:19:44.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:19:44.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:19:44.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:19:44.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:19:44.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:19:44.956 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:44.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:19:44.957 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:19:44.960 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:19:44.960 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:19:44.961 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:19:44.961 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:44.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:19:44.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:19:44.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:19:44.963 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:19:44.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:44.965 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:19:44.965 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:19:44.966 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:19:44.966 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:44.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:19:44.966 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:19:44.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:19:44.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:19:44.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:44.969 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:19:44.969 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:19:44.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:19:44.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:44.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:19:44.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:19:44.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:19:44.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:19:44.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:44.975 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:19:44.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:19:44.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:19:44.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:19:44.975 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:19:44.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:44.976 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:19:44.976 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:19:44.976 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:19:44.976 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:44.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:44.981 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:19:45.460 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:19:45.511 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:19:45.514 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:45.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:45.517 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:19:45.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:45.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:45.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:45.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:45.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:45.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:45.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:45.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:45.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:45.556 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:19:45.557 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:19:45.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:45.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:45.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:19:45.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:45.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:45.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:45.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:46.404 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:19:46.878 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:19:46.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:46.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:46.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:46.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:47.350 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:19:47.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:47.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:47.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:47.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:47.666 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:19:47.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:47.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:47.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:47.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:47.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:47.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:47.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:47.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:47.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:47.735 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:19:47.735 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:19:47.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:47.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:47.823 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:19:47.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:47.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:47.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:47.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:48.296 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:19:48.769 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:19:48.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:48.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:48.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:48.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:49.239 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:19:49.713 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:19:49.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:49.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:49.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:49.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:49.831 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:19:49.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:49.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:49.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:49.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:49.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:19:49.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:19:49.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:19:49.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:19:49.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:19:49.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:19:49.843 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:19:49.843 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:49.843 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:49.843 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:49.843 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:49.843 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:49.843 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:19:54.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:19:54.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:19:54.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:19:54.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:19:54.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:19:54.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:19:54.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:19:54.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:19:54.853 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:54.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:19:54.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:19:54.857 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:19:54.857 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:19:54.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:19:54.858 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:54.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:19:54.858 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:19:54.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:19:54.859 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:19:54.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:54.860 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:19:54.860 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:19:54.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:19:54.860 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:54.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:19:54.861 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:19:54.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:19:54.861 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:19:54.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:54.863 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:19:54.863 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:19:54.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:19:54.863 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:19:54.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:19:54.863 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:19:54.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:19:54.864 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:19:54.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:54.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:19:54.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:19:54.866 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:19:54.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:19:54.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:19:54.871 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:19:55.350 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:19:55.390 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:19:55.390 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:19:55.390 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:19:55.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:55.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:55.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:55.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:55.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:55.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:55.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:55.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:55.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:55.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:55.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:55.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:55.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:55.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:55.822 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:19:55.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:55.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:55.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:55.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:56.293 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:19:56.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:19:56.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:56.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:56.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:56.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:57.239 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:19:57.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:57.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:57.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:57.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:57.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:57.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:57.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:57.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:57.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:57.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:57.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:57.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:57.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:57.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:57.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:57.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:57.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:57.711 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:19:57.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:57.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:57.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:57.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:58.182 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:19:58.656 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:19:58.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:58.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:58.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:58.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:19:59.128 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:19:59.601 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:19:59.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:59.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:59.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:59.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:59.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:19:59.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:19:59.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:19:59.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:59.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:59.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:59.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:19:59.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:19:59.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:19:59.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:19:59.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:19:59.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:59.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:19:59.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:19:59.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:19:59.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:19:59.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:00.073 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:20:00.546 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:20:01.019 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:20:01.490 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:20:01.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:01.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:01.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:01.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:01.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:01.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:01.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:01.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:01.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:01.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:01.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:01.903 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:20:01.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:01.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:01.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:01.904 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:01.904 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:01.904 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:01.904 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:01.904 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:01.904 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:06.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:06.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:06.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:06.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:06.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:06.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:06.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:06.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:06.919 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:06.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:06.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:20:06.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:20:06.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:20:06.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:06.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:06.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:06.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:20:06.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:06.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:20:06.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:06.923 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:20:06.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:20:06.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:06.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:06.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:06.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:20:06.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:06.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:20:06.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:06.925 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:20:06.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:20:06.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:06.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:06.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:06.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:20:06.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:06.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:20:06.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:20:06.928 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:20:06.928 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:20:06.928 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:06.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:06.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:06.933 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:20:07.411 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:20:07.457 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:20:07.459 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:20:07.462 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:20:07.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:07.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:07.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:07.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:07.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:07.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:07.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:07.496 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:07.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:07.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:07.512 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:20:07.512 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:20:07.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:07.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:07.881 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:20:07.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:07.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:07.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:07.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:08.354 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:20:08.826 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:20:08.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:08.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:08.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:08.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:09.299 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:20:09.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:09.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:09.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:09.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:09.617 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:20:09.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:09.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:09.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:09.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:09.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:09.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:09.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:09.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:09.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:09.677 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:20:09.677 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:20:09.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:09.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:09.772 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:20:09.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:09.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:09.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:09.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:10.244 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:20:10.717 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:20:10.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:10.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:10.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:10.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:11.190 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:20:11.663 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:20:11.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:11.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:11.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:11.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:11.805 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:20:11.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:11.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:11.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:11.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:11.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:11.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:11.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:11.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:11.813 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:20:11.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:11.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:16.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:16.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:16.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:16.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:16.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:16.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:16.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:16.827 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:16.827 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:16.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:16.828 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:20:16.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:20:16.833 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:20:16.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:16.833 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:16.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:16.834 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:20:16.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:16.834 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:20:16.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:16.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:20:16.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:20:16.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:16.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:16.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:16.837 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:20:16.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:16.837 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:20:16.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:16.839 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:20:16.839 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:20:16.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:16.839 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:16.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:16.840 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:20:16.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:16.840 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:20:16.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:16.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:20:16.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:20:16.844 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:20:16.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:16.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:16.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:16.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:20:17.322 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:20:17.372 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:20:17.375 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:20:17.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:17.377 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:20:17.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:17.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:17.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:17.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:17.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:17.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:17.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:17.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:17.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:17.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:17.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:17.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:17.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:17.789 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:20:17.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:17.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:17.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:17.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:18.257 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:20:18.726 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:20:18.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:18.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:18.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:18.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:19.194 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:20:19.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:19.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:19.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:19.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:19.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:19.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:19.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:19.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:19.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:19.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:19.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:19.585 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:20:19.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:19.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:19.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:19.585 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:19.585 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:19.585 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:19.585 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:19.586 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:19.586 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:24.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:24.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:24.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:24.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:24.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:24.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:24.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:24.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:24.600 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:24.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:24.600 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:20:24.602 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:20:24.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:20:24.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:24.603 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:24.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:24.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:20:24.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:24.604 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:20:24.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:24.605 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:20:24.605 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:20:24.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:24.605 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:24.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:24.605 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:20:24.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:24.605 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:20:24.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:24.607 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:20:24.607 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:20:24.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:24.607 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:24.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:24.607 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:20:24.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:24.607 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:20:24.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:20:24.610 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:20:24.610 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:20:24.610 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:24.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:24.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:24.615 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:20:25.088 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:20:25.139 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:20:25.141 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:20:25.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:25.142 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:20:25.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:25.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:25.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:25.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:25.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:25.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:25.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:25.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:25.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:25.181 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:20:25.181 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:20:25.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:25.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:25.553 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:20:25.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:25.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:25.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:25.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:26.020 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:20:26.489 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:20:26.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:26.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:26.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:26.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:26.956 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:20:27.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:27.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:27.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:27.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:27.338 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:20:27.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:27.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:27.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:27.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:27.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:27.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:27.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:27.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:27.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:27.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:27.342 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:20:32.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:32.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:32.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:32.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:32.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:32.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:32.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:32.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:32.348 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:32.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:32.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:20:32.349 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:20:32.349 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:20:32.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:32.349 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:32.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:32.350 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:20:32.350 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:32.350 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:20:32.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:32.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:20:32.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:20:32.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:32.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:32.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:32.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:20:32.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:32.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:20:32.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:32.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:20:32.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:20:32.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:32.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:32.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:32.352 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:20:32.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:32.352 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:20:32.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:20:32.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:20:32.354 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:20:32.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:32.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:32.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:32.359 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:20:32.833 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:20:32.876 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:20:32.876 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:20:32.876 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:20:32.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:32.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:32.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:32.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:32.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:32.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:32.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:32.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:32.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:32.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:32.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:32.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:32.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:32.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:33.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:33.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:33.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:33.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:33.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:33.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:33.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:33.301 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:20:33.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:33.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:33.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:33.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:33.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:33.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:33.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:33.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:33.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:33.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:33.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:33.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:33.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:33.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:33.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:33.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:33.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:33.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:33.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:33.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:33.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:33.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:33.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:33.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:33.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:33.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:33.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:33.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:33.729 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:20:33.729 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=298 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=298 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=298 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=298 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=299 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=299 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=299 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=299 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=299 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=299 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=299 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:33.730 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=299 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:38.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:38.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:38.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:38.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:38.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:38.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:38.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:38.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:38.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:38.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:38.735 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:20:38.736 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:20:38.736 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:20:38.736 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:38.736 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:38.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:38.736 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:20:38.736 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:38.736 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:20:38.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:38.737 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:20:38.737 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:20:38.737 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:38.737 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:38.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:38.737 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:20:38.737 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:38.737 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:20:38.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:38.738 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:20:38.738 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:20:38.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:38.739 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:38.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:38.739 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:20:38.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:38.739 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:20:38.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:38.740 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:20:38.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:20:38.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:20:38.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:20:38.741 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:20:38.741 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:20:38.741 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:38.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:38.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:38.746 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:20:39.220 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:20:39.262 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:20:39.263 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:20:39.264 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:20:39.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:39.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:39.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:39.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:39.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:39.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:39.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:39.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:39.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:39.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:39.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:39.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:39.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:39.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:39.690 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:20:39.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:39.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:39.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:39.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:39.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:39.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:39.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:39.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:39.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:39.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:39.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:39.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:39.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:39.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:39.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:39.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:39.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:39.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:39.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:39.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:39.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:40.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:40.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:40.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:40.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:40.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:40.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:40.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:40.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:40.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:40.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:40.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:40.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:40.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:40.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:40.093 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:20:45.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:45.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:45.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:45.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:45.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:45.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:45.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:45.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:45.111 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:45.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:45.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:20:45.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:20:45.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:20:45.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:45.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:45.115 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:20:45.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:45.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:45.115 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:20:45.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:45.118 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:20:45.118 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:20:45.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:45.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:45.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:45.119 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:20:45.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:45.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:20:45.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:45.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:20:45.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:20:45.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:45.121 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:45.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:45.121 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:20:45.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:45.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:20:45.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:45.124 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:20:45.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:20:45.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:20:45.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:20:45.124 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:20:45.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:20:45.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:20:45.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:20:45.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:20:45.125 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:20:45.125 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:45.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:45.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:45.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:45.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:45.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:45.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:45.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:45.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:45.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:45.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:45.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:20:45.608 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:20:45.653 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:20:45.655 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:20:45.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:45.656 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:20:45.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:45.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:45.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:45.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:45.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:45.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:45.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:45.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:45.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:45.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:45.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:45.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:45.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:46.081 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:20:46.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:46.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:46.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:46.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:46.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:46.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:46.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:46.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:46.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:46.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:46.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:46.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:46.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:46.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:46.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:46.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:46.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:46.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:46.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:46.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:46.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:46.551 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:20:46.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:46.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:46.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:46.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:46.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:46.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:46.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:46.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:46.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:46.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:46.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:46.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:46.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:46.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:46.603 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:20:51.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:51.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:51.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:51.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:51.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:51.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:51.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:51.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:51.616 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:51.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:20:51.617 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:20:51.620 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:20:51.620 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:20:51.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:51.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:51.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:51.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:20:51.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:20:51.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:20:51.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:51.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:20:51.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:20:51.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:51.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:51.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:51.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:20:51.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:20:51.625 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:20:51.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:51.629 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:20:51.629 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:20:51.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:51.629 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:20:51.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:51.630 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:20:51.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:20:51.630 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:20:51.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:51.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:20:51.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:20:51.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:20:51.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:20:51.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:51.636 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:20:51.636 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:20:51.636 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:20:51.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:20:51.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:51.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:51.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:51.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:20:51.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:51.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:51.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:51.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:51.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:51.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:20:51.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:20:51.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:20:51.641 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:20:52.118 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:20:52.170 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:20:52.172 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:20:52.174 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:20:52.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:52.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:52.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:52.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:20:52.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:52.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:20:52.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:20:52.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:20:52.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:20:52.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:20:52.266 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:20:52.266 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:20:52.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:52.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:20:52.591 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:20:52.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:52.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:52.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:52.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:53.062 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:20:53.535 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:20:53.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:53.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:53.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:53.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:54.008 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:20:54.481 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:20:54.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:54.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:54.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:54.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:54.955 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:20:55.428 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:20:55.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:55.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:55.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:55.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:55.899 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:20:56.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:20:56.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:20:56.272 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:20:56.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:20:56.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:20:56.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:20:56.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:20:56.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:20:56.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:20:56.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:20:56.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:20:56.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:20:56.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:20:56.281 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:20:56.281 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1002 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:56.281 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1002 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:56.281 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1003 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:56.281 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1003 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:56.281 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1003 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:56.282 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1003 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:56.282 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1003 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:56.282 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1003 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:56.282 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1003 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:20:56.282 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1003 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:01.283 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:01.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:01.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:01.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:01.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:01.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:01.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:01.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:01.293 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:01.294 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:01.294 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:21:01.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:21:01.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:21:01.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:01.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:01.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:01.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:21:01.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:01.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:21:01.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:01.300 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:21:01.301 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:21:01.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:01.301 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:01.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:01.301 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:21:01.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:01.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:21:01.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:01.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:21:01.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:21:01.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:01.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:01.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:01.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:21:01.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:01.303 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:21:01.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:21:01.306 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:21:01.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:21:01.307 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:21:01.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:01.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:01.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:01.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:01.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:01.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:01.311 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:21:01.790 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:21:01.831 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:21:01.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:01.834 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:21:01.835 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:21:01.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:01.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:01.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:01.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:01.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:01.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:01.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:01.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:01.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:01.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:01.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:01.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:01.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:02.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:02.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:02.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:02.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:02.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:02.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:02.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:02.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:02.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:02.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:02.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:02.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:02.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:02.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:02.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:02.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:02.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:02.259 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:21:02.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:02.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:02.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:02.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:02.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:02.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:02.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:02.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:02.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:02.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:02.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:02.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:02.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:02.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:02.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:02.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:02.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:02.441 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:21:02.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:02.442 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:02.442 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:02.442 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:02.442 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:02.442 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:02.442 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:02.443 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=246 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:07.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:07.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:07.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:07.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:07.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:07.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:07.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:07.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:07.453 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:07.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:07.454 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:21:07.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:21:07.458 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:21:07.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:07.458 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:07.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:07.459 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:21:07.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:07.459 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:21:07.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:07.463 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:21:07.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:21:07.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:07.463 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:07.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:07.464 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:21:07.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:07.464 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:21:07.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:07.467 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:21:07.467 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:21:07.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:07.468 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:07.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:07.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:21:07.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:07.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:21:07.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:07.473 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:07.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:07.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:07.475 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:21:07.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:21:07.475 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:21:07.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:21:07.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:07.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:07.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:07.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:07.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:07.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:07.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:07.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:07.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:07.480 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:21:07.959 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:21:08.011 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:21:08.014 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:21:08.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:08.015 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:21:08.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:08.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:08.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:08.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:08.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:08.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:08.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:08.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:08.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:08.107 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:21:08.107 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:21:08.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:08.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:08.431 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:21:08.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:08.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:08.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:08.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:08.904 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:21:09.377 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:21:09.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:09.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:09.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:09.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:09.850 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:21:10.323 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:21:10.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:10.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:10.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:10.796 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:21:11.269 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:21:11.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:11.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:11.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:11.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:11.742 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:21:12.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:12.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:12.112 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:21:12.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:12.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:12.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:12.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:12.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:12.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:12.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:12.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:12.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:12.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:12.119 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:21:12.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1002 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:12.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1002 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:12.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1002 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:12.119 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1002 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:17.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:17.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:17.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:17.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:17.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:17.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:17.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:17.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:17.135 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:17.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:17.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:21:17.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:21:17.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:21:17.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:17.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:17.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:17.143 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:21:17.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:17.144 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:21:17.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:17.147 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:21:17.147 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:21:17.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:17.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:17.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:17.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:21:17.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:17.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:21:17.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:17.151 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:21:17.151 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:21:17.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:17.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:17.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:17.152 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:21:17.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:17.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:21:17.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:17.156 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:21:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:21:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:21:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:21:17.156 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:21:17.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:21:17.157 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:21:17.157 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:21:17.157 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:17.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:17.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:17.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:17.162 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:21:17.640 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:21:17.690 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:21:17.693 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:21:17.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:17.696 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:21:17.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:17.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:17.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:17.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:17.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:17.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:17.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:17.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:17.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:17.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:17.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:17.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:17.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:18.113 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:21:18.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:18.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:18.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:18.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:18.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:18.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:18.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:18.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:18.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:18.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:18.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:18.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:18.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:18.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:18.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:18.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:18.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:18.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:18.521 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:21:18.521 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:18.521 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:18.521 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:18.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:18.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:18.522 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:23.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:23.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:23.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:23.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:23.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:23.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:23.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:23.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:23.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:23.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:23.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:21:23.525 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:21:23.525 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:21:23.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:23.526 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:23.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:23.526 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:21:23.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:23.526 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:21:23.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:23.527 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:21:23.527 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:21:23.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:23.527 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:23.528 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:21:23.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:23.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:23.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:21:23.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:23.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:21:23.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:21:23.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:23.530 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:23.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:23.530 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:21:23.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:23.530 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:21:23.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:21:23.533 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:21:23.533 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:21:23.533 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:23.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:23.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:23.538 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:21:24.016 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:21:24.064 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:21:24.066 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:21:24.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:24.068 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:21:24.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:24.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:24.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:24.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:24.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:24.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:24.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:24.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:24.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:24.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:24.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:24.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:24.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:24.489 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:21:24.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:24.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:24.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:24.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:24.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:24.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:24.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:24.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:24.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:24.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:24.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:24.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:24.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:24.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:24.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:24.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:24.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:24.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:24.900 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:21:24.900 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.900 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.900 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.900 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.900 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.901 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.901 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.901 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.901 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.901 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.901 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.901 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:24.901 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:29.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:29.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:29.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:29.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:29.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:29.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:29.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:29.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:29.904 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:29.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:29.905 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:21:29.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:21:29.905 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:21:29.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:29.906 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:29.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:29.906 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:21:29.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:29.906 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:21:29.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:29.906 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:21:29.906 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:21:29.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:29.906 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:29.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:29.906 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:21:29.907 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:29.907 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:21:29.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:29.907 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:21:29.908 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:21:29.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:29.908 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:29.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:29.908 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:21:29.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:29.908 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:21:29.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:29.909 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:21:29.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:21:29.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:21:29.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:21:29.909 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:21:29.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:21:29.910 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:21:29.910 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:21:29.910 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:29.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:29.914 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:21:30.392 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:21:30.439 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:21:30.441 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:21:30.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:30.445 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:21:30.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:30.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:30.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:30.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:30.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:30.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:30.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:30.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:30.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:30.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:30.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:30.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:30.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:30.865 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:21:30.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:30.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:30.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:30.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:31.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:31.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:31.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:31.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:31.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:31.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:31.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:31.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:31.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:31.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:31.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:31.274 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:21:31.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:31.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:31.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:31.274 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:31.274 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:31.275 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:31.275 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:31.275 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:31.275 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:31.275 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:36.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:36.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:36.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:36.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:36.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:36.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:36.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:36.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:36.286 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:36.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:36.286 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:21:36.291 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:21:36.291 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:21:36.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:36.291 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:36.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:36.292 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:21:36.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:36.292 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:21:36.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:36.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:21:36.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:21:36.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:36.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:36.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:36.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:21:36.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:36.296 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:21:36.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:36.300 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:21:36.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:21:36.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:36.300 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:36.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:36.300 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:21:36.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:36.300 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:21:36.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:36.305 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:21:36.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:21:36.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:36.306 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:21:36.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:21:36.307 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:21:36.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:21:36.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:36.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:36.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:36.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:21:36.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:36.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:36.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:36.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:36.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:36.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:36.312 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:21:36.789 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:21:36.840 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:21:36.843 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:21:36.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:36.845 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:21:36.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:36.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:36.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:36.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:36.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:36.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:36.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:36.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:36.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:36.937 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:21:36.937 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:21:36.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:36.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:37.260 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:21:37.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:37.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:37.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:37.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:37.732 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:21:37.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:37.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:37.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:37.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:37.789 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:21:37.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:37.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:37.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:37.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:37.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:37.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:37.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:37.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:37.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:37.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:37.801 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:21:42.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:42.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:42.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:42.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:42.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:42.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:42.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:42.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:42.813 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:42.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:42.813 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:21:42.816 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:21:42.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:21:42.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:42.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:42.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:42.818 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:21:42.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:42.818 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:21:42.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:42.820 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:21:42.820 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:21:42.820 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:42.820 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:42.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:42.821 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:21:42.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:42.821 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:21:42.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:42.822 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:21:42.823 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:21:42.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:42.823 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:42.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:42.823 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:21:42.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:42.823 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:21:42.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:42.826 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:21:42.826 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:21:42.826 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:21:42.827 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:42.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:42.831 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:21:43.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:21:43.354 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:21:43.357 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:21:43.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:43.360 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:21:43.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:43.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:43.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:43.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:43.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:43.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:43.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:43.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:43.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:43.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:43.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:43.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:43.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:43.782 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:21:43.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:43.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:43.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:43.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:44.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:44.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:44.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:44.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:44.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:44.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:44.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:44.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:44.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:44.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:44.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:44.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:44.190 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:21:44.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:44.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:49.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:49.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:49.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:49.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:49.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:49.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:49.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:49.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:49.204 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:49.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:49.204 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:21:49.208 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:21:49.208 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:21:49.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:49.208 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:49.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:49.209 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:21:49.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:49.209 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:21:49.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:49.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:21:49.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:21:49.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:49.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:49.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:49.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:21:49.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:49.214 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:21:49.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:49.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:21:49.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:21:49.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:49.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:49.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:49.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:21:49.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:49.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:21:49.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:49.223 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:21:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:21:49.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:49.224 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:21:49.224 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:21:49.225 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:21:49.225 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:21:49.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:49.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:49.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:49.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:21:49.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:49.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:49.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:49.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:49.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:49.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:49.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:49.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:49.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:49.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:49.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:49.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:49.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:49.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:49.229 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:21:49.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:21:49.759 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:21:49.761 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:21:49.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:49.763 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:21:49.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:49.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:49.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:49.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:49.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:49.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:49.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:49.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:49.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:49.854 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:21:49.854 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:21:49.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:49.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:50.179 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:21:50.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:50.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:50.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:50.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:50.644 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:21:50.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:50.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:50.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:50.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:50.703 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:21:50.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:50.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:50.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:50.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:50.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:50.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:50.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:50.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:50.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:50.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:50.716 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:21:50.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:50.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:50.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:50.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:50.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:50.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:55.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:55.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:55.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:55.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:55.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:55.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:55.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:55.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:55.729 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:55.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:21:55.729 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:21:55.731 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:21:55.731 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:21:55.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:55.732 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:55.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:55.732 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:21:55.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:21:55.732 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:21:55.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:55.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:21:55.734 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:21:55.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:55.734 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:55.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:55.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:21:55.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:21:55.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:21:55.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:55.736 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:21:55.736 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:21:55.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:55.736 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:21:55.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:55.736 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:21:55.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:21:55.736 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:21:55.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:55.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:21:55.740 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:21:55.740 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:21:55.740 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:55.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:21:55.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:55.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:55.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:55.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:55.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:21:55.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:21:55.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:21:55.744 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:21:56.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:21:56.268 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:21:56.271 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:21:56.273 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:21:56.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:56.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:56.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:56.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:56.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:56.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:56.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:56.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:56.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:56.694 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:21:56.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:56.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:56.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:56.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:57.166 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:21:57.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:57.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:21:57.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:57.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:57.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:57.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:57.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:21:57.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:21:57.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:21:57.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:21:57.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:21:57.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:21:57.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:21:57.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:57.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:57.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:57.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:58.111 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:21:58.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 05:21:58.583 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:21:58.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 05:21:58.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:21:58.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:21:58.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:21:58.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:21:58.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:21:58.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:21:58.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:21:58.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:21:58.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:21:58.635 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:21:58.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:21:58.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:21:58.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:21:58.635 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:58.635 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:58.635 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:58.635 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:58.635 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:58.635 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:21:58.635 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:03.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:22:03.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:22:03.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:03.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:03.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:03.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:03.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:03.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:22:03.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:03.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:22:03.643 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:22:03.644 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:22:03.644 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:22:03.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:22:03.644 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:03.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:03.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:22:03.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:22:03.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:22:03.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:03.645 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:22:03.645 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:22:03.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:22:03.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:03.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:03.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:22:03.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:22:03.646 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:22:03.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:03.647 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:22:03.647 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:22:03.647 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:22:03.647 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:03.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:03.647 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:22:03.647 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:22:03.647 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:22:03.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:22:03.649 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:22:03.649 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:22:03.649 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:03.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:03.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:03.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:03.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:03.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:03.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:03.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:03.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:03.654 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:22:04.132 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:22:04.178 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:22:04.180 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:22:04.180 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:22:04.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:22:04.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:22:04.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:22:04.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:22:04.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:04.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:22:04.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:22:04.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:22:04.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:22:04.604 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:22:04.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:04.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:04.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:04.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:05.075 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:22:05.549 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:22:05.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:05.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:05.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:05.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:06.021 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:22:06.493 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:22:06.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:06.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:06.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:06.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:06.964 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:22:07.437 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:22:07.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:07.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:07.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:07.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:07.910 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:22:08.381 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:22:08.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:08.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:08.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:08.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:08.853 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:22:09.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 05:22:09.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:22:09.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:22:09.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:09.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:09.326 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:22:09.798 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:22:10.265 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:22:10.729 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:22:11.202 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:22:11.674 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:22:12.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:22:12.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:22:12.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:12.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:12.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:12.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:12.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:12.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:12.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:12.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:12.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:22:12.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:22:12.082 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:22:17.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:22:17.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:22:17.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:17.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:17.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:17.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:17.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:17.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:22:17.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:17.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:22:17.101 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:22:17.104 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:22:17.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:22:17.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:22:17.105 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:17.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:17.106 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:22:17.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:22:17.106 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:22:17.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:17.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:22:17.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:22:17.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:22:17.108 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:17.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:17.108 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:22:17.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:22:17.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:22:17.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:17.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:22:17.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:22:17.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:22:17.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:17.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:17.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:22:17.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:22:17.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:22:17.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:17.114 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:22:17.114 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:22:17.114 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:22:17.114 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:17.119 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:22:17.597 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:22:17.642 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:22:17.645 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:22:17.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:22:17.647 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:22:17.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:22:17.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:22:17.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:22:17.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:17.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:22:17.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:22:17.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:22:17.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:22:18.069 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:22:18.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:18.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:18.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:18.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:18.541 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:22:19.014 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:22:19.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:19.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:19.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:19.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:19.486 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:22:19.958 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:22:20.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:20.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:20.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:20.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:20.429 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:22:20.903 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:22:21.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:21.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:21.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:21.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:21.375 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:22:21.847 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:22:22.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:22.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:22.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:22.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:22.318 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:22:22.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 05:22:22.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:22:22.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:22:22.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:22.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:22.792 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:22:23.264 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:22:23.736 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:22:24.209 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:22:24.682 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:22:25.154 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:22:25.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:22:25.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:22:25.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:25.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:25.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:25.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:25.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:25.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:25.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:25.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:25.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:22:25.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:22:25.551 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:22:25.551 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:25.551 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:25.551 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:25.551 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:25.551 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:25.551 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:30.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:22:30.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:22:30.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:30.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:30.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:30.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:30.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:30.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:22:30.558 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:30.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:22:30.558 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:22:30.559 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:22:30.559 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:22:30.559 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:22:30.559 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:30.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:30.559 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:22:30.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:22:30.560 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:22:30.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:30.560 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:22:30.560 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:22:30.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:22:30.560 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:30.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:30.560 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:22:30.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:22:30.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:22:30.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:30.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:22:30.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:22:30.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:22:30.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:30.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:30.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:22:30.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:22:30.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:22:30.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:22:30.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:22:30.564 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:22:30.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:30.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:30.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:30.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:30.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:22:31.045 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:22:31.096 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:22:31.098 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:22:31.100 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:22:31.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:22:31.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:22:31.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:22:31.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:22:31.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:31.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:22:31.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:22:31.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:22:31.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:22:31.517 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:22:31.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:31.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:31.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:31.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:31.988 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:22:32.462 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:22:32.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:32.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:32.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:32.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:32.934 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:22:33.406 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:22:33.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:33.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:33.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:33.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:33.877 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:22:34.350 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:22:34.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:34.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:34.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:34.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:34.822 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:22:35.294 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:22:35.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:35.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:35.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:35.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:35.765 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:22:36.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 05:22:36.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:22:36.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:22:36.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:36.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:36.239 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:22:36.711 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:22:37.183 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:22:37.656 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:22:38.129 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:22:38.598 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:22:38.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:22:38.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:22:39.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:39.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:39.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:39.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:39.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:39.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:39.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:39.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:39.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:22:39.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:22:39.003 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:22:44.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:22:44.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:22:44.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:44.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:44.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:44.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:44.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:44.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:22:44.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:44.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:22:44.017 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:22:44.019 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:22:44.019 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:22:44.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:22:44.020 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:44.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:44.020 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:22:44.020 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:22:44.020 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:22:44.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:44.023 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:22:44.023 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:22:44.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:22:44.024 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:44.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:44.024 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:22:44.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:22:44.024 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:22:44.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:44.029 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:22:44.029 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:22:44.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:22:44.029 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:44.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:44.029 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:22:44.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:22:44.029 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:22:44.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:44.035 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:22:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:22:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:22:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:22:44.035 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:22:44.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:44.036 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:22:44.036 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:22:44.036 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:22:44.036 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:44.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:44.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:44.041 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:22:44.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:22:44.572 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:22:44.574 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:22:44.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:22:44.576 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:22:44.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:22:44.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:22:44.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:22:44.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:44.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:22:44.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:22:44.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:22:44.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:22:44.991 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:22:45.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:45.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:45.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:45.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:45.462 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:22:45.935 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:22:46.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:46.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:46.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:46.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:46.408 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:22:46.879 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:22:47.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:47.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:47.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:47.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:47.350 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:22:47.824 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:22:48.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:48.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:48.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:48.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:48.296 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:22:48.769 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:22:49.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:49.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:49.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:49.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:49.240 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:22:49.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 05:22:49.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:22:49.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:22:49.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:49.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:49.714 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:22:50.186 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:22:50.659 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:22:51.125 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:22:51.589 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:22:52.053 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:22:52.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:22:52.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:22:52.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:52.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:52.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:52.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:52.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:52.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:22:52.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:22:52.484 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:22:52.484 [WARNING] transceiver.py:257 (TRX1@172.18.173.20:5700/1) RX TRXD message (ver=1 fn=1830 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-04-19 05:22:52.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:52.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:52.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:52.484 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1830 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:52.484 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1830 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:52.484 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1830 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:52.484 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1830 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:52.484 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1830 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:52.484 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1830 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:22:57.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:22:57.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:22:57.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:57.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:57.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:57.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:57.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:22:57.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:22:57.513 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:57.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:22:57.513 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:22:57.516 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:22:57.516 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:22:57.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:22:57.516 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:57.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:22:57.516 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:22:57.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:22:57.516 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:22:57.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:57.518 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:22:57.518 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:22:57.518 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:22:57.518 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:57.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:22:57.519 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:22:57.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:22:57.519 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:22:57.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:57.520 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:22:57.520 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:22:57.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:22:57.521 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:22:57.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:22:57.521 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:22:57.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:22:57.521 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:22:57.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:22:57.523 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:22:57.523 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:22:57.523 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:57.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:22:57.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:22:57.528 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:22:58.006 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:22:58.051 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:22:58.054 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:22:58.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:22:58.056 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:22:58.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:22:58.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:22:58.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:22:58.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:22:58.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:22:58.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:22:58.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:22:58.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:22:58.479 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:22:58.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:58.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:58.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:58.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:58.950 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:22:59.423 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:22:59.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:22:59.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:22:59.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:22:59.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:22:59.895 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:23:00.368 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:23:00.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:00.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:00.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:00.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:00.841 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:23:01.313 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:23:01.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:01.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:01.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:01.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:01.785 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:23:02.256 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:23:02.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:02.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:02.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:02.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:02.730 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:23:02.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD NOHANDOVER
2026-04-19 05:23:02.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:23:02.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:23:02.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:23:02.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:23:03.202 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:23:03.674 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:23:04.148 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:23:04.620 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:23:05.092 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:23:05.565 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:23:05.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:23:05.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:23:05.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:05.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:05.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:05.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:05.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:05.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:05.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:05.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:05.958 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:23:05.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:05.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:10.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:10.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:10.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:10.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:10.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:10.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:10.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:10.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:23:10.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:10.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:23:10.972 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:23:10.975 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:23:10.975 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:23:10.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:23:10.976 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:10.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:10.976 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:23:10.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:23:10.977 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:23:10.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:10.979 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:23:10.979 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:23:10.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:23:10.979 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:10.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:10.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:23:10.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:23:10.980 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:23:10.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:10.981 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:23:10.981 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:23:10.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:23:10.981 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:10.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:10.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:23:10.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:23:10.982 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:23:10.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:10.984 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:23:10.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:23:10.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:23:10.985 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:23:10.985 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:23:10.985 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:10.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:10.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:10.990 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:23:11.468 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:23:11.514 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:23:11.516 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:23:11.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:23:11.518 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:23:11.940 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:23:11.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:11.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:11.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:11.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:12.416 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:23:12.888 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:23:12.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:12.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:12.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:12.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:13.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:23:13.835 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:23:13.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:13.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:13.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:13.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:14.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:23:14.781 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:23:14.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:14.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:14.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:14.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:15.253 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:23:15.728 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:23:15.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:15.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:15.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:15.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:16.200 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:23:16.674 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:23:17.146 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:23:17.617 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:23:18.081 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:23:18.544 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:23:19.017 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:23:19.489 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:23:19.963 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:23:20.435 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:23:20.909 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:23:21.376 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:23:21.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:21.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:21.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:21.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:21.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:21.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:21.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:21.534 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:23:21.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:21.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:21.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:21.534 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2281 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:23:21.534 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2281 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:23:21.534 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:23:21.534 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:23:21.534 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:23:21.534 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:23:26.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:26.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:26.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:26.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:26.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:26.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:26.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:26.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:23:26.546 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:26.547 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:23:26.547 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:23:26.550 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:23:26.551 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:23:26.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:23:26.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:26.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:26.552 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:23:26.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:23:26.553 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:23:26.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:26.555 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:23:26.555 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:23:26.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:23:26.555 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:26.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:26.556 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:23:26.556 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:23:26.556 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:23:26.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:26.558 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:23:26.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:23:26.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:23:26.558 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:26.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:26.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:23:26.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:23:26.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:23:26.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:26.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:26.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:26.563 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:23:26.563 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:23:26.563 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:23:26.563 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:23:26.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:26.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:26.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:26.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:23:26.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:26.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:26.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:26.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:26.564 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:23:26.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:31.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:31.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:31.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:31.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:31.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:31.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:31.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:31.581 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:23:31.581 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:31.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:23:31.582 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:23:31.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:23:31.587 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:23:31.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:23:31.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:31.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:31.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:23:31.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:23:31.589 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:23:31.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:31.591 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:23:31.591 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:23:31.591 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:23:31.591 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:31.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:31.592 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:23:31.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:23:31.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:23:31.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:31.594 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:23:31.594 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:23:31.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:23:31.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:31.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:31.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:23:31.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:23:31.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:23:31.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:31.598 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:23:31.598 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:23:31.598 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:23:31.598 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:31.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:31.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:31.603 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:23:32.081 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:23:32.128 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:23:32.130 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:23:32.132 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:23:32.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:23:32.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:23:32.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:23:32.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:23:32.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:23:32.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:23:32.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:23:32.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:23:32.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:23:32.553 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:23:32.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:32.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:32.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:32.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:33.024 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:23:33.498 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:23:33.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:33.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:33.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:33.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:33.970 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:23:34.442 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:23:34.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:34.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:34.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:34.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:34.913 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:23:35.387 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:23:35.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:35.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:35.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:35.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:35.859 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:23:36.331 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:23:36.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:36.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:36.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:36.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:36.802 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:23:37.273 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:23:37.746 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:23:38.218 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:23:38.690 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:23:39.161 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:23:39.635 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:23:40.107 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:23:40.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:23:40.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:23:40.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:40.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:40.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:40.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:40.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:40.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:40.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:40.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:40.183 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:23:40.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:40.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:45.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:45.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:45.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:45.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:45.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:45.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:45.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:45.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:23:45.199 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:45.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:23:45.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:23:45.202 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:23:45.202 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:23:45.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:23:45.203 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:45.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:45.204 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:23:45.204 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:23:45.204 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:23:45.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:45.206 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:23:45.206 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:23:45.206 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:23:45.206 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:45.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:45.207 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:23:45.207 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:23:45.207 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:23:45.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:45.209 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:23:45.209 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:23:45.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:23:45.210 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:45.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:45.210 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:23:45.210 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:23:45.210 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:23:45.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:45.213 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:23:45.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:23:45.214 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:23:45.214 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:23:45.214 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:45.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:45.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:23:45.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:45.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:45.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:45.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:45.216 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:23:45.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:50.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:50.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:50.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:50.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:50.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:50.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:50.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:50.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:23:50.234 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:50.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:23:50.234 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:23:50.240 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:23:50.240 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:23:50.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:23:50.241 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:50.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:50.241 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:23:50.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:23:50.242 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:23:50.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:50.246 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:23:50.246 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:23:50.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:23:50.246 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:50.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:50.247 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:23:50.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:23:50.247 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:23:50.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:50.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:23:50.250 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:23:50.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:23:50.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:23:50.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:23:50.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:23:50.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:23:50.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:23:50.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:50.255 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:23:50.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:23:50.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:23:50.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:23:50.255 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:23:50.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:23:50.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:23:50.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:23:50.256 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:23:50.256 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:23:50.256 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:50.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:50.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:23:50.261 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:23:50.738 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:23:50.788 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:23:50.792 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:23:50.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:23:50.794 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:23:50.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:23:50.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:23:50.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:23:50.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:23:50.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:23:50.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:23:50.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:23:50.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:23:51.210 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:23:51.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:51.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:51.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:51.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:51.681 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:23:52.155 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:23:52.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:52.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:52.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:52.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:52.627 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:23:53.100 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:23:53.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:53.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:53.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:53.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:53.572 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:23:54.045 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:23:54.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:54.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:54.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:54.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:54.517 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:23:54.988 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:23:55.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:55.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:55.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:55.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:55.461 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:23:55.934 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:23:56.406 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:23:56.877 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:23:57.350 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:23:57.823 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:23:58.295 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:23:58.766 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:23:58.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:23:58.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:23:58.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:23:58.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:23:58.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:23:58.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:23:58.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:23:58.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:23:58.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:23:58.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:23:58.837 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:23:58.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:23:58.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:03.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:03.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:03.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:03.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:03.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:03.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:03.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:03.852 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:03.852 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:03.852 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:03.853 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:24:03.855 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:24:03.856 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:24:03.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:03.856 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:03.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:03.857 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:24:03.857 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:03.857 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:24:03.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:03.859 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:24:03.859 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:24:03.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:03.859 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:03.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:03.859 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:24:03.860 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:03.860 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:24:03.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:03.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:24:03.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:24:03.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:03.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:03.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:03.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:24:03.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:03.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:24:03.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:03.865 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:24:03.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:24:03.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:24:03.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:24:03.865 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:24:03.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:24:03.866 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:24:03.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:03.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:03.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:03.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:03.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:03.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:03.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:03.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:03.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:03.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:03.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:03.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:03.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:03.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:03.868 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:24:08.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:08.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:08.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:08.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:08.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:08.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:08.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:08.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:08.882 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:08.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:08.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:24:08.885 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:24:08.885 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:24:08.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:08.885 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:08.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:08.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:24:08.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:08.887 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:24:08.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:08.889 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:24:08.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:24:08.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:08.890 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:08.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:08.891 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:24:08.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:08.892 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:24:08.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:08.894 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:24:08.894 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:24:08.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:08.894 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:08.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:08.895 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:24:08.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:08.895 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:24:08.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:08.900 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:24:08.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:24:08.900 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:08.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:24:08.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:24:08.901 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:24:08.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:08.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:08.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:08.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:08.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:08.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:08.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:08.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:08.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:24:09.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:24:09.434 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:24:09.437 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:24:09.437 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:24:09.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:24:09.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:24:09.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:24:09.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:24:09.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:24:09.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:24:09.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:24:09.443 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:24:09.443 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:24:09.857 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:24:09.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:09.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:09.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:09.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:10.328 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:24:10.801 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:24:10.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:10.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:10.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:10.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:11.273 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:24:11.745 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:24:11.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:11.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:11.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:11.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:12.216 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:24:12.690 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:24:12.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:12.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:12.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:12.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:13.162 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:24:13.634 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:24:13.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:13.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:13.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:13.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:14.105 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:24:14.578 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:24:15.051 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:24:15.523 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:24:15.996 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:24:16.469 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:24:16.941 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:24:17.414 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:24:17.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:24:17.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:24:17.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:17.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:17.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:17.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:17.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:17.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:17.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:17.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:17.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:17.491 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:24:17.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:17.491 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:24:17.491 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:24:17.491 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:24:17.491 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:24:17.491 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:24:17.491 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:24:17.491 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:24:22.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:22.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:22.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:22.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:22.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:22.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:22.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:22.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:22.495 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:22.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:22.495 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:24:22.496 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:24:22.496 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:24:22.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:22.496 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:22.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:22.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:24:22.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:22.497 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:24:22.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:22.497 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:24:22.497 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:24:22.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:22.497 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:22.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:22.497 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:24:22.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:22.498 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:24:22.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:22.499 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:24:22.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:24:22.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:22.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:22.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:22.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:24:22.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:22.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:24:22.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:24:22.501 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:24:22.501 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:24:22.501 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:22.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:22.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:22.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:22.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:22.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:22.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:22.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:22.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:22.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:22.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:22.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:22.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:22.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:22.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:22.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:22.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:22.503 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:24:27.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:27.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:27.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:27.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:27.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:27.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:27.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:27.517 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:27.517 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:27.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:27.518 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:24:27.521 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:24:27.522 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:24:27.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:27.522 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:27.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:27.523 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:24:27.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:27.524 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:24:27.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:27.526 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:24:27.526 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:24:27.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:27.527 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:27.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:27.527 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:24:27.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:27.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:24:27.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:27.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:24:27.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:24:27.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:27.530 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:27.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:27.530 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:24:27.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:27.530 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:24:27.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:27.533 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:24:27.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:24:27.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:24:27.534 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:24:27.534 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:24:27.534 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:27.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:27.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:27.539 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:24:28.015 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:24:28.068 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:24:28.071 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:24:28.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:24:28.073 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:24:28.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:24:28.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:24:28.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:24:28.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:24:28.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:24:28.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:24:28.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:24:28.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:24:28.488 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:24:28.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:28.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:28.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:28.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:28.959 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:24:29.432 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:24:29.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:29.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:29.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:29.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:29.904 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:24:30.376 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:24:30.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:30.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:30.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:30.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:30.847 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:24:31.321 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:24:31.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:31.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:31.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:31.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:31.793 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:24:32.264 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:24:32.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:32.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:32.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:32.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:32.735 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:24:33.209 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:24:33.681 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:24:34.153 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:24:34.625 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:24:35.098 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:24:35.570 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:24:36.042 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:24:36.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:24:36.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:24:36.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:36.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:36.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:36.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:36.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:36.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:36.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:36.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:36.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:36.113 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:24:36.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:41.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:41.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:41.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:41.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:41.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:41.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:41.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:41.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:41.126 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:41.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:41.126 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:24:41.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:24:41.129 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:24:41.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:41.129 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:41.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:41.130 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:24:41.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:41.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:24:41.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:41.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:24:41.132 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:24:41.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:41.132 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:41.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:41.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:24:41.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:41.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:24:41.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:41.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:24:41.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:24:41.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:41.135 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:41.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:41.135 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:24:41.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:41.135 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:24:41.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:24:41.138 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:24:41.138 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:24:41.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:41.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:41.140 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:41.140 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:24:41.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:46.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:24:46.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:24:46.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:46.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:46.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:46.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:46.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:24:46.155 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:46.155 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:46.156 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:24:46.156 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:24:46.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:24:46.160 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:24:46.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:46.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:46.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:24:46.161 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:24:46.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:24:46.161 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:24:46.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:46.165 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:24:46.165 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:24:46.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:46.166 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:46.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:24:46.166 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:24:46.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:24:46.166 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:24:46.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:46.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:24:46.170 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:24:46.170 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:46.170 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:24:46.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:24:46.170 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:24:46.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:24:46.171 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:24:46.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:46.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:46.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:46.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:46.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:46.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:24:46.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:24:46.177 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:24:46.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:24:46.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:46.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:46.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:46.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:46.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:46.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:46.179 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:24:46.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:46.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:46.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:46.179 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:24:46.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:46.179 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:24:46.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:24:46.182 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:24:46.660 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:24:46.705 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:24:46.708 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:24:46.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:24:46.711 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:24:46.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:24:46.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:24:46.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:24:46.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:24:46.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:24:46.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:24:46.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:24:46.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:24:47.132 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:24:47.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:47.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:47.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:47.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:47.603 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:24:48.074 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:24:48.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:48.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:48.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:48.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:48.547 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:24:49.020 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:24:49.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:49.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:49.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:49.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:49.492 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:24:49.965 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:24:50.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:50.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:50.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:50.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:50.437 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:24:50.909 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:24:51.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:24:51.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:24:51.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:24:51.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:24:51.380 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:24:51.854 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:24:52.326 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:24:52.798 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:24:53.269 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:24:53.742 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:24:54.215 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:24:54.687 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:24:55.160 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:24:55.633 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:24:56.105 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:24:56.576 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:24:57.049 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:24:57.522 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:24:57.993 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:24:58.465 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:24:58.937 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:24:59.410 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:24:59.881 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:25:00.353 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:25:00.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:25:00.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:25:00.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:00.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:00.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:00.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:00.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:00.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:00.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:00.763 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:25:00.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:00.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:00.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:00.763 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3151 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:00.763 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3151 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:00.763 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3151 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:00.763 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3151 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:00.763 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3151 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:00.763 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3151 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:00.763 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3151 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:05.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:05.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:05.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:05.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:05.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:05.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:05.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:05.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:05.776 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:05.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:05.777 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:25:05.780 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:25:05.781 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:25:05.781 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:05.781 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:05.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:05.782 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:25:05.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:05.783 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:25:05.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:05.785 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:25:05.785 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:25:05.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:05.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:05.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:05.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:25:05.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:05.786 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:25:05.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:05.788 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:25:05.788 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:25:05.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:05.788 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:05.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:05.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:25:05.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:05.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:25:05.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:05.792 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:25:05.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:25:05.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:25:05.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:25:05.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:25:05.793 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:25:05.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:05.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:05.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:25:05.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:05.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:05.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:05.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:05.795 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:25:05.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:10.802 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:10.802 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:10.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:10.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:10.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:10.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:10.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:10.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:10.811 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:10.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:10.811 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:25:10.815 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:25:10.816 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:25:10.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:10.816 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:10.816 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:25:10.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:10.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:10.816 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:25:10.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:10.821 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:25:10.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:25:10.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:10.822 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:10.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:10.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:25:10.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:10.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:25:10.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:10.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:25:10.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:25:10.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:10.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:10.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:10.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:25:10.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:10.825 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:25:10.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:25:10.829 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:25:10.830 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:25:10.830 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:25:10.830 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:10.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:10.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:10.835 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:25:11.312 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:25:11.360 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:25:11.362 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:25:11.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:25:11.364 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:25:11.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:25:11.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:25:11.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:25:11.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:25:11.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:25:11.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:25:11.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:25:11.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:25:11.784 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:25:11.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:11.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:11.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:11.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:12.255 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:25:12.728 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:25:12.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:12.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:12.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:12.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:13.201 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:25:13.673 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:25:13.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:13.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:13.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:13.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:14.144 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:25:14.617 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:25:14.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:14.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:14.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:14.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:15.089 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:25:15.561 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:25:15.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:15.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:15.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:15.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:16.032 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:25:16.506 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:25:16.978 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:25:17.450 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:25:17.921 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:25:18.394 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:25:18.867 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:25:19.339 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:25:19.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:25:19.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:25:19.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:19.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:19.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:19.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:19.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:19.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:19.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:19.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:19.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:19.409 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:25:19.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:24.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:24.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:24.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:24.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:24.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:24.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:24.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:24.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:24.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:24.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:24.427 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:25:24.432 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:25:24.432 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:25:24.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:24.433 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:24.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:24.434 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:25:24.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:24.434 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:25:24.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:24.437 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:25:24.437 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:25:24.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:24.438 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:24.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:24.439 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:25:24.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:24.439 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:25:24.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:24.441 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:25:24.441 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:25:24.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:24.442 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:24.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:24.442 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:25:24.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:24.442 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:25:24.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:24.446 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:25:24.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:25:24.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:25:24.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:25:24.446 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:25:24.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:25:24.447 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:25:24.447 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:25:24.447 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:24.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:25:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:24.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:24.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:24.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:24.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:24.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:24.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:24.450 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:25:24.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:29.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:29.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:29.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:29.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:29.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:29.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:29.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:29.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:29.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:29.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:29.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:25:29.474 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:25:29.474 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:25:29.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:29.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:29.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:29.475 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:25:29.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:29.475 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:25:29.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:29.476 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:25:29.476 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:25:29.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:29.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:29.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:29.477 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:25:29.477 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:29.477 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:25:29.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:29.478 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:25:29.478 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:25:29.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:29.478 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:29.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:29.478 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:25:29.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:29.479 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:25:29.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:29.480 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:25:29.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:25:29.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:25:29.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:25:29.480 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:25:29.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:25:29.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:25:29.481 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:25:29.481 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:29.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:29.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:29.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:29.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:29.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:29.485 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:25:29.962 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:25:30.012 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:25:30.014 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:25:30.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:25:30.016 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:25:30.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:25:30.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:25:30.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:25:30.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:25:30.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:25:30.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:25:30.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:25:30.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:25:30.434 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:25:30.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:30.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:30.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:30.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:30.905 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:25:31.379 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:25:31.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:31.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:31.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:31.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:31.851 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:25:32.323 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:25:32.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:32.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:32.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:32.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:32.794 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:25:33.268 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:25:33.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:33.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:33.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:33.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:33.740 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:25:34.212 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:25:34.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:34.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:34.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:34.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:34.683 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:25:35.156 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:25:35.629 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:25:36.101 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:25:36.574 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:25:37.046 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:25:37.518 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:25:37.992 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:25:38.464 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:25:38.936 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:25:39.409 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:25:39.881 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:25:40.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:25:40.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:25:40.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:40.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:40.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:40.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:40.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:40.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:40.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:40.068 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:25:40.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:40.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:40.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:40.068 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2286 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:40.068 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:40.068 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:40.068 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:40.068 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:40.068 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:40.068 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:25:45.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:45.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:45.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:45.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:45.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:45.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:45.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:45.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:45.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:45.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:45.079 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:25:45.081 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:25:45.081 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:25:45.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:45.081 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:45.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:45.082 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:25:45.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:45.082 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:25:45.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:45.084 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:25:45.085 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:25:45.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:45.085 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:45.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:45.085 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:25:45.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:45.085 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:25:45.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:45.087 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:25:45.087 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:25:45.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:45.087 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:45.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:45.087 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:25:45.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:45.087 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:25:45.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:45.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:25:45.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:25:45.090 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:25:45.091 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:45.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:45.092 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:25:45.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:50.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:25:50.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:25:50.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:50.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:50.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:50.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:50.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:25:50.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:50.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:50.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:25:50.100 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:25:50.102 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:25:50.102 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:25:50.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:50.102 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:50.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:25:50.102 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:25:50.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:25:50.102 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:25:50.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:50.104 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:25:50.104 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:25:50.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:50.104 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:50.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:25:50.104 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:25:50.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:25:50.104 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:25:50.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:50.106 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:25:50.106 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:25:50.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:50.106 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:25:50.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:25:50.106 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:25:50.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:25:50.106 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:25:50.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:25:50.108 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:25:50.108 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:25:50.108 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:25:50.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:50.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:25:50.113 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:25:50.586 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:25:50.621 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:25:50.622 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:25:50.622 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:25:50.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:25:50.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:25:50.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:25:50.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:25:50.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:25:50.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:25:50.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:25:50.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:25:50.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:25:51.055 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:25:51.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:51.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:51.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:51.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:51.523 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:25:51.991 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:25:52.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:52.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:52.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:52.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:52.459 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:25:52.928 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:25:53.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:53.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:53.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:53.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:53.396 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:25:53.866 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:25:54.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:54.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:54.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:54.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:54.337 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:25:54.806 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:25:55.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:25:55.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:25:55.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:25:55.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:25:55.276 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:25:55.745 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:25:56.215 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:25:56.683 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:25:57.150 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:25:57.618 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:25:58.087 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:25:58.557 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:25:59.026 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:25:59.495 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:25:59.964 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:26:00.432 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:26:00.899 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:26:01.367 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:26:01.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:26:01.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:26:01.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:01.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:01.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:01.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:01.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:01.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:01.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:01.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:01.642 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:01.642 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:01.643 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:26:01.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2510 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:26:01.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2510 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:26:01.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2510 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:26:01.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2510 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:26:01.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2510 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:26:01.643 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2510 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:26:06.640 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:06.640 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:06.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:06.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:06.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:06.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:06.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:06.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:26:06.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:06.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:26:06.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:26:06.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:26:06.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:26:06.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:26:06.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:06.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:06.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:26:06.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:26:06.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:26:06.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:06.646 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:26:06.646 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:26:06.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:26:06.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:06.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:06.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:26:06.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:26:06.646 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:26:06.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:06.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:26:06.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:26:06.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:26:06.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:06.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:06.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:26:06.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:26:06.649 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:26:06.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:06.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:26:06.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:26:06.651 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:26:06.651 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:06.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:06.652 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:06.652 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:26:06.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:11.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:11.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:11.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:11.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:11.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:11.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:11.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:11.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:26:11.669 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:11.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:26:11.670 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:26:11.673 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:26:11.674 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:26:11.674 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:26:11.674 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:11.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:11.675 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:26:11.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:26:11.675 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:26:11.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:11.677 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:26:11.677 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:26:11.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:26:11.677 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:11.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:11.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:26:11.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:26:11.677 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:26:11.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:11.679 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:26:11.679 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:26:11.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:26:11.679 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:11.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:11.679 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:26:11.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:26:11.680 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:26:11.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:11.682 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:26:11.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:26:11.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:26:11.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:26:11.682 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:26:11.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:26:11.683 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:26:11.683 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:26:11.683 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:11.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:11.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:11.688 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:26:12.165 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:26:12.212 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:26:12.214 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:26:12.217 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:26:12.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:26:12.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:26:12.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:26:12.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:26:12.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:26:12.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:26:12.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:26:12.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:26:12.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:26:12.637 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:26:12.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:12.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:12.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:12.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:13.109 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:26:13.580 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:26:13.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:13.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:13.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:13.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:14.052 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:26:14.525 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:26:14.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:14.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:14.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:14.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:14.997 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:26:15.470 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:26:15.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:15.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:15.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:15.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:15.942 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:26:16.414 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:26:16.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:16.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:16.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:16.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:16.885 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:26:17.358 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:26:17.831 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:26:18.303 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:26:18.774 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:26:19.247 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:26:19.719 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:26:20.191 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:26:20.662 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:26:21.136 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:26:21.608 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:26:22.080 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:26:22.551 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:26:23.022 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:26:23.494 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:26:23.967 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:26:24.439 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:26:24.910 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:26:25.383 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:26:25.856 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:26:26.328 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:26:26.799 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:26:27.272 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:26:27.744 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:26:28.217 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:26:28.690 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:26:29.162 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:26:29.634 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:26:30.105 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:26:30.579 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:26:31.051 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:26:31.523 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:26:31.993 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:26:32.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:26:32.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:26:32.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:32.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:32.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:32.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:32.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:32.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:32.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:32.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:32.270 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:26:32.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:32.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:37.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:37.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:37.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:37.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:37.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:37.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:37.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:37.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:26:37.281 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:37.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:26:37.281 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:26:37.282 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:26:37.282 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:26:37.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:26:37.282 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:37.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:37.282 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:26:37.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:26:37.283 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:26:37.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:37.283 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:26:37.283 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:26:37.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:26:37.283 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:37.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:37.283 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:26:37.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:26:37.283 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:26:37.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:37.285 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:26:37.285 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:26:37.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:26:37.285 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:37.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:37.285 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:26:37.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:26:37.285 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:26:37.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:26:37.287 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:26:37.287 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:26:37.287 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:37.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:37.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:37.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:37.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:37.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:37.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:37.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:37.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:37.289 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:26:42.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:42.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:42.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:42.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:42.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:42.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:42.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:42.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:26:42.299 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:42.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:26:42.299 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:26:42.300 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:26:42.300 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:26:42.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:26:42.300 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:42.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:42.301 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:26:42.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:26:42.301 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:26:42.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:42.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:26:42.301 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:26:42.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:26:42.301 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:42.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:42.302 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:26:42.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:26:42.302 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:26:42.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:42.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:26:42.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:26:42.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:26:42.303 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:42.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:42.303 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:26:42.303 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:26:42.303 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:26:42.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:26:42.305 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:26:42.305 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:26:42.305 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:42.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:42.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:42.310 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:26:42.787 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:26:42.832 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:26:42.834 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:26:42.836 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:26:42.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:26:43.259 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:26:43.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:43.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:43.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:43.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:43.730 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:26:44.205 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:26:44.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:44.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:44.677 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:26:45.153 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:26:45.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:45.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:45.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:45.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:45.624 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:26:46.098 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:26:46.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:46.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:46.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:46.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:46.571 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:26:47.042 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:26:47.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:47.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:47.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:47.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:47.518 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:26:47.990 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:26:48.463 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:26:48.936 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:26:49.408 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:26:49.881 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:26:50.354 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:26:50.826 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:26:51.301 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:26:51.773 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:26:52.248 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:26:52.720 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:26:52.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:52.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:52.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:52.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:52.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:52.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:52.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:52.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:52.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:52.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:52.848 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:26:57.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:57.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:57.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:57.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:57.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:57.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:57.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:57.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:26:57.861 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:57.861 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:26:57.861 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:26:57.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:26:57.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:26:57.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:26:57.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:57.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:57.865 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:26:57.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:26:57.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:26:57.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:26:57.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:26:57.866 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:26:57.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:26:57.866 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:57.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:57.866 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:26:57.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:26:57.866 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:26:57.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:26:57.868 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:26:57.868 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:26:57.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:26:57.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:26:57.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:57.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:26:57.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:26:57.869 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:26:57.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:26:57.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:26:57.871 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:26:57.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:57.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:26:57.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:26:57.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:26:57.872 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:27:02.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:02.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:02.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:02.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:02.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:02.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:02.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:02.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:02.889 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:02.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:02.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:27:02.893 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:27:02.893 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:27:02.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:02.893 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:02.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:02.894 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:27:02.895 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:02.895 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:27:02.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:02.896 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:27:02.896 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:27:02.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:02.897 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:02.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:02.897 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:27:02.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:02.897 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:27:02.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:02.900 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:27:02.900 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:27:02.900 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:02.900 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:02.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:02.900 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:27:02.900 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:02.900 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:27:02.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:02.903 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:27:02.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:27:02.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:27:02.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:27:02.903 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:27:02.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:27:02.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:27:02.904 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:27:02.904 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:27:02.904 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:02.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:02.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:02.909 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:27:03.387 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:27:03.435 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:27:03.437 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:27:03.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:27:03.439 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:27:03.859 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:27:03.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:03.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:03.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:03.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:04.333 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:27:04.805 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:27:04.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:04.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:04.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:04.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:05.277 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:27:05.752 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:27:05.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:05.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:05.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:05.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:06.226 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:27:06.699 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:27:06.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:06.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:06.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:06.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:07.173 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:27:07.646 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:27:07.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:07.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:07.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:07.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:08.118 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:27:08.591 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:27:09.064 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:27:09.536 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:27:10.011 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:27:10.483 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:27:10.958 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:27:11.430 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:27:11.905 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:27:12.377 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:27:12.850 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:27:13.323 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:27:13.795 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:27:14.270 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:27:14.742 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:27:15.216 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:27:15.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:15.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:15.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:15.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:15.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:15.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:15.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:15.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:15.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:15.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:15.457 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:27:15.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2707 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:27:15.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2707 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:27:15.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2707 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:27:15.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2707 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:27:15.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2707 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:27:15.457 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2707 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:27:20.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:20.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:20.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:20.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:20.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:20.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:20.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:20.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:20.473 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:20.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:20.473 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:27:20.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:27:20.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:27:20.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:20.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:20.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:20.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:27:20.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:20.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:27:20.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:20.480 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:27:20.481 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:27:20.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:20.481 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:20.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:20.481 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:27:20.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:20.481 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:27:20.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:20.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:27:20.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:27:20.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:20.484 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:20.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:20.484 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:27:20.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:20.484 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:27:20.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:20.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:27:20.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:27:20.487 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:27:20.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:27:20.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:20.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:20.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:20.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:27:20.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:20.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:20.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:20.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:20.489 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:27:20.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:25.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:25.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:25.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:25.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:25.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:25.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:25.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:25.506 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:25.506 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:25.506 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:25.507 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:27:25.510 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:27:25.511 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:27:25.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:25.511 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:25.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:25.512 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:27:25.512 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:25.512 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:27:25.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:25.514 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:27:25.514 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:27:25.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:25.514 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:25.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:25.514 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:27:25.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:25.515 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:27:25.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:25.518 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:27:25.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:27:25.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:25.518 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:25.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:25.518 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:27:25.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:25.519 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:27:25.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:27:25.523 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:27:25.523 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:27:25.523 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:25.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:25.527 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:27:26.005 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:27:26.049 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:27:26.051 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:27:26.052 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:27:26.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:27:26.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:27:26.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:27:26.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:27:26.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:27:26.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:27:26.055 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:27:26.055 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:27:26.055 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:27:26.095 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:27:26.096 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 05:27:26.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:27:26.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:27:26.477 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:27:26.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:26.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:26.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:26.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:26.950 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:27:27.423 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:27:27.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:27.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:27.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:27.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:27.895 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:27:28.367 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:27:28.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:28.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:28.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:28.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:28.840 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:27:29.313 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:27:29.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:29.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:29.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:29.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:29.786 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:27:30.258 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:27:30.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:30.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:30.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:30.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:30.730 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:27:31.202 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:27:31.675 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:27:32.147 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:27:32.619 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:27:33.092 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:27:33.564 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:27:34.036 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:27:34.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:27:34.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:27:34.100 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:27:34.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:34.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:34.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:34.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:34.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:34.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:34.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:34.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:34.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:34.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:34.107 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:27:39.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:39.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:39.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:39.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:39.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:39.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:39.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:39.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:39.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:39.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:39.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:27:39.124 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:27:39.124 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:27:39.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:39.125 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:39.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:39.126 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:27:39.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:39.126 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:27:39.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:39.127 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:27:39.127 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:27:39.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:39.128 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:39.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:39.128 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:27:39.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:39.128 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:27:39.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:39.130 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:27:39.130 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:27:39.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:39.130 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:39.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:39.130 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:27:39.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:39.130 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:27:39.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:39.133 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:27:39.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:27:39.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:27:39.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:27:39.133 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:27:39.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:27:39.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:27:39.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:39.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:27:39.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:27:39.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:27:39.134 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:27:39.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:39.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:39.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:39.135 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:27:39.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:44.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:44.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:44.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:44.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:44.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:44.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:44.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:44.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:44.150 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:44.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:44.151 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:27:44.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:27:44.155 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:27:44.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:44.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:44.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:44.156 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:27:44.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:44.157 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:27:44.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:44.159 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:27:44.159 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:27:44.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:44.159 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:44.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:44.159 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:27:44.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:44.159 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:27:44.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:44.162 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:27:44.162 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:27:44.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:44.162 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:44.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:44.163 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:27:44.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:44.163 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:27:44.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:44.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:27:44.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:27:44.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:27:44.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:27:44.166 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:27:44.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:27:44.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:27:44.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:27:44.167 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:27:44.167 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:27:44.167 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:44.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:44.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:44.172 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:27:44.651 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:27:44.697 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:27:44.699 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:27:44.701 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:27:44.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:27:44.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:27:44.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:27:44.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:27:44.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:27:44.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:27:44.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:27:44.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:27:44.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:27:44.739 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:27:44.739 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 05:27:44.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:27:44.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:27:45.122 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:27:45.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:45.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:45.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:45.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:45.595 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:27:46.068 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:27:46.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:46.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:46.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:46.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:46.540 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:27:47.011 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:27:47.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:47.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:47.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:47.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:47.485 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:27:47.957 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:27:48.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:48.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:48.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:48.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:48.429 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:27:48.900 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:27:49.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:49.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:49.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:49.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:49.373 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:27:49.845 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:27:50.317 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:27:50.789 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:27:51.262 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:27:51.734 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:27:52.205 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:27:52.678 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:27:52.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:27:52.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:27:52.744 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:27:52.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:52.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:52.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:52.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:52.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:52.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:52.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:52.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:52.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:52.749 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:27:52.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:57.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:57.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:57.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:57.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:57.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:57.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:57.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:57.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:57.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:57.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:27:57.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:27:57.773 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:27:57.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:27:57.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:57.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:57.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:57.774 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:27:57.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:27:57.775 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:27:57.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:27:57.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:27:57.779 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:27:57.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:57.779 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:57.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:57.779 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:27:57.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:27:57.780 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:27:57.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:27:57.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:27:57.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:27:57.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:57.784 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:27:57.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:57.784 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:27:57.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:27:57.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:27:57.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:57.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:57.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:27:57.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:57.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:57.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:57.791 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:27:57.791 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:27:57.791 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:27:57.791 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:27:57.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:57.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:57.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:57.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:27:57.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:57.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:57.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:27:57.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:27:57.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:27:57.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:27:57.794 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:27:57.794 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:27:57.794 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:28:02.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:02.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:02.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:02.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:02.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:02.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:02.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:02.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:02.810 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:02.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:02.810 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:28:02.814 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:28:02.814 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:28:02.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:02.815 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:02.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:02.815 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:28:02.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:02.816 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:28:02.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:02.817 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:28:02.818 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:28:02.818 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:02.818 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:02.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:02.818 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:28:02.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:02.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:28:02.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:02.820 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:28:02.821 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:28:02.821 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:02.821 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:02.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:02.821 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:28:02.821 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:02.821 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:28:02.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:02.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:28:02.825 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:28:02.825 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:28:02.825 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:02.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:02.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:02.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:02.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:02.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:02.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:02.829 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:28:03.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:28:03.360 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:28:03.364 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:28:03.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:28:03.367 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:28:03.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:28:03.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:28:03.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:28:03.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:28:03.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:28:03.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:28:03.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:28:03.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:28:03.397 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:28:03.397 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 05:28:03.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:28:03.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:28:03.778 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:28:03.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:03.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:03.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:03.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:04.251 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:28:04.724 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:28:04.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:04.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:04.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:04.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:05.196 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:28:05.668 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:28:05.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:05.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:05.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:05.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:06.142 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:28:06.613 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:28:06.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:06.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:06.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:06.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:07.086 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:28:07.559 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:28:07.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:07.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:07.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:07.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:08.031 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:28:08.513 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:28:08.985 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:28:09.457 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:28:09.931 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:28:10.403 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:28:10.877 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:28:11.348 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:28:11.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:28:11.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:28:11.402 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:28:11.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:11.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:11.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:11.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:11.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:11.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:11.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:11.409 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:28:11.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:11.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:11.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:11.409 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1851 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:28:11.409 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1851 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:28:11.409 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1851 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:28:11.409 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1851 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:28:11.409 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1851 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:28:11.409 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1851 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:28:16.415 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:16.415 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:16.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:16.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:16.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:16.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:16.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:16.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:16.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:16.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:16.425 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:28:16.428 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:28:16.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:28:16.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:16.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:16.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:16.430 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:28:16.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:16.430 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:28:16.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:16.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:28:16.432 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:28:16.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:16.432 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:16.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:16.433 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:28:16.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:16.433 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:28:16.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:16.435 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:28:16.435 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:28:16.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:16.435 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:16.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:28:16.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:16.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:16.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:28:16.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:28:16.439 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:28:16.439 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:28:16.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:16.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:16.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:16.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:16.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:16.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:16.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:16.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:16.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:16.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:16.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:16.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:16.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:16.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:16.441 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:28:21.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:21.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:21.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:21.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:21.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:21.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:21.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:21.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:21.457 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:21.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:21.457 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:28:21.460 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:28:21.460 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:28:21.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:21.460 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:21.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:21.461 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:28:21.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:21.461 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:28:21.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:21.462 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:28:21.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:28:21.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:21.463 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:21.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:21.463 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:28:21.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:21.463 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:28:21.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:21.465 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:28:21.465 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:28:21.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:21.465 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:21.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:21.465 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:28:21.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:21.465 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:28:21.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:28:21.468 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:28:21.468 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:28:21.468 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:21.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:21.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:21.473 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:28:21.951 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:28:21.997 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:28:22.000 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:28:22.001 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:28:22.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:28:22.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:28:22.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:28:22.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:28:22.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:28:22.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:28:22.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:28:22.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:28:22.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:28:22.041 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:28:22.042 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 05:28:22.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:28:22.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:28:22.423 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:28:22.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:22.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:22.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:22.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:22.896 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:28:23.369 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:28:23.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:23.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:23.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:23.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:23.841 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:28:24.315 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:28:24.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:24.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:24.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:24.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:24.787 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:28:25.260 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:28:25.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:25.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:25.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:25.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:25.732 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:28:26.205 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:28:26.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:26.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:26.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:26.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:26.677 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:28:27.149 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:28:27.622 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:28:28.094 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:28:28.565 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:28:29.039 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:28:29.511 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:28:29.983 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:28:30.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:28:30.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:28:30.046 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:28:30.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:30.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:30.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:30.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:30.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:30.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:30.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:30.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:30.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:30.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:30.053 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:28:30.053 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:28:30.053 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:28:30.053 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:28:35.058 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:35.058 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:35.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:35.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:35.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:35.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:35.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:35.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:35.067 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:35.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:35.067 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:28:35.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:28:35.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:28:35.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:35.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:35.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:35.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:28:35.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:35.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:28:35.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:35.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:28:35.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:28:35.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:35.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:35.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:35.078 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:28:35.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:35.078 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:28:35.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:35.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:28:35.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:28:35.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:35.082 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:35.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:35.082 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:28:35.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:35.083 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:28:35.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:35.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:28:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:28:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:28:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:28:35.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:28:35.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:28:35.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:28:35.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:28:35.089 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:28:35.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:35.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:35.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:28:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:35.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:35.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:35.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:35.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:35.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:35.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:35.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:35.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:35.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:35.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:35.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:35.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:35.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:35.092 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:28:40.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:40.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:40.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:40.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:40.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:40.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:40.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:40.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:40.108 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:40.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:40.108 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:28:40.110 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:28:40.111 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:28:40.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:40.111 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:40.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:40.111 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:28:40.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:40.112 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:28:40.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:40.113 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:28:40.113 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:28:40.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:40.113 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:40.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:40.113 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:28:40.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:40.113 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:28:40.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:40.115 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:28:40.115 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:28:40.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:40.115 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:40.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:40.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:28:40.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:40.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:28:40.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:28:40.118 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:28:40.118 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:28:40.118 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:40.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:40.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:40.123 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:28:40.601 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:28:40.643 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:28:40.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:28:40.645 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:28:40.648 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:28:40.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:28:40.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:28:40.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:28:40.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:28:40.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:28:40.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:28:40.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:28:40.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:28:40.691 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:28:40.691 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 05:28:40.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:28:40.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:28:41.073 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:28:41.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:41.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:41.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:41.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:41.545 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:28:42.019 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:28:42.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:42.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:42.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:42.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:42.491 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:28:42.965 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:28:43.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:43.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:43.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:43.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:43.437 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:28:43.908 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:28:44.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:44.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:44.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:44.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:44.381 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:28:44.854 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:28:45.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:45.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:45.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:45.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:45.326 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:28:45.797 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:28:46.271 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:28:46.743 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:28:47.216 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:28:47.687 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:28:48.160 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:28:48.632 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:28:49.105 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:28:49.578 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:28:50.050 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:28:50.522 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:28:50.996 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:28:51.468 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:28:51.940 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:28:52.411 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:28:52.884 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:28:53.356 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:28:53.828 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:28:54.300 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:28:54.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:28:54.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:28:54.697 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:28:54.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:54.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:54.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:54.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:54.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:54.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:54.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:54.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:54.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:54.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:54.699 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:28:59.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:59.706 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:59.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:59.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:59.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:59.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:59.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:59.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:59.712 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:59.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:28:59.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:28:59.713 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:28:59.713 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:28:59.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:59.713 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:59.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:59.714 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:28:59.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:28:59.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:28:59.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:28:59.714 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:28:59.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:28:59.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:59.715 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:59.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:59.715 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:28:59.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:28:59.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:28:59.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:28:59.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:28:59.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:28:59.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:59.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:28:59.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:59.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:28:59.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:28:59.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:28:59.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:28:59.717 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:28:59.718 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:28:59.718 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:28:59.718 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:59.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:28:59.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:28:59.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:28:59.719 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:29:04.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:29:04.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:29:04.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:04.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:04.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:04.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:04.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:04.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:29:04.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:04.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:29:04.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:29:04.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:29:04.740 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:29:04.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:29:04.741 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:04.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:04.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:29:04.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:29:04.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:29:04.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:04.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:29:04.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:29:04.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:29:04.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:04.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:04.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:29:04.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:29:04.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:29:04.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:04.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:29:04.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:29:04.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:29:04.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:04.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:04.750 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:29:04.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:29:04.751 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:29:04.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:04.755 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:29:04.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:29:04.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:29:04.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:29:04.755 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:29:04.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:29:04.756 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:29:04.756 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:29:04.756 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:04.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:04.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:04.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:04.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:04.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:04.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:04.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:04.761 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:29:05.239 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:29:05.287 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:29:05.289 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:29:05.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:29:05.292 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:29:05.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:29:05.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:29:05.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:29:05.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:29:05.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:29:05.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:29:05.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:29:05.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:29:05.329 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:29:05.329 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 05:29:05.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:29:05.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:29:05.711 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:29:05.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:05.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:05.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:05.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:06.184 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:29:06.657 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:29:06.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:06.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:06.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:06.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:07.129 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:29:07.600 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:29:07.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:07.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:07.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:07.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:08.074 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:29:08.545 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:29:08.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:08.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:08.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:08.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:09.017 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:29:09.488 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:29:09.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:09.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:09.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:09.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:09.962 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:29:10.434 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:29:10.906 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:29:11.378 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:29:11.851 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:29:12.323 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:29:12.794 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:29:13.268 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:29:13.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:29:13.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:29:13.335 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:29:13.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:13.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:13.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:13.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:13.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:13.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:29:13.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:29:13.344 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:29:13.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:13.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:13.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:13.344 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:13.344 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:13.344 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:13.344 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:13.344 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:13.344 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:13.344 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:18.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:29:18.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:29:18.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:18.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:18.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:18.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:18.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:18.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:29:18.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:18.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:29:18.356 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:29:18.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:29:18.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:29:18.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:29:18.361 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:18.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:18.362 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:29:18.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:29:18.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:29:18.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:18.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:29:18.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:29:18.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:29:18.365 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:18.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:18.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:29:18.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:29:18.366 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:29:18.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:18.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:29:18.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:29:18.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:29:18.368 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:18.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:18.368 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:29:18.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:29:18.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:29:18.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:18.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:29:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:29:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:29:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:29:18.371 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:29:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:29:18.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:29:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:29:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:29:18.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:29:18.372 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:29:18.372 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:18.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:29:18.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:29:18.374 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:29:18.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:23.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:29:23.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:29:23.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:23.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:23.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:23.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:23.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:23.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:29:23.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:23.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:29:23.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:29:23.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:29:23.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:29:23.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:29:23.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:23.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:23.388 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:29:23.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:29:23.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:29:23.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:23.389 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:29:23.390 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:29:23.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:29:23.390 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:23.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:23.390 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:29:23.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:29:23.390 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:29:23.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:23.391 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:29:23.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:29:23.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:29:23.391 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:23.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:23.391 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:29:23.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:29:23.391 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:29:23.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:29:23.393 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:29:23.393 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:29:23.393 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:23.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:23.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:23.398 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:29:23.875 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:29:23.922 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:29:23.924 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:29:23.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:29:23.928 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:29:23.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:29:23.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:29:23.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:29:23.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:29:23.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:29:23.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:29:23.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:29:23.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:29:23.965 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:29:23.965 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 05:29:23.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:29:23.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:29:24.347 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:29:24.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:24.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:24.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:24.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:24.819 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:29:25.292 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:29:25.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:25.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:25.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:25.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:25.764 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:29:26.236 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:29:26.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:26.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:26.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:26.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:26.708 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:29:27.181 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:29:27.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:27.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:27.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:27.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:27.653 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:29:28.125 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:29:28.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:28.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:28.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:28.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:28.598 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:29:29.070 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:29:29.542 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:29:30.016 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:29:30.489 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:29:30.961 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:29:31.434 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:29:31.906 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:29:32.378 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:29:32.850 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:29:33.323 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:29:33.795 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:29:33.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:29:33.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:29:33.971 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:29:33.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:33.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:33.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:33.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:33.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:33.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:33.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:29:33.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:29:33.978 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:29:33.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:33.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:38.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:29:38.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:29:38.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:38.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:38.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:38.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:38.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:38.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:29:38.997 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:38.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:29:38.997 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:29:39.002 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:29:39.003 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:29:39.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:29:39.003 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:39.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:39.003 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:29:39.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:29:39.003 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:29:39.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:39.007 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:29:39.007 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:29:39.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:29:39.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:39.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:39.007 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:29:39.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:29:39.008 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:29:39.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:39.011 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:29:39.011 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:29:39.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:29:39.011 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:39.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:39.011 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:29:39.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:29:39.011 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:29:39.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:39.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:29:39.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:29:39.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:29:39.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:29:39.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:29:39.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:29:39.016 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:29:39.016 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:29:39.016 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:39.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:39.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:39.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:39.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:39.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:39.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:39.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:39.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:39.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:29:39.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:29:39.018 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:29:39.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:44.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:29:44.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:29:44.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:44.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:44.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:44.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:44.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:44.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:29:44.039 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:44.040 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:29:44.040 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:29:44.042 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:29:44.043 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:29:44.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:29:44.043 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:44.043 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:29:44.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:44.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:29:44.043 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:29:44.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:44.045 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:29:44.045 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:29:44.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:29:44.046 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:44.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:44.046 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:29:44.046 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:29:44.046 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:29:44.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:44.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:29:44.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:29:44.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:29:44.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:29:44.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:44.048 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:29:44.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:29:44.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:29:44.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:29:44.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:29:44.050 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:29:44.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:44.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:44.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:29:44.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:29:44.533 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:29:44.576 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:29:44.578 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:29:44.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:29:44.581 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:29:44.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:29:44.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:29:44.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:29:44.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:29:44.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:29:44.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:29:44.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:29:44.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:29:44.623 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:29:44.623 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-04-19 05:29:44.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:29:44.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:29:45.005 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:29:45.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:45.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:45.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:45.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:45.477 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:29:45.950 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:29:46.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:46.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:46.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:46.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:46.424 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:29:46.897 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:29:47.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:47.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:47.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:47.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:47.369 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:29:47.840 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:29:48.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:48.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:48.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:48.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:48.313 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:29:48.786 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:29:49.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:49.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:49.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:49.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:49.257 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:29:49.728 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:29:50.200 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:29:50.674 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:29:51.146 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:29:51.617 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:29:52.091 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:29:52.563 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:29:53.036 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:29:53.509 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:29:53.980 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:29:54.452 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:29:54.925 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:29:55.397 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:29:55.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:29:55.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:29:55.629 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:29:55.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:29:55.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:29:55.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:29:55.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:29:55.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:29:55.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:29:55.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:29:55.638 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:29:55.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:29:55.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:29:55.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:29:55.638 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2502 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:55.638 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2502 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:55.638 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2502 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:55.639 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2502 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:55.639 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2502 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:29:55.639 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2502 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:30:00.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:30:00.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:30:00.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:00.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:00.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:00.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:00.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:00.645 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:30:00.645 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:00.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:30:00.646 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:30:00.648 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:30:00.648 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:30:00.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:30:00.649 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:00.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:00.649 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:30:00.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:30:00.650 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:30:00.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:00.651 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:30:00.651 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:30:00.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:30:00.651 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:00.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:00.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:30:00.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:30:00.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:30:00.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:00.653 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:30:00.653 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:30:00.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:30:00.653 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:00.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:00.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:30:00.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:30:00.653 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:30:00.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:00.656 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:30:00.656 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:30:00.656 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:30:00.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:30:00.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:00.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:00.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:00.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:30:00.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:00.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:00.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:00.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:30:00.658 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:30:00.658 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:30:00.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:05.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:30:05.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:30:05.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:05.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:05.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:05.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:05.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:05.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:30:05.673 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:05.673 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:30:05.673 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:30:05.675 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:30:05.675 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:30:05.676 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:30:05.676 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:05.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:05.676 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:30:05.677 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:30:05.677 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:30:05.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:05.678 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:30:05.678 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:30:05.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:30:05.679 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:05.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:05.679 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:30:05.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:30:05.679 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:30:05.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:05.681 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:30:05.681 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:30:05.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:30:05.681 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:05.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:05.681 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:30:05.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:30:05.681 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:30:05.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:05.683 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:30:05.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:30:05.684 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:30:05.684 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:30:05.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:05.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:05.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:05.689 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:30:06.167 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:30:06.217 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:30:06.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:30:06.220 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:30:06.221 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:30:06.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:30:06.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:06.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:06.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:06.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:07.106 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:30:07.570 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:30:07.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:07.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:07.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:07.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:08.042 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:30:08.510 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:30:08.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:08.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:08.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:08.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:08.978 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:30:09.451 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:30:09.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:09.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:09.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:09.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:09.918 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:30:10.391 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:30:10.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:10.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:10.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:10.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:10.864 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:30:11.336 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:30:11.809 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:30:12.282 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:30:12.750 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:30:13.214 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:30:13.677 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:30:14.140 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:30:14.604 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:30:15.075 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:30:15.540 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:30:16.003 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:30:16.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:16.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:16.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:16.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:16.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:16.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:16.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:30:16.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:30:16.235 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:30:16.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:16.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:16.235 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2296 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:30:16.235 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2296 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:30:16.235 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2296 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:30:16.235 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2296 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:30:16.235 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2296 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:30:16.235 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2296 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:30:21.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:30:21.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:30:21.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:21.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:21.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:21.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:21.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:21.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:30:21.250 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:21.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:30:21.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:30:21.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:30:21.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:30:21.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:30:21.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:21.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:21.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:30:21.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:30:21.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:30:21.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:21.261 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:30:21.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:30:21.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:30:21.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:21.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:21.262 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:30:21.262 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:30:21.262 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:30:21.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:21.265 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:30:21.265 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:30:21.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:30:21.265 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:21.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:21.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:30:21.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:30:21.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:30:21.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:21.269 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:30:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:30:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:30:21.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:30:21.269 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:30:21.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:30:21.270 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:30:21.270 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:21.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:30:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:21.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:21.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:30:21.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:30:21.272 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:30:21.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:26.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:30:26.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:30:26.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:26.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:26.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:26.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:26.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:26.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:30:26.291 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:26.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:30:26.291 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:30:26.297 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:30:26.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:30:26.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:30:26.298 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:26.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:26.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:30:26.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:30:26.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:30:26.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:26.302 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:30:26.302 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:30:26.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:30:26.302 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:26.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:26.303 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:30:26.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:30:26.303 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:30:26.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:26.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:30:26.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:30:26.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:30:26.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:26.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:26.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:30:26.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:30:26.307 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:30:26.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:26.310 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:30:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:30:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:30:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:30:26.310 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:30:26.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:30:26.311 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:30:26.311 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:30:26.311 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:26.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:26.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:26.316 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:30:26.794 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:30:26.843 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:30:26.844 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:30:26.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:30:26.846 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:30:27.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:30:27.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:27.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:27.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:27.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:27.734 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:30:28.199 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:30:28.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:28.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:28.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:28.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:28.673 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:30:29.141 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:30:29.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:29.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:29.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:29.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:29.611 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:30:30.081 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:30:30.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:30.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:30.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:30.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:30.557 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:30:31.028 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:30:31.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:31.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:31.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:31.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:31.501 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:30:31.974 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:30:32.446 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:30:32.922 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:30:33.394 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:30:33.867 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:30:34.340 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:30:34.812 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:30:35.282 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:30:35.753 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:30:36.229 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:30:36.700 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:30:37.176 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:30:37.648 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:30:38.123 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:30:38.595 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:30:38.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:38.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:38.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:38.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:38.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:38.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:38.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:38.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:38.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:30:38.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:30:38.861 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:30:43.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:30:43.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:30:43.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:43.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:43.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:43.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:43.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:43.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:30:43.879 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:43.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:30:43.879 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:30:43.881 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:30:43.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:30:43.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:30:43.882 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:43.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:43.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:30:43.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:30:43.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:30:43.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:43.883 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:30:43.883 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:30:43.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:30:43.884 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:43.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:43.884 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:30:43.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:30:43.884 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:30:43.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:43.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:30:43.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:30:43.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:30:43.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:30:43.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:30:43.886 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:30:43.886 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:30:43.886 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:30:43.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:30:43.888 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:30:43.888 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:30:43.888 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:43.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:43.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:30:43.893 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:30:44.371 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:30:44.416 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:30:44.418 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:30:44.420 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:30:44.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:30:44.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:30:44.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:30:44.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:30:44.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:30:44.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:30:44.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:30:44.424 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:30:44.424 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:30:44.843 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:30:44.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:44.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:44.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:44.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:45.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:30:45.788 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:30:45.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:45.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:45.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:45.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:46.260 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:30:46.732 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:30:46.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:46.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:46.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:46.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:47.205 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:30:47.678 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:30:47.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:47.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:47.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:47.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:48.150 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:30:48.624 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:30:48.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:48.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:48.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:48.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:49.096 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:30:49.569 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:30:50.042 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:30:50.514 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:30:50.986 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:30:51.458 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:30:51.931 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:30:52.403 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:30:52.875 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:30:53.346 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:30:53.817 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:30:54.288 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:30:54.761 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:30:55.234 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:30:55.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:30:55.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:30:55.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:30:55.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:30:55.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:30:55.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:30:55.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:30:55.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:30:55.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:30:55.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:30:55.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:30:55.471 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:30:55.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:00.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:31:00.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:31:00.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:00.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:00.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:00.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:00.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:00.480 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:31:00.480 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:00.480 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:31:00.480 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:31:00.481 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:31:00.481 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:31:00.481 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:31:00.481 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:00.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:00.481 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:31:00.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:31:00.482 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:31:00.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:00.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:31:00.482 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:31:00.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:31:00.482 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:00.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:00.482 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:31:00.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:31:00.482 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:31:00.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:00.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:31:00.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:31:00.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:31:00.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:00.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:00.484 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:31:00.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:31:00.484 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:31:00.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:00.485 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:31:00.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:31:00.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:31:00.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:31:00.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:31:00.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:31:00.486 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:31:00.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:00.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:00.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:00.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:00.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:00.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:00.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:00.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:00.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:00.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:00.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:00.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:31:00.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:31:01.013 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:31:01.015 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:31:01.017 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:31:01.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:01.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:01.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:01.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:01.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:01.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:01.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:01.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:31:01.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:31:01.439 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:31:01.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:01.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:01.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:01.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:01.910 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:31:02.383 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:31:02.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:02.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:02.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:02.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:02.856 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:31:03.328 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:31:03.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:03.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:03.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:03.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:03.799 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:31:04.272 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:31:04.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:04.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:04.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:04.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:04.745 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:31:05.217 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:31:05.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:05.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:05.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:05.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:05.688 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:31:06.161 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:31:06.634 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:31:07.105 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:31:07.577 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:31:08.050 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:31:08.521 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:31:08.993 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:31:09.465 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:31:09.936 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:31:10.410 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:31:10.882 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:31:11.354 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:31:11.825 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:31:12.298 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:31:12.770 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:31:13.242 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:31:13.715 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:31:14.188 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:31:14.660 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:31:15.131 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:31:15.605 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:31:16.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:16.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:16.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:16.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:16.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:16.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:16.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:16.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:16.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:16.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:16.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:31:16.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:31:16.071 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:31:21.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:31:21.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:31:21.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:21.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:21.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:21.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:21.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:21.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:31:21.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:21.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:31:21.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:31:21.089 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:31:21.089 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:31:21.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:31:21.089 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:21.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:21.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:31:21.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:31:21.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:31:21.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:21.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:31:21.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:31:21.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:31:21.094 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:21.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:21.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:31:21.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:31:21.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:31:21.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:21.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:31:21.096 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:31:21.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:31:21.096 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:21.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:21.097 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:31:21.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:31:21.097 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:31:21.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:21.100 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:31:21.100 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:31:21.100 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:31:21.100 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:31:21.100 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:21.101 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:31:21.101 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:31:21.101 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:31:21.101 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:21.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:21.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:21.106 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:31:21.584 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:31:21.627 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:31:21.630 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:31:21.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:21.633 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:31:21.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:21.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:21.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:21.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:21.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:21.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:21.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:31:21.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:31:21.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:21.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:21.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:21.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:21.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:21.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:21.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:21.688 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:31:21.688 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:31:21.688 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:31:21.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:21.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:21.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:21.688 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:21.688 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:21.688 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:21.688 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:21.688 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:21.688 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:26.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:31:26.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:31:26.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:26.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:26.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:26.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:26.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:26.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:31:26.709 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:26.709 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:31:26.709 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:31:26.710 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:31:26.710 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:31:26.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:31:26.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:26.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:26.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:31:26.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:31:26.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:31:26.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:26.712 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:31:26.712 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:31:26.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:31:26.712 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:26.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:26.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:31:26.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:31:26.712 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:31:26.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:26.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:31:26.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:31:26.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:31:26.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:26.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:26.713 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:31:26.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:31:26.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:31:26.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:26.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:31:26.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:31:26.716 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:31:26.716 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:26.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:26.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:31:27.197 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:31:27.243 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:31:27.245 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:31:27.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:27.248 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:31:27.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:27.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:27.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:27.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:27.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:27.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:27.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:27.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:27.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:27.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:27.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:31:27.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:31:27.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:27.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:27.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:27.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:27.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:27.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:27.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:27.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:27.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:27.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:27.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:27.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:27.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:27.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:27.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:27.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:27.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:27.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:27.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:31:27.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:31:27.524 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:31:27.524 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:31:27.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:27.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:27.669 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:31:27.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:27.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:27.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:27.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:27.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:27.719 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:31:27.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:27.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:27.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:27.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:27.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:27.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:27.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:27.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:27.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:27.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:27.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:27.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:27.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:27.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:31:27.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:31:27.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:27.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:27.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:27.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:28.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:28.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:28.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:28.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:28.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:28.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:28.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:28.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:28.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:28.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:28.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:28.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:28.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:28.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:28.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:31:28.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:31:28.138 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:31:28.139 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:31:28.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:28.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:28.139 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:31:28.611 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:31:28.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:28.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:28.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:28.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:28.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:28.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:28.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:28.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:28.932 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:31:28.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:28.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:28.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:28.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:28.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:28.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:28.941 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:31:28.941 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:31:28.941 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:31:28.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:28.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:33.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:31:33.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:31:33.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:33.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:33.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:33.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:33.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:33.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:31:33.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:33.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:31:33.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:31:33.962 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:31:33.962 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:31:33.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:31:33.963 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:33.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:33.963 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:31:33.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:31:33.964 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:31:33.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:33.964 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:31:33.964 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:31:33.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:31:33.964 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:33.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:33.965 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:31:33.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:31:33.965 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:31:33.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:33.966 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:31:33.966 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:31:33.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:31:33.966 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:33.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:33.966 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:31:33.966 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:31:33.966 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:31:33.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:33.968 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:31:33.968 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:31:33.968 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:31:33.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:33.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:33.973 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:31:34.451 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:31:34.500 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:31:34.503 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:31:34.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:34.504 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:31:34.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:34.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:34.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:34.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:34.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:34.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:34.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:34.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:34.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:34.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:34.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:31:34.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:31:34.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:34.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:34.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:34.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:34.923 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:31:34.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:34.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:34.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:34.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:35.394 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:31:35.865 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:31:35.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:35.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:35.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:35.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:36.338 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:31:36.811 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:31:36.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:36.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:36.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:36.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:37.283 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:31:37.754 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:31:37.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:37.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:37.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:37.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:38.227 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:31:38.699 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:31:38.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:38.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:38.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:38.977 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:39.172 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:31:39.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:39.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:39.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:39.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:39.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:39.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:39.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:39.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:39.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:39.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:39.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:39.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:39.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:39.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:39.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:31:39.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:31:39.638 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:31:39.638 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:31:39.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:39.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:39.644 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:31:40.117 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:31:40.589 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:31:41.062 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:31:41.535 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:31:42.007 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:31:42.481 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:31:42.954 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:31:43.427 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:31:43.901 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:31:44.373 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:31:44.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:44.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:44.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:44.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:44.647 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:31:44.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:44.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:44.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:44.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:44.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:44.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:44.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:44.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:44.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:44.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:44.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:31:44.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:31:44.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:44.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:44.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:44.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:44.845 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:31:45.318 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:31:45.791 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:31:46.264 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:31:46.736 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:31:47.208 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:31:47.682 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:31:48.154 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:31:48.627 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:31:49.097 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:31:49.571 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:31:49.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:49.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:49.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:49.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:49.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:49.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:49.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:49.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:49.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:49.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:31:49.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:49.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:49.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:31:49.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:31:49.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:31:49.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:31:49.749 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:31:49.749 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:31:49.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:49.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:50.043 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:31:50.515 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:31:50.988 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:31:51.460 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:31:51.932 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:31:52.406 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:31:52.878 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:31:53.350 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:31:53.822 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:31:54.295 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:31:54.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:31:54.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:31:54.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:31:54.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:31:54.757 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:31:54.767 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:31:54.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:54.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:54.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:54.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:54.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:54.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:31:54.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:31:54.772 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:31:54.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:54.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:54.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:54.772 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4491 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:54.772 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:54.772 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:54.772 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:54.772 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:54.772 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:54.772 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:54.772 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:54.772 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:31:59.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:31:59.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:31:59.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:59.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:59.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:59.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:59.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:31:59.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:31:59.793 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:59.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:31:59.794 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:31:59.799 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:31:59.799 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:31:59.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:31:59.800 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:59.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:31:59.801 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:31:59.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:31:59.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:31:59.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:31:59.803 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:31:59.803 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:31:59.804 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:31:59.804 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:59.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:31:59.804 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:31:59.805 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:31:59.805 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:31:59.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:31:59.806 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:31:59.806 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:31:59.806 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:31:59.806 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:31:59.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:31:59.807 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:31:59.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:31:59.807 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:31:59.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:59.810 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:31:59.810 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:31:59.810 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:31:59.811 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:59.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:31:59.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:31:59.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:59.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:31:59.815 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:32:00.294 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:32:00.344 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:32:00.346 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:32:00.349 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:32:00.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:00.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:00.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:00.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:00.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:00.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:00.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:00.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:00.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:00.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:00.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:00.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:32:00.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:32:00.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:00.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:00.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:00.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:00.766 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:32:00.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:00.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:00.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:00.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:01.237 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:32:01.710 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:32:01.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:01.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:01.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:01.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:02.183 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:32:02.655 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:32:02.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:02.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:02.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:02.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:03.126 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:32:03.600 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:32:03.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:03.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:03.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:03.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:04.072 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:32:04.545 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:32:04.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:04.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:04.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:04.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:05.018 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:32:05.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:05.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:05.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:05.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:05.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:05.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:05.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:05.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:05.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:05.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:05.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:05.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:05.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:05.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:05.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:32:05.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:32:05.482 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:32:05.482 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:32:05.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:05.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:05.490 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:32:05.962 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:32:06.434 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:32:06.908 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:32:07.380 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:32:07.853 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:32:08.326 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:32:08.798 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:32:09.271 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:32:09.744 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:32:10.217 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:32:10.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:10.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:10.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:10.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:10.491 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:32:10.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:10.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:10.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:10.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:10.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:10.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:10.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:10.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:10.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:10.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:10.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:32:10.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:32:10.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:10.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:10.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:10.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:10.687 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:32:11.158 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:32:11.631 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:32:12.104 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:32:12.576 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:32:13.047 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:32:13.520 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:32:13.992 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:32:14.464 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:32:14.938 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:32:15.410 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:32:15.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:15.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:15.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:15.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:15.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:15.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:15.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:15.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:15.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:15.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:15.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:15.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:15.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:15.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:15.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:32:15.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:32:15.593 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:32:15.593 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:32:15.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:15.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:15.882 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:32:16.354 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:32:16.827 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:32:17.300 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:32:17.774 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:32:18.246 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:32:18.718 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:32:19.191 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:32:19.663 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:32:20.135 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:32:20.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:20.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:20.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:20.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:20.602 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:32:20.608 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:32:20.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:20.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:20.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:20.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:20.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:32:20.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:32:20.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:32:20.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:32:20.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:32:20.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:32:20.615 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:32:25.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:32:25.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:32:25.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:32:25.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:32:25.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:32:25.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:32:25.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:32:25.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:32:25.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:32:25.637 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:32:25.637 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:32:25.640 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:32:25.641 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:32:25.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:32:25.641 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:32:25.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:32:25.642 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:32:25.642 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:32:25.643 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:32:25.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:25.644 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:32:25.645 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:32:25.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:32:25.645 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:32:25.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:32:25.645 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:32:25.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:32:25.645 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:32:25.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:25.647 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:32:25.647 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:32:25.647 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:32:25.647 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:32:25.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:32:25.647 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:32:25.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:32:25.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:32:25.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:25.650 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:32:25.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:32:25.651 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:32:25.651 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:25.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:25.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:25.656 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:32:26.134 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:32:26.176 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:32:26.177 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:32:26.179 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:32:26.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:26.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:26.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:26.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:26.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:26.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:26.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:26.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:26.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:26.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:26.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:26.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:32:26.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:32:26.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:26.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:26.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:26.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:26.606 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:32:26.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:26.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:26.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:26.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:27.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:32:27.551 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:32:27.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:27.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:27.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:27.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:28.023 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:32:28.495 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:32:28.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:28.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:28.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:28.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:28.966 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:32:29.440 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:32:29.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:29.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:29.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:29.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:29.912 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:32:30.385 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:32:30.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:30.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:30.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:30.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:30.858 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:32:31.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:31.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:31.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:31.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:31.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:31.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:31.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:31.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:31.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:31.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:31.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:31.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:31.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:31.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:31.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:32:31.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:32:31.322 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:32:31.322 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:32:31.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:31.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:31.330 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:32:31.802 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:32:32.275 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:32:32.748 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:32:33.220 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:32:33.695 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:32:34.167 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:32:34.638 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:32:35.111 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:32:35.584 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:32:36.056 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:32:36.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:36.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:36.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:36.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:36.332 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:32:36.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:36.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:36.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:36.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:36.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:36.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:36.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:36.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:36.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:36.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:36.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:32:36.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:32:36.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:36.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:36.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:36.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:36.527 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:32:36.998 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:32:37.469 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:32:37.942 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:32:38.413 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:32:38.908 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:32:39.380 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:32:39.853 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:32:40.326 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:32:40.797 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:32:41.269 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:32:41.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:41.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:41.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:41.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:41.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:41.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:41.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:41.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:41.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:41.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:41.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:41.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:41.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:41.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:41.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:32:41.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:32:41.451 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:32:41.451 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:32:41.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:41.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:41.739 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:32:42.212 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:32:42.685 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:32:43.157 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:32:43.630 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:32:44.103 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:32:44.576 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:32:45.050 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:32:45.522 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:32:45.994 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:32:46.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:46.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:46.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:46.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:46.461 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:32:46.467 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:32:46.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:46.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:46.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:46.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:46.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:32:46.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:32:46.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:32:46.478 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:32:46.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:32:46.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:32:46.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:32:46.479 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:32:46.479 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:32:46.479 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:32:46.479 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:32:46.479 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:32:46.479 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:32:51.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:32:51.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:32:51.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:32:51.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:32:51.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:32:51.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:32:51.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:32:51.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:32:51.489 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:32:51.489 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:32:51.489 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:32:51.493 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:32:51.493 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:32:51.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:32:51.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:32:51.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:32:51.494 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:32:51.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:32:51.494 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:32:51.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:51.497 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:32:51.497 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:32:51.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:32:51.497 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:32:51.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:32:51.497 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:32:51.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:32:51.497 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:32:51.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:51.500 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:32:51.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:32:51.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:32:51.501 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:32:51.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:32:51.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:32:51.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:32:51.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:32:51.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:51.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:32:51.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:32:51.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:51.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:32:51.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:32:51.508 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:32:51.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:32:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:51.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:32:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:51.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:51.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:32:51.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:51.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:32:51.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:32:51.991 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:32:52.041 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:32:52.042 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:32:52.044 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:32:52.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:52.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:52.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:52.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:52.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:52.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:52.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:52.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:52.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:52.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:52.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:52.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:32:52.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:32:52.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:52.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:52.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:52.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:52.463 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:32:52.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:52.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:52.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:52.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:52.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:32:53.407 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:32:53.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:53.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:53.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:53.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:53.880 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:32:54.352 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:32:54.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:54.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:54.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:54.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:54.823 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:32:55.294 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:32:55.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:55.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:55.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:55.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:55.765 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:32:56.238 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:32:56.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:32:56.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:32:56.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:32:56.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:32:56.710 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:32:57.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:57.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:57.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:57.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:57.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:57.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:57.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:57.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:32:57.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:32:57.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:32:57.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:32:57.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:57.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:32:57.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:32:57.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:32:57.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:32:57.178 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:32:57.178 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:32:57.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:57.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:32:57.181 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:32:57.655 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:32:58.128 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:32:58.600 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:32:59.074 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:32:59.546 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:33:00.019 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:33:00.493 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:33:00.965 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:33:01.438 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:33:01.911 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:33:02.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:02.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:02.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:02.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:02.186 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:33:02.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:02.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:02.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:02.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:02.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:02.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:02.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:02.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:02.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:02.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:02.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:33:02.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:33:02.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:02.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:02.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:02.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:02.382 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:33:02.855 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:33:03.327 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:33:03.798 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:33:04.271 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:33:04.744 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:33:05.216 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:33:05.687 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:33:06.160 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:33:06.632 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:33:07.104 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:33:07.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:07.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:07.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:07.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:07.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:07.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:07.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:07.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:07.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:07.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:07.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:07.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:07.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:07.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:07.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:33:07.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:33:07.286 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:33:07.286 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:33:07.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:07.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:07.576 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:33:08.049 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:33:08.521 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:33:08.994 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:33:09.467 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:33:09.939 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:33:10.411 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:33:10.885 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:33:11.357 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:33:11.830 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:33:12.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:12.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:12.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:12.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:12.294 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:33:12.303 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:33:12.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:12.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:12.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:12.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:12.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:33:12.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:33:12.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:33:12.308 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:33:12.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:33:12.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:33:12.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4491 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4491 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4491 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4491 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4491 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:12.308 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:17.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:33:17.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:33:17.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:33:17.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:33:17.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:33:17.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:33:17.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:33:17.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:33:17.319 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:33:17.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:33:17.320 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:33:17.323 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:33:17.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:33:17.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:33:17.324 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:33:17.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:33:17.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:33:17.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:33:17.324 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:33:17.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:17.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:33:17.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:33:17.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:33:17.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:33:17.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:33:17.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:33:17.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:33:17.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:33:17.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:17.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:33:17.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:33:17.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:33:17.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:33:17.331 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:33:17.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:33:17.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:33:17.331 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:33:17.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:17.335 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:33:17.335 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:33:17.335 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:33:17.336 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:17.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:17.340 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:33:17.819 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:33:17.868 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:33:17.870 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:33:17.872 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:33:17.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:17.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:17.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:17.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:17.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:17.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:17.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:17.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:17.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:17.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:17.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:17.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:33:17.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:33:17.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:17.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:17.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:17.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:18.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:18.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:18.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:18.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:18.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:18.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:18.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:18.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:18.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:18.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:18.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:18.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:18.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:18.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:18.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:33:18.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:33:18.236 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:33:18.236 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:33:18.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:18.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:18.289 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:33:18.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:18.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:18.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:18.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:18.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:18.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:18.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:18.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:18.619 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:33:18.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:18.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:18.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:18.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:18.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:18.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:18.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:18.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:18.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:18.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:18.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:33:18.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:33:18.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:18.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:18.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:18.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:18.761 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:33:19.233 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:33:19.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:19.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:19.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:19.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:19.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:19.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:19.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:19.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:19.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:19.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:19.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:19.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:19.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:19.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:19.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:19.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:19.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:19.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:19.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:33:19.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:33:19.467 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:33:19.467 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:33:19.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:19.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:19.704 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:33:20.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:20.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:20.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:20.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:20.027 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:33:20.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:20.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:20.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:20.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:20.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:33:20.043 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:33:20.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:33:20.043 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:33:20.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:33:20.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:33:20.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:33:20.044 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=585 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:20.044 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=585 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:20.044 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:20.044 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:20.044 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:20.044 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:33:25.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:33:25.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:33:25.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:33:25.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:33:25.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:33:25.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:33:25.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:33:25.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:33:25.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:33:25.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:33:25.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:33:25.059 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:33:25.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:33:25.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:33:25.060 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:33:25.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:33:25.060 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:33:25.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:33:25.060 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:33:25.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:25.062 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:33:25.062 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:33:25.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:33:25.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:33:25.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:33:25.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:33:25.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:33:25.062 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:33:25.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:25.064 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:33:25.064 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:33:25.065 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:33:25.065 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:33:25.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:33:25.065 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:33:25.065 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:33:25.065 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:33:25.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:25.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:33:25.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:33:25.068 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:33:25.069 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:33:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:33:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:33:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:33:25.073 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:33:25.550 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:33:25.601 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:33:25.603 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:33:25.605 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:33:25.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:25.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:25.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:25.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:25.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:25.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:25.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:25.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:25.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:25.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:25.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:25.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:33:25.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:33:25.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:25.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:25.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:25.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:26.023 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:33:26.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:26.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:26.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:26.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:26.494 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:33:26.967 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:33:27.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:27.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:27.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:27.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:27.440 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:33:27.912 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:33:28.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:28.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:28.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:28.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:28.383 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:33:28.856 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:33:29.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:29.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:29.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:29.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:29.329 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:33:29.802 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:33:30.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:33:30.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:33:30.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:33:30.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:33:30.275 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:33:30.747 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:33:31.220 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:33:31.693 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:33:32.166 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:33:32.638 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:33:33.112 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:33:33.584 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:33:34.057 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:33:34.528 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:33:35.001 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:33:35.473 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:33:35.946 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:33:36.417 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:33:36.890 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:33:37.363 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:33:37.835 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:33:38.306 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:33:38.777 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:33:39.247 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:33:39.720 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:33:40.193 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:33:40.665 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:33:41.136 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:33:41.607 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:33:42.080 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:33:42.553 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:33:43.025 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:33:43.496 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:33:43.969 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:33:44.442 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:33:44.915 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:33:45.388 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:33:45.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:45.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:45.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:45.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:45.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:45.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:45.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:45.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:33:45.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:33:45.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:33:45.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:33:45.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:45.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:33:45.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:33:45.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:33:45.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:33:45.757 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:33:45.757 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:33:45.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:45.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:33:45.859 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:33:46.331 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:33:46.804 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:33:47.278 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:33:47.750 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:33:48.223 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:33:48.696 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:33:49.168 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:33:49.641 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:33:50.114 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:33:50.586 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:33:51.060 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:33:51.532 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:33:52.004 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:33:52.477 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:33:52.950 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:33:53.422 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:33:53.894 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:33:54.366 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 05:33:54.839 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 05:33:55.311 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 05:33:55.783 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 05:33:56.257 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 05:33:56.728 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 05:33:57.201 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 05:33:57.674 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 05:33:58.146 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 05:33:58.618 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 05:33:59.092 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 05:33:59.565 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 05:34:00.038 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 05:34:00.510 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 05:34:00.983 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 05:34:01.456 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 05:34:01.928 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 05:34:02.400 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 05:34:02.874 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 05:34:03.346 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 05:34:03.819 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 05:34:04.289 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 05:34:04.763 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 05:34:05.235 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 05:34:05.706 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 05:34:05.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:05.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:05.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:05.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:05.771 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:34:05.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:05.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:05.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:05.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:05.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:05.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:05.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:05.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:05.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:05.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:05.791 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:34:05.791 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:34:05.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:05.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:05.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:05.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:06.177 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 05:34:06.648 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 05:34:07.119 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 05:34:07.590 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 05:34:08.063 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 05:34:08.535 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 05:34:09.007 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 05:34:09.478 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 05:34:09.951 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 05:34:10.424 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 05:34:10.896 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 05:34:11.367 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 05:34:11.840 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 05:34:12.313 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 05:34:12.784 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 05:34:13.256 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 05:34:13.726 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 05:34:14.197 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 05:34:14.671 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 05:34:15.143 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 05:34:15.615 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 05:34:16.086 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 05:34:16.557 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 05:34:17.030 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 05:34:17.503 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 05:34:17.975 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 05:34:18.446 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 05:34:18.917 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 05:34:19.390 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 05:34:19.862 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 05:34:20.334 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 05:34:20.805 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 05:34:21.276 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 05:34:21.750 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 05:34:22.222 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 05:34:22.694 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 05:34:23.165 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 05:34:23.638 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 05:34:24.111 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 05:34:24.583 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 05:34:25.054 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 05:34:25.527 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 05:34:25.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:25.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:25.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:25.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:25.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:25.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:25.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:25.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:25.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:25.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:25.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:25.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:25.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:25.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:25.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:34:25.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:34:25.850 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:34:25.850 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:34:25.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:25.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:25.997 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 05:34:26.470 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 05:34:26.942 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 05:34:27.416 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 05:34:27.887 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 05:34:28.359 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 05:34:28.833 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 05:34:29.305 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 05:34:29.777 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 05:34:30.249 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 05:34:30.722 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 05:34:31.194 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 05:34:31.667 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 05:34:32.140 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 05:34:32.612 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 05:34:33.084 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 05:34:33.556 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 05:34:34.029 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 05:34:34.501 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 05:34:34.973 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 05:34:35.445 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 05:34:35.918 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 05:34:36.390 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 05:34:36.861 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 05:34:37.334 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 05:34:37.807 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 05:34:38.279 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 05:34:38.750 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 05:34:39.224 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 05:34:39.696 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 05:34:40.169 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 05:34:40.642 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 05:34:41.114 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 05:34:41.588 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 05:34:42.060 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 05:34:42.532 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 05:34:43.001 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 05:34:43.474 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 05:34:43.946 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 05:34:44.419 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 05:34:44.892 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 05:34:45.364 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 05:34:45.836 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 05:34:45.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:45.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:45.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:45.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:45.864 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:34:45.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:34:45.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:34:45.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:34:45.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:34:45.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:34:45.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:34:45.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:34:45.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:34:45.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:34:45.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:34:45.871 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:34:50.878 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:34:50.879 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:34:50.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:34:50.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:34:50.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:34:50.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:34:50.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:34:50.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:34:50.884 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:34:50.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:34:50.884 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:34:50.887 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:34:50.887 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:34:50.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:34:50.888 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:34:50.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:34:50.888 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:34:50.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:34:50.888 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:34:50.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:34:50.890 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:34:50.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:34:50.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:34:50.891 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:34:50.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:34:50.891 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:34:50.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:34:50.891 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:34:50.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:34:50.894 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:34:50.894 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:34:50.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:34:50.894 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:34:50.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:34:50.894 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:34:50.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:34:50.894 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:34:50.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:34:50.898 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:34:50.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:50.899 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:34:50.899 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:34:50.899 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:34:50.900 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:34:50.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:50.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:50.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:50.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:34:50.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:50.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:50.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:50.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:50.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:50.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:50.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:34:50.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:50.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:34:50.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:34:50.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:34:50.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:34:50.902 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:34:55.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:34:55.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:34:55.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:34:55.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:34:55.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:34:55.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:34:55.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:34:55.917 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:34:55.917 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:34:55.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:34:55.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:34:55.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:34:55.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:34:55.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:34:55.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:34:55.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:34:55.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:34:55.922 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:34:55.922 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:34:55.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:34:55.923 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:34:55.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:34:55.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:34:55.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:34:55.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:34:55.923 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:34:55.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:34:55.923 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:34:55.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:34:55.925 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:34:55.925 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:34:55.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:34:55.925 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:34:55.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:34:55.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:34:55.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:34:55.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:34:55.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:34:55.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:34:55.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:34:55.929 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:34:55.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:55.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:55.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:55.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:55.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:34:55.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:55.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:34:55.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:55.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:34:55.933 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:34:56.411 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:34:56.463 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:34:56.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:56.466 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:34:56.469 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:34:56.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:56.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:56.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:56.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:56.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:56.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:56.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:56.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:56.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:56.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:56.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:34:56.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:34:56.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:56.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:56.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:56.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:56.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:56.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:56.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:56.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:56.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:56.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:56.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:56.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:56.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:56.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:56.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:56.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:34:56.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:34:56.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:56.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:56.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:56.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:56.883 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:34:56.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:34:56.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:34:56.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:34:56.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:34:56.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:56.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:56.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:56.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:57.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:57.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:57.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:57.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:57.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:57.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:57.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:34:57.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:34:57.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:57.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:57.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:57.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:57.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:57.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:57.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:57.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:57.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:57.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:57.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:57.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:57.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:57.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:57.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:34:57.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:34:57.303 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:34:57.303 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:34:57.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.353 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:34:57.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:57.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:57.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:57.611 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:34:57.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:57.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:57.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:57.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:57.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:57.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:57.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:34:57.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:34:57.630 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:34:57.630 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:34:57.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.824 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:34:57.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:57.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:57.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:57.933 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:34:57.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:34:57.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:34:57.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:34:57.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:34:57.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:57.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:57.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:57.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:57.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:57.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:57.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:34:57.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:34:57.958 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:34:57.958 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:34:57.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:57.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:58.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:58.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:58.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:58.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:58.253 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:34:58.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:58.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:58.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:58.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:34:58.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:34:58.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:34:58.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:34:58.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:58.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:58.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:58.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:34:58.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:34:58.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:34:58.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:34:58.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:58.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:34:58.295 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:34:58.766 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:34:58.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:34:58.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:34:58.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:34:58.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:34:59.239 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:34:59.712 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:34:59.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:34:59.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:34:59.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:34:59.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:00.184 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:35:00.655 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:35:00.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:00.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:00.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:00.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:00.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:00.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:00.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:00.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:00.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:00.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:00.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:00.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:00.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:00.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:00.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:00.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:00.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:00.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:00.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:00.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:00.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:01.126 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:35:01.597 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:35:02.070 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:35:02.542 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:35:03.014 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:35:03.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:03.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:03.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:03.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:03.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:03.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:03.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:03.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:03.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:03.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:03.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:03.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:03.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:03.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:03.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:03.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:03.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:03.485 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:35:03.956 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:35:04.427 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:35:04.898 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:35:05.371 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:35:05.843 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:35:05.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:06.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:06.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:06.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:06.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:06.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:06.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:06.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:06.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:06.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:06.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:06.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:06.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:06.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:06.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:06.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:06.078 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:35:06.078 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:35:06.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:06.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:06.314 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:35:06.786 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:35:07.259 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:35:07.732 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:35:08.204 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:35:08.675 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:35:08.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:08.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:08.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:08.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:08.761 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:35:08.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:08.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:08.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:08.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:08.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:08.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:08.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:08.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:08.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:08.811 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:35:08.811 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:35:08.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:08.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:09.146 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:35:09.619 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:35:10.092 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:35:10.563 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:35:11.035 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:35:11.509 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:35:11.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:11.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:11.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:11.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:11.591 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:35:11.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:11.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:11.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:11.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:11.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:11.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:11.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:11.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:11.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:11.642 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:35:11.642 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:35:11.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:11.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:11.980 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:35:12.453 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:35:12.926 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:35:13.399 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:35:13.871 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:35:14.343 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:35:14.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:14.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:14.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:14.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:14.428 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:35:14.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:14.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:14.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:14.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:14.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:35:14.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:35:14.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:35:14.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:35:14.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:35:14.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:35:14.442 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:35:19.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:35:19.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:35:19.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:35:19.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:35:19.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:35:19.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:35:19.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:35:19.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:35:19.456 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:19.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:35:19.456 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:35:19.461 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:35:19.461 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:35:19.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:35:19.462 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:19.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:35:19.462 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:35:19.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:35:19.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:35:19.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:19.466 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:35:19.466 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:35:19.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:35:19.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:19.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:35:19.467 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:35:19.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:35:19.467 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:35:19.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:19.470 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:35:19.470 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:35:19.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:35:19.470 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:19.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:35:19.470 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:35:19.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:35:19.470 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:35:19.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:35:19.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:35:19.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:35:19.475 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:35:19.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:19.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:19.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:19.480 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:35:19.957 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:35:20.005 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:35:20.007 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:35:20.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:20.010 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:35:20.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:20.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:20.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:20.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:20.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:20.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:20.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:20.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:20.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:20.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:20.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:20.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:20.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:20.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:20.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:20.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:20.429 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:35:20.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:20.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:20.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:20.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:20.900 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:35:21.374 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:35:21.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:21.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:21.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:21.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:21.846 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:35:22.319 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:35:22.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:22.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:22.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:22.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:22.792 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:35:23.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:23.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:23.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:23.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:23.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:23.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:23.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:23.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:23.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:23.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:23.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:23.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:23.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:23.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:23.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:23.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:23.257 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:35:23.258 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:35:23.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:23.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:23.264 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:35:23.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:23.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:23.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:23.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:23.736 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:35:24.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:35:24.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:24.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:24.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:24.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:24.683 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:35:25.155 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:35:25.628 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:35:26.101 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:35:26.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:26.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:26.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:26.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:26.467 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:35:26.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:26.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:26.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:26.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:26.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:26.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:26.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:26.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:26.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:26.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:26.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:26.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:26.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:26.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:26.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:26.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:26.573 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:35:27.045 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:35:27.518 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:35:27.990 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:35:28.463 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:35:28.936 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:35:29.408 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:35:29.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:29.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:29.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:29.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:29.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:29.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:29.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:29.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:29.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:29.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:29.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:29.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:29.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:29.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:29.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:29.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:29.879 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:35:29.879 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:35:29.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:29.880 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:35:29.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:30.353 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:35:30.826 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:35:31.298 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:35:31.772 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:35:32.244 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:35:32.716 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:35:33.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:33.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:33.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:33.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:33.038 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:35:33.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:33.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:33.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:33.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:33.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:35:33.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:35:33.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:35:33.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:35:33.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:35:33.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:35:33.054 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:35:33.054 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2931 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:35:33.054 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2931 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:35:33.054 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2931 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:35:33.054 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2931 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:35:33.054 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2931 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:35:33.054 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=2931 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:35:38.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:35:38.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:35:38.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:35:38.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:35:38.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:35:38.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:35:38.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:35:38.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:35:38.063 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:38.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:35:38.063 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:35:38.065 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:35:38.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:35:38.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:35:38.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:38.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:35:38.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:35:38.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:35:38.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:35:38.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:38.069 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:35:38.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:35:38.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:35:38.070 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:38.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:35:38.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:35:38.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:35:38.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:35:38.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:38.074 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:35:38.074 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:35:38.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:35:38.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:38.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:35:38.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:35:38.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:35:38.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:35:38.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:38.080 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:35:38.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:35:38.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:35:38.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:38.081 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:35:38.081 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:35:38.081 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:35:38.082 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:35:38.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:38.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:38.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:38.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:35:38.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:38.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:38.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:38.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:38.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:38.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:38.086 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:35:38.562 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:35:38.615 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:35:38.617 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:35:38.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:38.620 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:35:38.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:38.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:38.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:38.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:38.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:38.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:38.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:38.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:38.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:38.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:38.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:38.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:38.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:38.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:38.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:38.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:39.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:35:39.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:39.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:39.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:39.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:39.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:39.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:39.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:39.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:39.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:39.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:39.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:39.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:39.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:39.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:39.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:39.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:39.071 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:35:39.071 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:35:39.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:39.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:39.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:39.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:39.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:39.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:39.505 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:35:39.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:39.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:39.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:39.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:39.565 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:35:39.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:39.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:39.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:39.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:39.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:39.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:39.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:39.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:39.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:39.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:39.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:39.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:39.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:39.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:39.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:39.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:39.977 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:35:40.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:40.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:40.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:40.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:40.448 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:35:40.919 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:35:41.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:41.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:41.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:41.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:41.392 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:35:41.864 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:35:42.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:42.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:42.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:42.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:42.336 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:35:42.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:42.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:42.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:42.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:42.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:42.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:42.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:42.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:42.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:42.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:42.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:42.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:42.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:42.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:42.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:42.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:42.570 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:35:42.570 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:35:42.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:42.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:42.806 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:35:43.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:43.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:43.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:43.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:43.278 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:35:43.752 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:35:44.224 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:35:44.696 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:35:45.169 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:35:45.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:45.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:45.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:45.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:45.488 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:35:45.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:45.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:45.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:45.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:45.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:35:45.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:35:45.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:35:45.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:35:45.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:35:45.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:35:45.502 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:35:50.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:35:50.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:35:50.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:35:50.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:35:50.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:35:50.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:35:50.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:35:50.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:35:50.514 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:50.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:35:50.514 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:35:50.518 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:35:50.518 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:35:50.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:35:50.519 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:50.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:35:50.520 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:35:50.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:35:50.520 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:35:50.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:50.522 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:35:50.522 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:35:50.522 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:35:50.523 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:50.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:35:50.523 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:35:50.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:35:50.523 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:35:50.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:50.525 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:35:50.525 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:35:50.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:35:50.525 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:35:50.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:35:50.526 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:35:50.526 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:35:50.526 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:35:50.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:50.529 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:35:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:35:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:35:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:35:50.529 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:35:50.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:35:50.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:35:50.530 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:35:50.530 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:35:50.530 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:50.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:35:50.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:35:50.535 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:35:51.013 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:35:51.063 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:35:51.066 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:35:51.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:51.068 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:35:51.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:51.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:51.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:51.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:51.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:51.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:51.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:51.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:51.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:51.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:51.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:51.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:51.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:51.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:51.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:51.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:51.486 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:35:51.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:51.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:51.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:51.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:51.957 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:35:52.430 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:35:52.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:52.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:52.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:52.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:52.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:52.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:52.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:52.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:52.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:52.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:52.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:52.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:52.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:52.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:52.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:52.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:52.518 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:35:52.518 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:35:52.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:52.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:52.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:52.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:52.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:52.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:52.901 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:35:53.373 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:35:53.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:53.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:53.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:53.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:53.841 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:35:54.314 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:35:54.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:54.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:54.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:54.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:54.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:54.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:54.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:54.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:54.639 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:35:54.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:54.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:54.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:54.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:54.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:54.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:54.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:54.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:54.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:54.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:54.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:54.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:54.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:54.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:54.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:54.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:54.786 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:35:55.258 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:35:55.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:35:55.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:35:55.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:35:55.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:35:55.729 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:35:56.200 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:35:56.673 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:35:57.146 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:35:57.618 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:35:58.089 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:35:58.562 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:35:59.035 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:35:59.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:59.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:59.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:59.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:59.507 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:35:59.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:59.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:59.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:59.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:35:59.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:35:59.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:35:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:35:59.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:59.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:35:59.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:35:59.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:35:59.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:35:59.550 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:35:59.550 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:35:59.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:59.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:35:59.977 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:36:00.450 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:36:00.923 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:36:01.396 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:36:01.869 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:36:02.341 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:36:02.813 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:36:03.284 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:36:03.758 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:36:04.230 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:36:04.702 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:36:05.176 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:36:05.648 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:36:06.120 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:36:06.591 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:36:07.065 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:36:07.537 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:36:08.009 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:36:08.481 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:36:08.954 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:36:09.427 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:36:09.899 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:36:10.368 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:36:10.840 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:36:11.313 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:36:11.785 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:36:12.257 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:36:12.730 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:36:13.202 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:36:13.675 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:36:14.148 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:36:14.620 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:36:15.091 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:36:15.563 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:36:16.036 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:36:16.509 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:36:16.982 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:36:17.454 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:36:17.927 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:36:18.400 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:36:18.872 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:36:19.344 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:36:19.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:19.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:19.525 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:36:19.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:19.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:19.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:19.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:19.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:36:19.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:36:19.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:36:19.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:36:19.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:36:19.529 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:36:19.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:36:24.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:36:24.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:36:24.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:36:24.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:36:24.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:36:24.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:36:24.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:36:24.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:36:24.543 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:36:24.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:36:24.544 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:36:24.549 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:36:24.549 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:36:24.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:36:24.549 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:36:24.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:36:24.550 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:36:24.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:36:24.550 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:36:24.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:24.553 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:36:24.553 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:36:24.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:36:24.553 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:36:24.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:36:24.554 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:36:24.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:36:24.554 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:36:24.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:24.557 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:36:24.558 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:36:24.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:36:24.558 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:36:24.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:36:24.558 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:36:24.558 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:36:24.558 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:36:24.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:24.562 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:36:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:36:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:36:24.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:36:24.562 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:36:24.563 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:36:24.563 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:36:24.563 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:24.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:24.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:24.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:24.568 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:36:25.045 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:36:25.094 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:36:25.096 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:36:25.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:25.098 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:36:25.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:25.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:25.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:25.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:25.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:25.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:25.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:25.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:25.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:25.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:25.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:36:25.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:36:25.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:25.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:25.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:25.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:25.517 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:36:25.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:25.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:25.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:25.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:25.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:25.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:25.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:25.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:25.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:25.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:25.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:25.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:25.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:25.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:25.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:25.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:25.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:25.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:25.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:36:25.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:36:25.840 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:36:25.840 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:36:25.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:25.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:25.988 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:36:26.461 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:36:26.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:26.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:26.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:26.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:26.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:26.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:26.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:26.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:26.766 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:36:26.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:26.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:26.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:26.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:26.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:26.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:26.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:26.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:26.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:26.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:26.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:36:26.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:36:26.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:26.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:26.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:26.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:26.932 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:36:27.405 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:36:27.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:27.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:27.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:27.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:27.877 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:36:28.348 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:36:28.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:28.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:28.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:28.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:28.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:28.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:28.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:28.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:28.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:28.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:28.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:28.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:28.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:28.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:28.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:28.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:28.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:28.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:28.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:36:28.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:36:28.816 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:36:28.816 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:36:28.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:28.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:28.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:36:29.290 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:36:29.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:29.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:29.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:29.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:29.763 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:36:30.235 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:36:30.708 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:36:31.181 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:36:31.653 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:36:32.126 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:36:32.599 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:36:33.071 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:36:33.543 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:36:34.016 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:36:34.488 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:36:34.961 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:36:35.434 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:36:35.906 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:36:36.378 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:36:36.850 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:36:37.323 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:36:37.795 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:36:38.267 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:36:38.739 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:36:39.213 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:36:39.685 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:36:40.158 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:36:40.630 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:36:41.103 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:36:41.576 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:36:42.049 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:36:42.521 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:36:42.993 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:36:43.466 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:36:43.938 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:36:44.410 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:36:44.881 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:36:45.355 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:36:45.826 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:36:46.298 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:36:46.771 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:36:47.245 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:36:47.717 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:36:48.189 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:36:48.662 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:36:48.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:48.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:48.765 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:36:48.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:48.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:48.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:48.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:48.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:36:48.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:36:48.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:36:48.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:36:48.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:36:48.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:36:48.769 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:36:48.769 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:36:48.769 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:36:48.769 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:36:48.769 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:36:48.769 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:36:48.769 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=5227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:36:53.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:36:53.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:36:53.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:36:53.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:36:53.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:36:53.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:36:53.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:36:53.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:36:53.784 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:36:53.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:36:53.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:36:53.787 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:36:53.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:36:53.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:36:53.788 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:36:53.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:36:53.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:36:53.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:36:53.789 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:36:53.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:53.790 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:36:53.790 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:36:53.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:36:53.791 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:36:53.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:36:53.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:36:53.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:36:53.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:36:53.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:53.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:36:53.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:36:53.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:36:53.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:36:53.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:36:53.794 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:36:53.794 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:36:53.794 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:36:53.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:53.797 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:36:53.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:36:53.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:36:53.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:36:53.797 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:36:53.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:36:53.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:36:53.798 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:36:53.798 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:36:53.798 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:53.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:36:53.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:36:53.803 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:36:54.281 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:36:54.330 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:36:54.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:54.333 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:36:54.336 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:36:54.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:54.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:54.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:54.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:54.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:54.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:54.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:54.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:54.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:54.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:54.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:36:54.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:36:54.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:54.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:54.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:54.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:54.752 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:36:54.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:54.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:54.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:54.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:55.224 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:36:55.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:36:55.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:55.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:55.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:55.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:56.170 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:36:56.642 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:36:56.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:56.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:56.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:56.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:56.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:56.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:56.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:56.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:56.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:56.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:56.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:56.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:56.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:56.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:56.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:56.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:56.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:56.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:56.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:36:56.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:36:56.923 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:36:56.924 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:36:56.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:56.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:57.114 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:36:57.588 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:36:57.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:57.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:57.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:57.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:58.061 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:36:58.533 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:36:58.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:36:58.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:36:58.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:36:58.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:36:59.006 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:36:59.477 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:36:59.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:59.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:59.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:59.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:59.616 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:36:59.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:59.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:59.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:59.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:36:59.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:36:59.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:36:59.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:36:59.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:59.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:59.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:59.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:36:59.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:36:59.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:36:59.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:36:59.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:59.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:36:59.949 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:37:00.421 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:37:00.892 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:37:01.363 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:37:01.834 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:37:02.307 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:37:02.779 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:37:02.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:02.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:02.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:02.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:02.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:02.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:02.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:02.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:02.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:02.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:02.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:02.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:02.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:37:02.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:37:02.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:37:02.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:37:03.015 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:37:03.015 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:37:03.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:03.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:03.250 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:37:03.722 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:37:04.196 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:37:04.669 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:37:05.141 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:37:05.614 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:37:06.086 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:37:06.558 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:37:07.032 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:37:07.504 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:37:07.976 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:37:08.448 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:37:08.921 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:37:09.394 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:37:09.867 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:37:10.339 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:37:10.811 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:37:11.284 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:37:11.757 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:37:12.229 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:37:12.701 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:37:13.175 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:37:13.646 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:37:14.118 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:37:14.592 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:37:15.064 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:37:15.535 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:37:16.008 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:37:16.480 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:37:16.952 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:37:17.424 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:37:17.897 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:37:18.369 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:37:18.841 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:37:19.313 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:37:19.787 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:37:20.259 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:37:20.732 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:37:21.205 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:37:21.677 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:37:22.150 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:37:22.623 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:37:22.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:22.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:22.962 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:37:22.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:22.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:22.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:22.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:22.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:37:22.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:37:22.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:37:22.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:37:22.966 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:37:22.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:37:22.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:37:22.966 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6298 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:37:22.966 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6298 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:37:22.966 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6298 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:37:22.966 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=6298 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:37:27.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:37:27.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:37:27.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:37:27.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:37:27.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:37:27.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:37:27.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:37:27.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:37:27.983 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:37:27.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:37:27.983 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:37:27.988 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:37:27.989 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:37:27.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:37:27.989 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:37:27.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:37:27.989 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:37:27.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:37:27.990 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:37:27.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:27.994 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:37:27.994 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:37:27.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:37:27.994 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:37:27.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:37:27.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:37:27.995 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:37:27.995 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:37:27.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:27.998 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:37:27.998 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:37:27.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:37:27.999 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:37:27.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:37:27.999 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:37:27.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:37:27.999 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:37:27.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:37:28.005 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:37:28.006 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:37:28.006 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:37:28.006 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:28.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:28.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:28.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:28.011 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:37:28.489 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:37:28.538 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:37:28.541 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:37:28.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:28.543 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:37:28.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:28.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:28.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:28.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:28.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:28.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:28.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:28.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:28.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:37:28.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:37:28.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:37:28.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:37:28.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:37:28.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:37:28.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:28.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:28.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:28.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:28.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:28.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:28.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:28.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:28.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:28.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:28.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:28.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:28.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:28.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:28.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:37:28.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:37:28.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:37:28.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:37:28.908 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:37:28.909 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:37:28.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:28.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:28.960 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:37:29.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:29.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:29.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:29.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:29.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:29.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:29.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:29.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:29.251 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:37:29.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:29.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:29.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:29.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:29.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:29.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:29.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:29.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:29.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:37:29.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:37:29.269 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:37:29.269 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:37:29.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:37:29.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:37:29.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:29.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:29.432 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:37:29.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:29.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:29.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:29.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:29.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:29.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:29.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:29.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:29.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:29.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:29.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:29.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:29.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:37:29.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:37:29.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:37:29.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:37:29.900 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:37:29.901 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:37:29.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:29.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:29.904 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:37:30.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:30.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:30.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:30.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:30.376 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:37:30.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:30.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:30.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:30.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:30.461 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:37:30.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:30.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:30.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:30.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:30.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:37:30.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:37:30.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:37:30.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:37:30.469 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:37:30.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:37:30.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:37:30.470 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:37:30.470 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:37:30.470 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:37:30.470 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:37:30.470 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:37:30.470 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:37:35.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:37:35.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:37:35.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:37:35.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:37:35.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:37:35.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:37:35.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:37:35.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:37:35.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:37:35.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:37:35.486 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:37:35.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:37:35.490 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:37:35.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:37:35.490 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:37:35.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:37:35.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:37:35.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:37:35.492 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:37:35.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:35.493 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:37:35.494 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:37:35.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:37:35.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:37:35.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:37:35.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:37:35.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:37:35.495 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:37:35.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:35.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:37:35.497 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:37:35.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:37:35.497 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:37:35.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:37:35.497 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:37:35.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:37:35.497 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:37:35.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:35.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:37:35.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:37:35.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:37:35.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:37:35.500 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:37:35.501 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:37:35.501 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:37:35.501 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:35.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:35.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:37:35.506 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:37:35.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:37:36.033 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:37:36.035 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:37:36.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:36.037 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:37:36.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:36.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:36.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:36.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:37:36.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:37:36.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:37:36.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:37:36.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:36.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:37:36.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:37:36.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:37:36.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:37:36.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:37:36.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:37:36.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:36.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:37:36.456 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:37:36.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:36.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:36.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:36.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:36.928 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:37:37.399 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:37:37.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:37.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:37.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:37.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:37.871 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:37:38.344 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:37:38.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:38.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:38.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:38.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:38.817 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:37:39.289 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:37:39.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:39.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:39.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:39.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:39.760 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:37:40.233 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:37:40.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:37:40.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:37:40.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:37:40.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:37:40.706 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:37:41.179 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:37:41.649 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:37:42.122 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:37:42.595 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:37:43.068 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:37:43.541 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:37:44.013 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:37:44.495 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:37:44.968 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:37:45.438 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:37:45.909 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:37:46.383 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:37:46.855 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:37:47.328 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:37:47.801 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:37:48.274 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:37:48.746 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:37:49.219 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:37:49.692 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:37:50.164 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:37:50.638 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:37:51.110 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:37:51.583 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:37:52.054 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:37:52.527 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:37:53.000 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:37:53.471 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:37:53.943 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:37:54.416 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:37:54.889 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:37:55.361 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:37:55.832 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:37:56.305 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:37:56.778 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:37:57.250 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:37:57.721 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:37:58.192 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:37:58.665 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:37:59.138 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:37:59.610 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:38:00.081 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:38:00.554 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:38:01.027 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:38:01.499 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:38:01.970 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:38:02.443 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:38:02.916 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:38:03.389 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:38:03.859 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:38:04.330 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:38:04.804 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 05:38:05.276 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 05:38:05.749 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 05:38:06.222 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 05:38:06.694 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 05:38:07.167 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 05:38:07.640 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 05:38:08.113 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 05:38:08.585 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 05:38:09.059 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 05:38:09.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:38:09.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:38:09.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:38:09.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:38:09.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:38:09.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:38:09.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:38:09.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:38:09.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:38:09.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:38:09.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:38:09.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:38:09.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:38:09.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:38:09.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:38:09.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:38:09.145 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:38:09.145 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:38:09.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:38:09.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:38:09.531 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 05:38:10.004 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 05:38:10.477 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 05:38:10.951 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 05:38:11.424 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 05:38:11.896 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 05:38:12.371 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 05:38:12.845 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 05:38:13.318 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 05:38:13.792 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 05:38:14.265 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 05:38:14.737 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 05:38:15.208 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 05:38:15.681 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 05:38:16.154 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 05:38:16.626 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 05:38:17.100 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 05:38:17.573 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 05:38:18.045 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 05:38:18.518 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 05:38:18.990 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 05:38:19.463 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 05:38:19.936 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 05:38:20.408 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 05:38:20.881 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 05:38:21.355 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 05:38:21.827 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 05:38:22.300 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 05:38:22.773 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 05:38:23.246 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 05:38:23.715 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-04-19 05:38:24.187 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-04-19 05:38:24.661 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-04-19 05:38:25.133 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-04-19 05:38:25.606 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-04-19 05:38:26.080 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-04-19 05:38:26.552 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-04-19 05:38:27.025 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-04-19 05:38:27.498 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-04-19 05:38:27.971 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-04-19 05:38:28.444 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-04-19 05:38:28.913 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-04-19 05:38:29.386 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-04-19 05:38:29.857 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-04-19 05:38:30.329 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-04-19 05:38:30.801 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-04-19 05:38:31.274 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-04-19 05:38:31.747 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-04-19 05:38:32.220 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-04-19 05:38:32.693 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-04-19 05:38:33.165 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-04-19 05:38:33.638 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-04-19 05:38:34.112 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-04-19 05:38:34.581 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-04-19 05:38:35.053 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-04-19 05:38:35.526 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-04-19 05:38:35.998 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-04-19 05:38:36.472 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-04-19 05:38:36.944 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-04-19 05:38:37.417 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-04-19 05:38:37.890 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-04-19 05:38:38.363 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-04-19 05:38:38.835 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-04-19 05:38:39.308 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-04-19 05:38:39.781 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-04-19 05:38:40.254 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-04-19 05:38:40.727 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-04-19 05:38:41.199 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-04-19 05:38:41.672 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-04-19 05:38:42.145 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-04-19 05:38:42.618 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-04-19 05:38:42.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:38:42.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:38:42.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:38:42.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:38:42.703 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:38:42.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:38:42.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:38:42.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:38:42.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:38:42.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:38:42.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:38:42.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:38:42.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:38:42.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:38:42.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:38:42.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:38:42.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:38:42.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:38:42.754 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:38:42.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:38:42.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:38:43.088 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-04-19 05:38:43.562 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-04-19 05:38:44.034 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-04-19 05:38:44.506 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-04-19 05:38:44.977 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-04-19 05:38:45.451 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-04-19 05:38:45.923 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-04-19 05:38:46.395 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-04-19 05:38:46.866 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-04-19 05:38:47.337 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-04-19 05:38:47.810 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-04-19 05:38:48.283 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-04-19 05:38:48.755 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-04-19 05:38:49.226 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-04-19 05:38:49.699 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-04-19 05:38:50.171 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-04-19 05:38:50.644 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-04-19 05:38:51.117 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-04-19 05:38:51.590 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-04-19 05:38:52.062 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-04-19 05:38:52.533 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-04-19 05:38:53.006 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-04-19 05:38:53.478 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-04-19 05:38:53.950 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-04-19 05:38:54.421 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-04-19 05:38:54.894 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-04-19 05:38:55.366 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-04-19 05:38:55.839 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-04-19 05:38:56.309 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-04-19 05:38:56.780 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-04-19 05:38:57.251 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-04-19 05:38:57.722 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-04-19 05:38:58.193 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-04-19 05:38:58.666 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-04-19 05:38:59.138 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-04-19 05:38:59.610 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-04-19 05:39:00.081 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-04-19 05:39:00.555 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-04-19 05:39:01.027 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-04-19 05:39:01.499 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-04-19 05:39:01.970 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-04-19 05:39:02.443 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-04-19 05:39:02.916 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-04-19 05:39:03.388 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-04-19 05:39:03.859 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-04-19 05:39:04.332 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-04-19 05:39:04.805 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-04-19 05:39:05.276 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-04-19 05:39:05.747 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-04-19 05:39:06.221 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-04-19 05:39:06.693 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-04-19 05:39:07.165 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-04-19 05:39:07.636 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-04-19 05:39:08.110 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-04-19 05:39:08.582 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-04-19 05:39:09.053 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-04-19 05:39:09.524 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-04-19 05:39:09.997 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-04-19 05:39:10.470 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-04-19 05:39:10.942 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-04-19 05:39:11.413 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-04-19 05:39:11.887 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-04-19 05:39:12.359 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-04-19 05:39:12.831 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-04-19 05:39:13.302 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-04-19 05:39:13.773 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-04-19 05:39:14.244 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-04-19 05:39:14.714 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-04-19 05:39:15.185 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-04-19 05:39:15.658 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-04-19 05:39:16.131 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-04-19 05:39:16.603 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-04-19 05:39:17.074 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-04-19 05:39:17.545 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-04-19 05:39:17.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:17.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:17.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:17.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:17.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:17.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:17.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:17.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:17.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:17.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:17.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:17.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:17.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:39:17.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:39:17.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:39:17.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:39:17.963 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:39:17.963 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:39:17.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:17.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:18.016 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-04-19 05:39:18.490 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-04-19 05:39:18.963 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-04-19 05:39:19.436 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-04-19 05:39:19.908 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-04-19 05:39:20.380 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-04-19 05:39:20.851 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-04-19 05:39:21.324 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-04-19 05:39:21.797 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-04-19 05:39:22.269 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-04-19 05:39:22.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:22.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:22.334 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:39:22.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:22.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:22.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:22.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:22.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:39:22.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:39:22.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:39:22.338 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:39:22.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:39:22.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:39:22.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:39:22.338 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=23069 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:39:22.338 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=23069 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:39:22.338 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=23069 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:39:22.338 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=23069 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:39:22.338 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=23069 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:39:22.338 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=23069 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:39:27.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:39:27.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:39:27.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:39:27.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:39:27.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:39:27.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:39:27.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:39:27.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:39:27.358 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:27.359 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:39:27.359 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:39:27.363 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:39:27.363 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:39:27.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:39:27.364 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:27.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:39:27.365 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:39:27.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:39:27.366 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:39:27.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:27.368 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:39:27.369 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:39:27.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:39:27.369 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:27.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:39:27.370 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:39:27.370 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:39:27.370 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:39:27.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:27.373 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:39:27.373 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:39:27.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:39:27.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:27.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:39:27.374 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:39:27.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:39:27.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:39:27.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:27.379 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:39:27.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:39:27.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:39:27.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:39:27.379 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:39:27.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:27.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:39:27.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:39:27.380 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:39:27.380 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:39:27.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:27.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:27.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:27.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:39:27.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:27.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:27.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:39:27.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:39:27.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:39:27.383 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:39:32.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:39:32.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:39:32.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:39:32.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:39:32.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:39:32.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:39:32.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:39:32.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:39:32.399 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:32.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:39:32.399 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:39:32.402 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:39:32.402 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:39:32.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:39:32.402 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:32.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:39:32.403 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:39:32.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:39:32.403 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:39:32.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:32.404 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:39:32.404 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:39:32.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:39:32.404 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:32.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:39:32.405 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:39:32.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:39:32.405 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:39:32.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:32.406 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:39:32.406 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:39:32.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:39:32.407 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:32.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:39:32.407 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:39:32.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:39:32.407 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:39:32.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:32.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:39:32.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:39:32.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:39:32.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:39:32.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:39:32.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:39:32.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:39:32.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:32.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:39:32.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:39:32.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:39:32.410 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:39:32.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:32.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:32.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:32.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:32.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:32.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:32.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:32.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:32.414 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:39:32.893 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:39:32.937 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:39:32.938 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:39:32.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:32.940 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:39:32.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:32.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:32.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:32.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:32.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:32.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:32.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:32.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:32.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:39:32.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:39:32.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:39:32.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:39:33.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:39:33.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:39:33.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:33.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:33.366 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:39:33.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:33.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:33.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:33.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:33.839 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:39:34.312 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:39:34.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:34.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:34.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:34.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:34.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:34.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:34.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:34.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:34.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:34.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:34.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:34.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:34.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:34.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:34.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:34.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:34.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:39:34.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:39:34.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:39:34.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:39:34.547 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:39:34.547 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:39:34.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:34.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:34.784 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:39:35.258 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:39:35.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:35.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:35.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:35.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:35.731 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:39:36.203 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:39:36.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:36.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:36.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:36.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:36.674 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:39:36.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:36.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:36.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:36.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:36.866 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:39:36.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:36.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:36.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:36.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:36.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:36.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:36.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:36.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:36.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:39:36.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:39:36.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:39:36.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:39:36.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:39:36.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:39:36.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:36.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:37.144 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:39:37.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:37.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:37.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:37.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:37.615 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:39:38.088 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:39:38.561 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:39:39.033 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:39:39.504 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:39:39.974 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:39:40.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:40.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:40.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:40.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:40.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:40.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:40.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:40.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:40.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:40.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:40.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:40.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:40.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:39:40.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:39:40.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:39:40.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:39:40.443 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:39:40.443 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:39:40.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:40.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:40.445 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:39:40.918 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:39:41.391 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:39:41.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:41.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:41.474 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:39:41.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:41.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:41.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:41.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:41.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:39:41.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:39:41.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:39:41.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:39:41.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:39:41.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:39:41.479 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:39:46.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:39:46.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:39:46.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:39:46.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:39:46.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:39:46.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:39:46.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:39:46.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:39:46.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:46.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:39:46.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:39:46.498 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:39:46.499 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:39:46.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:39:46.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:46.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:39:46.499 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:39:46.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:39:46.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:39:46.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:46.503 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:39:46.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:39:46.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:39:46.504 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:46.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:39:46.504 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:39:46.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:39:46.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:39:46.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:46.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:39:46.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:39:46.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:39:46.509 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:39:46.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:39:46.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:39:46.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:39:46.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:39:46.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:39:46.515 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:39:46.516 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:39:46.516 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:39:46.516 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:46.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:46.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:39:46.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:46.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:46.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:46.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:46.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:46.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:46.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:46.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:46.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:39:46.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:39:46.521 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:39:46.999 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:39:47.048 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:39:47.050 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:39:47.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:47.052 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:39:47.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:47.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:47.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:47.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:39:47.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:39:47.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:39:47.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:39:47.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:47.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:39:47.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:39:47.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:39:47.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:39:47.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:39:47.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:39:47.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:47.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:39:47.471 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:39:47.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:47.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:47.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:47.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:47.945 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:39:48.418 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:39:48.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:48.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:48.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:48.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:48.890 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:39:49.361 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:39:49.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:49.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:49.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:49.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:49.834 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:39:50.307 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:39:50.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:50.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:50.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:50.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:50.779 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:39:51.252 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:39:51.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:39:51.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:39:51.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:39:51.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:39:51.725 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:39:52.198 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:39:52.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:39:53.144 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:39:53.616 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:39:54.087 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:39:54.558 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:39:55.031 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:39:55.504 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:39:55.976 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:39:56.447 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:39:56.918 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:39:57.391 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:39:57.864 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:39:58.336 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:39:58.810 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:39:59.282 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:39:59.760 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:40:00.232 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:40:00.705 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:40:01.178 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:40:01.651 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:40:02.124 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:40:02.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:02.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:40:02.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:02.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:02.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:02.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:02.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:40:02.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:02.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:02.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:40:02.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:40:02.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:02.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:40:02.446 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:40:02.446 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:40:02.446 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:40:02.493 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:40:02.493 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:40:02.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:02.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:02.596 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:40:03.068 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:40:03.541 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:40:04.014 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:40:04.486 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:40:04.959 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:40:05.432 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:40:05.905 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:40:06.379 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:40:06.851 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:40:07.323 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:40:07.797 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:40:08.270 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:40:08.742 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:40:09.213 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:40:09.688 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:40:10.160 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:40:10.633 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:40:11.106 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:40:11.579 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:40:12.053 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:40:12.525 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:40:12.997 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:40:13.470 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:40:13.942 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:40:14.416 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:40:14.889 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:40:15.361 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:40:15.834 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 05:40:16.307 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 05:40:16.779 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 05:40:17.252 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 05:40:17.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:17.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:40:17.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:17.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:17.603 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:40:17.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:17.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:17.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:40:17.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:17.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:17.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:40:17.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:40:17.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:17.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:40:17.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:40:17.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:40:17.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:40:17.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:40:17.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:40:17.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:17.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:17.725 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 05:40:18.197 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 05:40:18.670 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 05:40:19.143 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 05:40:19.615 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 05:40:20.086 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 05:40:20.559 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 05:40:21.031 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 05:40:21.504 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 05:40:21.974 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 05:40:22.445 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 05:40:22.918 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 05:40:23.390 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 05:40:23.862 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 05:40:24.333 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 05:40:24.807 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 05:40:25.279 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 05:40:25.751 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 05:40:26.222 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 05:40:26.693 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-04-19 05:40:27.166 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-04-19 05:40:27.639 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-04-19 05:40:28.111 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-04-19 05:40:28.582 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-04-19 05:40:29.055 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-04-19 05:40:29.528 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-04-19 05:40:30.000 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-04-19 05:40:30.473 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-04-19 05:40:30.946 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-04-19 05:40:31.418 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-04-19 05:40:31.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:31.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:40:31.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:31.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:31.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:31.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:31.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:40:31.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:31.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:31.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:40:31.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:40:31.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:31.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:40:31.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:40:31.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:40:31.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:40:31.888 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-04-19 05:40:31.933 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:40:31.934 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:40:31.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:31.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:32.360 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-04-19 05:40:32.833 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-04-19 05:40:33.305 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-04-19 05:40:33.778 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-04-19 05:40:34.251 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-04-19 05:40:34.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:34.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:34.640 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:40:34.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:40:34.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:40:34.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:40:34.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:40:34.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:40:34.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:40:34.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:40:34.645 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:40:34.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:40:34.645 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:40:34.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:40:34.645 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10390 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:40:34.645 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10390 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:40:34.645 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10390 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:40:34.645 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:40:34.645 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:40:34.645 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:40:34.645 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=10390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:40:39.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:40:39.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:40:39.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:40:39.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:40:39.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:40:39.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:40:39.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:40:39.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:40:39.663 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:40:39.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:40:39.664 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:40:39.666 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:40:39.667 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:40:39.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:40:39.667 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:40:39.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:40:39.668 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:40:39.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:40:39.668 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:40:39.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:40:39.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:40:39.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:40:39.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:40:39.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:40:39.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:40:39.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:40:39.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:40:39.670 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:40:39.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:40:39.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:40:39.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:40:39.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:40:39.672 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:40:39.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:40:39.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:40:39.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:40:39.672 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:40:39.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:40:39.675 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:40:39.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:40:39.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:40:39.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:40:39.675 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:40:39.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:40:39.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:40:39.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:40:39.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:40:39.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:40:39.676 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:40:39.676 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:40:39.676 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:40:39.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:40:39.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:40:39.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:40:39.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:40:39.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:40:39.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:40:39.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:40:39.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:40:39.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:40:39.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:40:39.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:40:39.680 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:40:40.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:40:40.203 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:40:40.205 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:40:40.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:40:40.207 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:40:40.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:40.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:40.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:40:40.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:40.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:40.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:40:40.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:40:40.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:40.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:40:40.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:40:40.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:40:40.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:40:40.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:40:40.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:40:40.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:40.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:40.631 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:40:40.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:40:40.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:40:40.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:40:40.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:40:41.102 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:40:41.575 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:40:41.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:40:41.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:40:41.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:40:41.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:40:42.048 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:40:42.520 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:40:42.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:40:42.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:40:42.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:40:42.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:40:42.991 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:40:43.464 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:40:43.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:40:43.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:40:43.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:40:43.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:40:43.938 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:40:44.410 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:40:44.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:40:44.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:40:44.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:40:44.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:40:44.881 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:40:45.354 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:40:45.827 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:40:46.299 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:40:46.772 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:40:47.245 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:40:47.718 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:40:48.191 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:40:48.664 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:40:49.136 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:40:49.607 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:40:50.078 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:40:50.551 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:40:50.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:50.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:40:50.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:50.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:50.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:50.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:50.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:40:50.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:40:50.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:40:50.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:40:50.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:40:50.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:50.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:40:50.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:40:50.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:40:50.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:40:50.829 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:40:50.829 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:40:50.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:50.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:40:51.023 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:40:51.496 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:40:51.969 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:40:52.442 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:40:52.915 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:40:53.388 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:40:53.860 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:40:54.333 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:40:54.806 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:40:55.279 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:40:55.753 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:40:56.226 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:40:56.699 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:40:57.171 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:40:57.644 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:40:58.118 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:40:58.590 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:40:59.064 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:40:59.537 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:41:00.009 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:41:00.482 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:41:00.955 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:41:01.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:01.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:01.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:01.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:01.129 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:41:01.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:01.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:01.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:01.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:01.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:01.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:01.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:01.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:01.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:01.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:01.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:01.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:01.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:01.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:01.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:01.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:01.427 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:41:01.898 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:41:02.369 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:41:02.842 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-04-19 05:41:03.314 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-04-19 05:41:03.786 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-04-19 05:41:04.257 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-04-19 05:41:04.730 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-04-19 05:41:05.203 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-04-19 05:41:05.675 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-04-19 05:41:06.148 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-04-19 05:41:06.621 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-04-19 05:41:07.093 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-04-19 05:41:07.564 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-04-19 05:41:08.034 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-04-19 05:41:08.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:08.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:08.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:08.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:08.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:08.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:08.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:08.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:08.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:08.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:08.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:08.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:08.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:08.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:08.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:08.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:08.125 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:41:08.125 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:41:08.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:08.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:08.505 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-04-19 05:41:08.977 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-04-19 05:41:09.450 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-04-19 05:41:09.922 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-04-19 05:41:10.395 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-04-19 05:41:10.868 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-04-19 05:41:11.340 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-04-19 05:41:11.813 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-04-19 05:41:12.286 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-04-19 05:41:12.758 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-04-19 05:41:13.230 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-04-19 05:41:13.704 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-04-19 05:41:14.176 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-04-19 05:41:14.649 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-04-19 05:41:15.122 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-04-19 05:41:15.594 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-04-19 05:41:16.066 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-04-19 05:41:16.539 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-04-19 05:41:17.012 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-04-19 05:41:17.485 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-04-19 05:41:17.957 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-04-19 05:41:18.429 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-04-19 05:41:18.903 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-04-19 05:41:19.375 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-04-19 05:41:19.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:19.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:19.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:19.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:19.462 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:41:19.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:19.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:19.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:19.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:19.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:41:19.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:41:19.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:41:19.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:41:19.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:41:19.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:41:19.472 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:41:24.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:41:24.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:41:24.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:41:24.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:41:24.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:41:24.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:41:24.492 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:41:24.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:41:24.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:24.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:41:24.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:41:24.497 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:41:24.497 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:41:24.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:41:24.497 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:24.498 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:41:24.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:41:24.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:41:24.498 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:41:24.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:24.501 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:41:24.501 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:41:24.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:41:24.501 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:24.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:41:24.501 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:41:24.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:41:24.502 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:41:24.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:24.503 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:41:24.503 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:41:24.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:41:24.503 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:24.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:41:24.503 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:41:24.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:41:24.504 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:41:24.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:24.506 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:41:24.506 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:41:24.506 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:41:24.506 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:24.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:24.511 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:41:24.989 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:41:25.043 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:41:25.046 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:41:25.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:25.046 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:41:25.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:25.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:25.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:25.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:25.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:25.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:25.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:25.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:25.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:25.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:25.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:25.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:25.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:25.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:25.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:25.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:25.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:25.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:25.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:25.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:25.461 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:41:25.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:25.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:25.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:25.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:25.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:25.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:25.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:25.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:25.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:25.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:25.476 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:25.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:25.506 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:41:25.506 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:41:25.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:25.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:25.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:25.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:25.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:25.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:25.933 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:41:26.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:26.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:26.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:26.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:26.032 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:41:26.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:26.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:26.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:26.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:26.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:26.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:26.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:26.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:26.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:26.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:26.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:26.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:26.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:26.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:26.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:26.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:26.405 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:41:26.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:26.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:26.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:26.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:26.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:26.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:26.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:26.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:26.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:26.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:26.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:26.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:26.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:26.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:26.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:26.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:26.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:26.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:26.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:26.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:26.872 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:41:26.872 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:41:26.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:26.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:26.878 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:41:27.350 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:41:27.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:27.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:27.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:27.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:27.824 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:41:28.296 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:41:28.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:28.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:28.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:28.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:28.768 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:41:29.242 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:41:29.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:29.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:29.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:29.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:29.714 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:41:30.187 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:41:30.661 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:41:30.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:30.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:30.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:30.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:30.909 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:41:30.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:30.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:30.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:30.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:30.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:41:30.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:41:30.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:41:30.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:41:30.916 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:41:30.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:41:30.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:41:35.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:41:35.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:41:35.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:41:35.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:41:35.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:41:35.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:41:35.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:41:35.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:41:35.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:35.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:41:35.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:41:35.936 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:41:35.936 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:41:35.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:41:35.937 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:35.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:41:35.937 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:41:35.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:41:35.937 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:41:35.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:35.938 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:41:35.938 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:41:35.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:41:35.938 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:35.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:41:35.939 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:41:35.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:41:35.939 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:41:35.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:35.940 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:41:35.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:41:35.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:41:35.940 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:35.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:41:35.940 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:41:35.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:41:35.940 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:41:35.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:41:35.942 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:41:35.942 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:41:35.942 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:35.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:35.947 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:41:36.425 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:41:36.472 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:41:36.474 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:41:36.475 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:41:36.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:36.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:36.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:36.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:36.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:36.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:36.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:36.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:36.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:36.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:36.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:36.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:36.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:36.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:36.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:36.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:36.897 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:41:36.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:36.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:36.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:36.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:37.370 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:41:37.843 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:41:37.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:37.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:37.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:37.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:38.315 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:41:38.786 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:41:38.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:38.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:38.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:38.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:39.260 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:41:39.732 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:41:39.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:39.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:39.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:39.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:39.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:39.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:39.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:39.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:39.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:39.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:39.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:39.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:39.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:39.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:39.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:39.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:39.871 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:41:39.871 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:41:39.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:39.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:39.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:39.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:39.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:39.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:40.205 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:41:40.678 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:41:40.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:40.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:40.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:40.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:41.151 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:41:41.624 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:41:42.097 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:41:42.569 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:41:43.043 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:41:43.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:43.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:43.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:43.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:43.228 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:41:43.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:43.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:43.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:43.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:43.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:43.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:43.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:43.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:43.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:43.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:43.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:43.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:43.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:43.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:43.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:43.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:43.514 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:41:43.986 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:41:44.458 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:41:44.929 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:41:45.402 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:41:45.875 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:41:46.347 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:41:46.818 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:41:46.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:46.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:46.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:46.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:46.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:46.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:46.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:47.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:47.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:47.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:47.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:47.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:47.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:47.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:47.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:47.052 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:41:47.052 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:41:47.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:47.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:47.289 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:41:47.762 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:41:48.234 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:41:48.707 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:41:49.180 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:41:49.652 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:41:50.124 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:41:50.597 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:41:51.070 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:41:51.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:51.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:51.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:51.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:51.157 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:41:51.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:51.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:51.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:51.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:51.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:41:51.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:41:51.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:41:51.174 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:41:51.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:41:51.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:41:51.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:41:51.174 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:41:51.174 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:41:51.174 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:41:51.174 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:41:51.174 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:41:51.174 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:41:56.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:41:56.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:41:56.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:41:56.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:41:56.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:41:56.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:41:56.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:41:56.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:41:56.186 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:56.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:41:56.186 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:41:56.189 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:41:56.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:41:56.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:41:56.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:56.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:41:56.189 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:41:56.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:41:56.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:41:56.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:56.192 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:41:56.192 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:41:56.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:41:56.192 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:56.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:41:56.193 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:41:56.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:41:56.193 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:41:56.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:56.196 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:41:56.196 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:41:56.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:41:56.196 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:41:56.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:41:56.197 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:41:56.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:41:56.197 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:41:56.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:56.202 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:41:56.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:41:56.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:41:56.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:41:56.202 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:41:56.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:41:56.203 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:41:56.203 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:41:56.203 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:41:56.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:56.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:56.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:41:56.208 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:41:56.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:41:56.739 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:41:56.741 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:41:56.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:56.745 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:41:56.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:56.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:56.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:56.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:56.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:56.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:56.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:56.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:56.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:56.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:56.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:56.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:56.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:56.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:56.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:56.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:57.160 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:41:57.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:57.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:57.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:57.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:57.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:57.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:57.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:57.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:57.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:57.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:57.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:57.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:57.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:57.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:57.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:57.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:57.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:57.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:57.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:57.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:57.249 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:41:57.249 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:41:57.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:57.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:57.630 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:41:57.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:57.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:57.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:57.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:57.850 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:41:57.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:57.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:57.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:57.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:57.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:57.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:57.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:57.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:57.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:57.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:57.877 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:57.877 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:57.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:57.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:57.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:57.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:58.103 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:41:58.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:58.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:58.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:58.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:58.576 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:41:58.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:58.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:58.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:58.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:58.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:58.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:58.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:58.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:41:58.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:41:58.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:41:58.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:41:58.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:58.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:41:58.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:41:58.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:41:58.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:41:59.047 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:41:59.047 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:41:59.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:59.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:41:59.048 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:41:59.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:41:59.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:41:59.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:41:59.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:41:59.520 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:41:59.993 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:42:00.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:00.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:00.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:00.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:00.465 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:42:00.938 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:42:01.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:01.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:01.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:01.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:01.411 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:42:01.883 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:42:02.356 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:42:02.830 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:42:03.302 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:42:03.773 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:42:04.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:42:04.719 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:42:05.191 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:42:05.664 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:42:06.136 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:42:06.608 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:42:07.081 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:42:07.554 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:42:08.026 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:42:08.496 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:42:08.968 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:42:09.441 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:42:09.914 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:42:10.385 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:42:10.857 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:42:11.330 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:42:11.802 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:42:12.274 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-04-19 05:42:12.748 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-04-19 05:42:13.220 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-04-19 05:42:13.692 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-04-19 05:42:14.164 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-04-19 05:42:14.637 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-04-19 05:42:15.109 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-04-19 05:42:15.580 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-04-19 05:42:16.052 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-04-19 05:42:16.525 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-04-19 05:42:16.998 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-04-19 05:42:17.470 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-04-19 05:42:17.942 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-04-19 05:42:18.415 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-04-19 05:42:18.888 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-04-19 05:42:18.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:18.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:18.993 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:42:18.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:18.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:18.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:18.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:18.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:42:18.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:42:18.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:42:18.997 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:42:18.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:42:18.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:42:18.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:42:18.998 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4922 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:18.998 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4922 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:18.998 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4922 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:18.998 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4922 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:18.998 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4922 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:18.998 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=4922 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:24.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:42:24.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:42:24.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:42:24.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:42:24.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:42:24.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:42:24.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:42:24.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:42:24.015 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:42:24.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:42:24.015 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:42:24.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:42:24.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:42:24.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:42:24.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:42:24.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:42:24.022 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:42:24.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:42:24.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:42:24.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:24.026 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:42:24.026 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:42:24.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:42:24.027 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:42:24.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:42:24.027 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:42:24.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:42:24.027 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:42:24.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:24.030 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:42:24.030 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:42:24.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:42:24.030 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:42:24.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:42:24.030 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:42:24.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:42:24.030 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:42:24.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:24.034 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:42:24.034 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:42:24.034 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:42:24.035 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:24.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:24.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:24.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:24.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:24.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:24.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:24.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:24.039 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:42:24.517 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:42:24.562 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:42:24.564 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:42:24.567 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:42:24.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:24.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:24.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:24.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:24.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:24.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:24.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:24.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:24.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:24.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:24.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:24.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:42:24.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:42:24.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:24.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:24.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:24.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:24.988 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:42:25.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:25.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:25.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:25.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:25.460 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:42:25.931 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:42:26.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:26.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:26.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:26.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:26.404 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:42:26.877 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:42:27.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:27.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:27.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:27.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:27.349 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:42:27.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:27.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:27.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:27.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:27.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:27.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:27.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:27.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:27.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:27.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:27.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:27.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:27.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:27.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:27.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:42:27.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:42:27.583 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:42:27.583 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:42:27.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:27.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:27.822 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:42:28.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:28.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:28.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:28.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:28.295 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:42:28.767 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:42:29.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:29.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:29.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:29.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:29.240 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:42:29.713 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:42:30.185 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:42:30.659 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:42:31.131 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:42:31.604 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:42:32.077 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:42:32.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:32.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:32.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:32.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:32.100 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:42:32.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:32.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:32.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:32.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:32.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:32.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:32.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:32.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:32.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:32.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:32.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:42:32.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:42:32.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:32.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:32.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:32.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:32.548 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:42:33.021 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:42:33.491 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:42:33.965 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:42:34.437 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:42:34.910 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:42:35.381 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:42:35.854 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:42:36.326 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:42:36.798 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:42:37.269 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:42:37.742 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:42:38.215 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:42:38.687 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:42:38.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:38.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:38.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:38.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:38.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:38.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:38.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:38.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:38.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:38.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:38.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:38.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:38.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:38.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:38.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:42:38.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:42:38.921 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:42:38.921 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:42:38.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:38.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:39.158 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:42:39.631 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:42:39.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:39.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:39.712 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:42:39.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:39.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:39.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:39.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:39.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:42:39.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:42:39.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:42:39.716 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:42:39.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:42:39.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:42:39.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:42:39.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:39.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:39.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:39.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:39.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:39.716 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:42:44.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:42:44.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:42:44.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:42:44.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:42:44.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:42:44.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:42:44.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:42:44.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:42:44.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:42:44.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:42:44.735 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:42:44.737 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:42:44.737 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:42:44.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:42:44.738 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:42:44.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:42:44.738 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:42:44.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:42:44.739 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:42:44.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:44.740 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:42:44.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:42:44.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:42:44.740 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:42:44.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:42:44.740 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:42:44.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:42:44.740 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:42:44.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:44.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:42:44.742 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:42:44.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:42:44.742 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:42:44.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:42:44.742 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:42:44.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:42:44.742 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:42:44.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:44.745 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:42:44.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:42:44.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:42:44.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:42:44.746 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:42:44.746 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:42:44.746 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:44.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:44.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:42:44.751 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:42:45.229 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:42:45.280 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:42:45.283 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:42:45.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:45.285 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:42:45.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:45.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:45.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:45.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:45.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:45.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:45.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:45.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:45.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:45.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:45.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:42:45.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:42:45.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:45.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:45.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:45.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:45.702 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:42:45.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:45.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:45.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:45.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:46.173 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:42:46.646 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:42:46.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:46.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:46.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:46.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:47.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:47.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:47.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:47.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:47.119 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:42:47.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:47.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:47.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:47.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:47.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:47.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:47.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:47.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:47.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:47.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:47.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:42:47.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:42:47.164 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:42:47.165 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-04-19 05:42:47.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:47.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:47.590 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:42:47.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:47.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:47.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:47.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:48.063 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:42:48.537 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:42:48.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:48.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:48.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:48.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:49.009 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:42:49.482 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:42:49.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:49.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:49.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:49.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:49.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:49.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:49.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:49.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:49.884 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:42:49.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:49.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:49.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:49.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:49.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:49.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:49.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:49.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:49.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:49.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:49.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:42:49.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:42:49.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:49.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:49.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:49.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:49.954 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:42:50.426 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:42:50.897 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:42:51.368 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:42:51.839 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:42:52.309 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:42:52.783 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:42:53.255 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:42:53.726 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:42:54.198 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:42:54.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:54.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:54.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:54.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:54.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:54.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:54.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:54.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:54.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:54.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:42:54.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:42:54.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:54.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:42:54.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:42:54.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:42:54.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:42:54.432 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.173.22:6700) Recv SETFH cmd
2026-04-19 05:42:54.432 [INFO] transceiver.py:201 (MS@172.18.173.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-04-19 05:42:54.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:54.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:42:54.669 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:42:55.142 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:42:55.615 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:42:56.087 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:42:56.560 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:42:56.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:42:56.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:42:56.641 [INFO] transceiver.py:205 (MS@172.18.173.22:6700) Frequency hopping disabled
2026-04-19 05:42:56.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:42:56.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:42:56.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:42:56.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:42:56.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:42:56.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:42:56.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:42:56.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:42:56.647 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:42:56.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:42:56.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:01.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:01.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:01.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:01.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:01.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:01.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:01.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:01.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:01.665 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:01.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:01.665 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:43:01.671 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:43:01.671 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:43:01.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:01.672 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:01.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:01.672 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:43:01.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:01.673 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:43:01.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:01.676 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:43:01.676 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:43:01.676 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:01.676 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:01.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:01.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:43:01.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:01.677 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:43:01.677 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:01.680 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:43:01.680 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:43:01.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:01.680 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:01.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:01.680 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:43:01.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:01.681 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:43:01.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:01.684 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:43:01.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:43:01.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:43:01.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:43:01.684 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:43:01.685 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:43:01.685 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:43:01.685 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:01.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:01.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:01.690 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:43:02.167 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:43:02.211 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:43:02.215 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:43:02.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:02.217 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:43:02.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:02.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:02.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:02.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:02.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:02.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:02.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:43:02.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:02.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:02.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:02.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:02.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:02.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:02.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:02.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:03.110 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:43:03.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:03.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:03.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:03.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:03.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:03.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:03.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:03.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:03.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:03.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:03.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:03.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:03.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:03.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:03.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:03.511 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:43:03.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:08.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:08.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:08.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:08.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:08.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:08.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:08.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:08.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:08.524 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:08.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:08.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:43:08.527 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:43:08.528 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:43:08.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:08.528 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:08.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:08.529 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:43:08.529 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:08.530 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:43:08.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:08.531 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:43:08.531 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:43:08.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:08.532 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:08.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:08.532 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:43:08.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:08.532 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:43:08.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:08.534 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:43:08.534 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:43:08.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:08.535 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:08.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:08.535 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:43:08.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:08.535 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:43:08.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:43:08.538 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:43:08.539 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:43:08.539 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:43:08.539 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:08.539 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:08.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:08.544 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:43:09.021 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:43:09.062 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:43:09.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.066 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:43:09.068 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:43:09.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.486 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:43:09.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:09.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:09.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:09.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:09.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:09.957 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:43:10.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:10.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:10.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:10.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:10.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:10.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:10.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:10.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:10.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:10.417 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:43:10.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:10.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:15.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:15.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:15.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:15.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:15.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:15.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:15.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:15.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:15.431 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:15.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:15.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:43:15.435 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:43:15.435 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:43:15.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:15.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:15.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:15.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:43:15.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:15.436 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:43:15.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:15.438 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:43:15.439 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:43:15.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:15.439 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:15.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:15.439 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:43:15.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:15.439 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:43:15.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:15.441 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:43:15.441 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:43:15.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:15.441 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:15.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:15.442 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:43:15.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:15.442 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:43:15.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:15.444 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:43:15.445 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:43:15.445 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:43:15.445 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:15.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:15.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:15.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:15.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:15.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:15.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:15.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:15.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:15.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:15.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:15.450 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:43:15.928 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:43:15.973 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:43:15.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:15.976 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:43:15.978 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:43:16.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.399 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:43:16.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:16.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:16.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:16.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:16.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.870 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:43:16.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:16.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:17.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:17.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:17.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:17.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:17.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:17.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:17.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:17.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:17.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:17.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:17.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:17.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:17.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:17.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:17.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:17.334 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:43:17.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:17.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.335 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.336 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.336 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=408 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.336 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.336 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.336 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.336 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.336 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.336 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:17.336 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:22.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:22.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:22.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:22.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:22.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:22.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:22.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:22.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:22.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:22.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:22.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:43:22.348 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:43:22.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:43:22.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:22.348 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:22.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:22.349 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:43:22.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:22.349 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:43:22.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:22.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:43:22.351 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:43:22.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:22.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:22.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:22.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:43:22.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:22.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:43:22.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:22.353 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:43:22.353 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:43:22.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:22.353 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:22.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:22.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:43:22.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:22.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:43:22.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:22.355 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:43:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:43:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:43:22.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:43:22.355 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:43:22.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:43:22.356 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:43:22.356 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:22.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:22.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:22.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:22.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:22.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:22.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:22.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:22.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:22.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:22.361 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:43:22.839 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:43:22.885 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:43:22.887 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:43:22.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:22.890 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:43:22.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:22.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.310 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:43:23.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:23.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:23.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:23.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:23.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.779 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:43:23.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:23.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:24.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:24.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:24.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:24.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:24.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:24.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:24.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:24.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:24.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:24.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:24.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:24.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:24.214 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:43:29.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:29.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:29.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:29.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:29.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:29.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:29.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:29.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:29.229 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:29.229 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:29.229 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:43:29.232 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:43:29.232 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:43:29.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:29.232 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:29.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:29.233 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:43:29.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:29.233 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:43:29.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:29.234 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:43:29.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:43:29.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:29.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:29.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:29.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:43:29.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:29.235 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:43:29.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:29.237 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:43:29.237 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:43:29.237 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:29.237 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:29.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:29.237 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:43:29.238 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:29.238 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:43:29.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:43:29.240 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:43:29.240 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:43:29.240 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:29.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:29.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:29.245 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:43:29.722 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:43:29.761 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:43:29.761 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:43:29.762 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:43:29.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:29.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:29.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:29.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.187 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:43:30.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:30.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:30.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:30.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:30.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:43:30.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:30.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:31.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:31.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:31.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:31.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:31.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:31.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:31.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:31.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:31.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:31.097 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:43:31.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:31.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:31.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:31.098 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:31.098 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:31.098 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:31.098 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:31.098 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:31.099 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:31.099 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:36.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:36.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:36.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:36.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:36.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:36.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:36.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:36.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:36.108 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:36.109 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:36.109 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:43:36.111 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:43:36.111 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:43:36.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:36.112 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:36.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:36.112 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:43:36.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:36.112 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:43:36.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:36.114 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:43:36.114 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:43:36.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:36.114 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:36.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:36.114 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:43:36.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:36.114 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:43:36.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:36.116 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:43:36.116 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:43:36.116 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:36.116 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:36.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:36.116 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:43:36.116 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:36.116 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:43:36.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:43:36.119 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:43:36.119 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:43:36.119 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:36.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:36.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:36.124 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:43:36.601 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:43:36.648 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:43:36.650 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:43:36.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:36.652 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:43:36.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:36.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:36.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:36.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:36.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:36.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:36.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.072 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:43:37.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:37.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:37.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:37.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:37.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.543 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:43:37.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:37.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:38.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:38.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:38.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:38.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:38.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:38.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:38.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:38.005 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:43:38.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:38.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:38.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:38.005 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:38.005 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:38.005 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:38.005 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:38.005 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:38.005 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:43:43.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:43.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:43.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:43.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:43.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:43.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:43.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:43.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:43.019 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:43.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:43.019 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:43:43.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:43:43.021 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:43:43.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:43.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:43.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:43.022 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:43:43.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:43.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:43:43.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:43.024 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:43:43.024 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:43:43.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:43.024 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:43.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:43.024 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:43:43.024 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:43.024 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:43:43.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:43.026 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:43:43.026 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:43:43.026 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:43.026 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:43.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:43.026 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:43:43.026 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:43.026 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:43:43.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:43:43.029 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:43:43.029 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:43:43.029 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:43.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:43.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:43.034 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:43:43.513 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:43:43.559 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:43:43.561 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:43:43.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:43.564 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:43:43.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:43.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:43.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:43.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:43.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:43.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:43.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:43.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:43.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:43.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:43.983 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:43:44.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:44.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:44.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:44.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:44.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.455 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:43:44.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:44.926 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:43:44.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:44.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:44.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:44.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:44.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:44.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:44.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:44.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:44.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:44.939 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:43:49.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:49.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:49.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:49.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:49.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:49.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:49.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:49.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:49.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:49.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:49.953 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:43:49.956 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:43:49.956 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:43:49.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:49.956 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:49.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:49.956 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:43:49.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:49.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:43:49.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:49.959 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:43:49.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:43:49.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:49.960 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:49.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:49.960 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:43:49.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:49.960 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:43:49.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:49.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:43:49.964 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:43:49.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:49.964 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:49.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:49.964 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:43:49.965 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:49.965 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:43:49.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:43:49.970 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:43:49.971 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:43:49.971 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:43:49.971 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:49.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:49.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:43:49.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:49.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:49.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:49.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:49.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:49.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:49.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:49.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:49.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:49.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:49.976 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:43:50.453 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:43:50.507 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:43:50.510 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:43:50.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.512 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:43:50.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:50.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:50.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:50.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:50.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:50.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:50.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:50.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:50.593 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:50.593 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:43:50.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:50.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:55.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:55.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:55.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:55.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:55.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:55.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:55.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:55.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:55.609 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:55.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:43:55.609 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:43:55.612 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:43:55.613 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:43:55.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:55.613 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:55.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:55.614 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:43:55.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:43:55.614 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:43:55.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:55.616 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:43:55.616 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:43:55.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:55.616 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:55.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:55.616 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:43:55.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:43:55.617 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:43:55.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:55.619 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:43:55.619 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:43:55.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:55.619 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:43:55.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:55.619 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:43:55.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:43:55.619 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:43:55.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:55.622 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:43:55.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:43:55.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:43:55.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:43:55.622 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:43:55.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:43:55.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:43:55.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:55.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:43:55.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:43:55.623 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:43:55.623 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:43:55.623 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:55.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:55.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:43:55.628 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:43:56.106 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:43:56.150 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:43:56.152 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:43:56.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.155 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:43:56.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:43:56.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:43:56.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:43:56.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:43:56.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:43:56.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:43:56.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:43:56.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:43:56.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:43:56.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:43:56.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:43:56.267 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:44:01.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:01.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:01.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:01.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:01.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:01.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:01.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:01.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:01.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:01.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:01.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:44:01.289 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:44:01.289 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:44:01.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:01.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:01.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:01.289 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:44:01.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:01.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:44:01.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:01.293 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:44:01.293 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:44:01.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:01.293 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:01.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:01.293 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:44:01.293 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:01.293 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:44:01.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:01.295 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:44:01.296 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:44:01.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:01.296 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:01.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:01.296 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:44:01.296 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:01.296 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:44:01.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:44:01.299 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:44:01.299 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:44:01.299 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:01.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:01.304 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:44:01.782 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:44:01.827 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:44:01.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.830 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:44:01.832 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:44:01.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:01.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:01.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:01.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:01.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:01.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:01.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:01.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:01.934 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:01.934 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:44:01.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:01.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:06.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:06.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:06.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:06.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:06.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:06.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:06.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:06.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:06.951 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:06.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:06.951 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:44:06.954 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:44:06.954 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:44:06.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:06.954 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:06.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:06.955 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:44:06.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:06.955 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:44:06.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:06.958 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:44:06.958 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:44:06.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:06.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:06.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:06.958 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:44:06.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:06.959 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:44:06.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:06.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:44:06.962 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:44:06.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:06.962 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:06.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:06.962 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:44:06.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:06.962 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:44:06.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:06.966 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:44:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:44:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:44:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:44:06.966 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:44:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:44:06.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:44:06.967 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:44:06.967 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:44:06.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:06.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:06.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:06.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:06.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:06.972 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:44:07.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:44:07.493 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:44:07.494 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:44:07.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.497 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:44:07.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:07.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:07.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:07.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:07.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:07.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:07.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:07.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:07.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:07.587 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:44:07.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:07.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:12.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:12.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:12.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:12.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:12.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:12.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:12.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:12.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:12.597 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:12.597 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:12.597 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:44:12.598 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:44:12.598 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:44:12.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:12.598 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:12.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:12.599 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:44:12.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:12.599 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:44:12.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:12.599 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:44:12.600 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:44:12.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:12.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:12.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:12.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:44:12.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:12.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:44:12.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:12.601 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:44:12.601 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:44:12.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:12.601 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:12.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:12.601 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:44:12.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:12.601 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:44:12.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:44:12.603 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:44:12.603 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:44:12.603 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:12.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:12.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:12.608 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:44:13.087 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:44:13.130 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:44:13.131 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:44:13.132 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:44:13.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:13.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:13.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:13.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:13.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:13.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:13.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:13.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:13.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:13.227 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:13.227 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:44:13.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:13.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:18.233 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:18.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:18.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:18.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:18.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:18.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:18.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:18.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:18.241 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:18.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:18.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:44:18.246 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:44:18.246 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:44:18.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:18.246 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:18.247 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:44:18.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:18.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:18.247 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:44:18.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:18.252 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:44:18.253 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:44:18.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:18.253 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:18.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:18.253 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:44:18.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:18.254 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:44:18.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:18.258 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:44:18.258 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:44:18.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:18.258 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:18.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:18.259 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:44:18.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:18.259 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:44:18.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:18.266 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:44:18.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:18.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:18.268 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:44:18.268 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:44:18.268 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:44:18.268 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:44:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:18.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:18.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:18.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:18.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:18.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:18.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:18.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:18.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:18.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:18.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:18.273 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:44:18.751 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:44:18.807 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:44:18.809 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:44:18.810 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:44:18.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:18.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:18.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:18.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:18.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:18.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:18.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:18.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:18.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:18.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:18.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:18.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:18.912 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:44:23.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:23.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:23.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:23.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:23.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:23.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:23.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:23.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:23.931 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:23.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:23.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:44:23.937 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:44:23.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:44:23.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:23.938 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:23.938 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:44:23.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:23.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:23.939 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:44:23.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:23.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:44:23.944 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:44:23.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:23.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:23.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:23.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:44:23.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:23.945 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:44:23.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:23.948 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:44:23.948 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:44:23.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:23.948 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:23.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:23.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:44:23.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:23.948 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:44:23.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:23.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:44:23.953 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:44:23.953 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:44:23.953 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:23.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:23.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:23.957 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:44:24.435 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:44:24.478 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:44:24.480 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:44:24.481 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:44:24.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:24.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:24.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:24.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:24.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:24.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:24.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:24.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:24.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:24.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:24.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:24.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:24.561 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:44:24.561 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:24.561 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:24.561 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:24.561 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:24.561 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:24.561 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:29.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:29.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:29.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:29.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:29.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:29.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:29.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:29.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:29.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:29.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:29.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:44:29.582 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:44:29.583 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:44:29.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:29.583 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:29.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:29.583 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:44:29.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:29.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:44:29.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:29.588 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:44:29.588 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:44:29.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:29.588 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:29.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:29.588 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:44:29.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:29.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:44:29.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:29.592 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:44:29.592 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:44:29.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:29.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:29.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:29.593 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:44:29.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:29.593 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:44:29.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:29.597 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:44:29.597 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:44:29.597 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:44:29.598 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:29.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:29.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:29.602 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:44:30.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:44:30.127 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:44:30.129 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:44:30.131 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:44:30.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:30.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:44:30.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:44:30.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:44:30.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:30.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:44:30.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:44:30.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:44:30.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:44:30.549 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:44:30.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:30.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:30.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:30.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:31.021 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:44:31.494 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:44:31.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:31.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:31.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:31.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:31.967 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:44:32.439 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:44:32.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:32.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:32.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:32.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:32.910 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:44:33.383 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:44:33.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:44:33.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:44:33.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:33.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:33.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:33.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:33.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:33.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:33.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:33.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:33.598 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:44:33.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:33.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:33.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=865 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:33.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:33.598 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:33.599 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:33.599 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:33.599 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:38.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:38.599 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:38.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:38.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:38.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:38.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:38.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:38.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:38.612 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:38.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:38.612 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:44:38.616 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:44:38.616 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:44:38.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:38.616 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:38.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:38.616 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:44:38.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:38.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:44:38.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:38.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:44:38.620 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:44:38.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:38.620 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:38.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:38.620 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:44:38.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:38.620 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:44:38.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:38.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:44:38.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:44:38.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:38.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:38.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:38.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:44:38.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:38.623 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:44:38.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:38.626 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:44:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:44:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:44:38.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:44:38.627 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:44:38.627 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:44:38.627 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:38.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:38.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:38.632 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:44:39.109 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:44:39.155 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:44:39.157 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:44:39.159 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:44:39.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:39.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:44:39.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:44:39.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:44:39.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:39.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:44:39.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:44:39.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:44:39.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:44:39.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 05:44:39.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:44:39.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:44:39.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:39.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:39.582 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:44:39.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:39.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:39.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:39.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:39.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:39.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:44:39.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:44:39.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:44:39.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:39.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:44:39.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:44:39.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:44:39.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:44:39.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:39.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:44:39.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:44:39.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:39.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:39.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:39.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:39.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:39.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:39.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:39.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:39.752 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:44:39.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:39.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=243 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=243 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=243 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=243 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=243 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:39.753 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=243 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:44:44.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:44:44.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:44:44.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:44.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:44.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:44.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:44.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:44:44.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:44.771 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:44.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:44:44.771 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:44:44.773 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:44:44.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:44:44.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:44.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:44.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:44:44.774 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:44:44.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:44:44.774 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:44:44.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:44.775 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:44:44.776 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:44:44.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:44.776 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:44.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:44:44.776 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:44:44.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:44:44.776 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:44:44.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:44.777 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:44:44.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:44:44.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:44.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:44:44.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:44:44.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:44:44.778 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:44:44.778 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:44:44.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:44.779 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:44:44.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:44:44.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:44:44.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:44:44.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:44:44.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:44:44.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:44:44.780 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:44:44.780 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:44.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:44:44.785 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:44:45.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:44:45.311 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:44:45.314 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:44:45.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:45.316 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:44:45.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:44:45.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:44:45.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:44:45.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:45.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:44:45.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:44:45.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:44:45.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:44:45.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 05:44:45.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:44:45.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:44:45.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:45.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:45.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:44:45.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:45.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:44:45.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:44:45.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:44:45.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:44:45.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:44:45.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:44:45.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:44:45.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:44:45.734 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:44:45.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:45.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:45.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:45.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:46.206 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:44:46.677 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:44:46.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:46.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:46.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:46.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:47.150 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:44:47.623 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-04-19 05:44:47.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:47.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:47.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:47.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:48.095 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-04-19 05:44:48.566 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-04-19 05:44:48.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:48.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:48.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:48.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:49.039 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-04-19 05:44:49.512 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-04-19 05:44:49.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:44:49.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:44:49.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:44:49.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:44:49.984 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-04-19 05:44:50.455 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-04-19 05:44:50.925 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-04-19 05:44:51.399 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-04-19 05:44:51.871 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-04-19 05:44:52.344 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-04-19 05:44:52.815 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-04-19 05:44:53.288 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-04-19 05:44:53.760 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-04-19 05:44:54.233 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-04-19 05:44:54.703 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-04-19 05:44:55.177 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-04-19 05:44:55.650 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-04-19 05:44:56.122 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-04-19 05:44:56.593 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-04-19 05:44:57.063 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-04-19 05:44:57.534 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-04-19 05:44:58.005 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-04-19 05:44:58.478 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-04-19 05:44:58.951 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-04-19 05:44:59.423 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-04-19 05:44:59.894 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-04-19 05:45:00.367 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-04-19 05:45:00.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:00.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:45:00.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:45:00.661 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=3432 tn=5 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:00.661 [WARNING] transceiver.py:257 (MS@172.18.173.22:6700) RX TRXD message (fn=3432 tn=6 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:00.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:45:00.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:00.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:45:00.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:45:00.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:45:00.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:45:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:45:00.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:45:00.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:45:00.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:45:00.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:45:00.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:45:00.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:45:00.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:00.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:45:00.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:45:00.698 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:45:00.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:00.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:00.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:00.698 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:00.698 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:00.699 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:00.699 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:00.699 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:00.699 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:05.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:45:05.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:45:05.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:05.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:05.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:05.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:05.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:05.709 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:45:05.709 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:05.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:45:05.710 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:45:05.712 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:45:05.713 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:45:05.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:45:05.713 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:05.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:05.714 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:45:05.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:45:05.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:45:05.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:45:05.715 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:45:05.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:45:05.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:45:05.716 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:05.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:05.716 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:45:05.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:45:05.716 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:45:05.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:45:05.718 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:45:05.718 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:45:05.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:45:05.718 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:05.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:05.718 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:45:05.718 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:45:05.718 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:45:05.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:45:05.721 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:45:05.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:45:05.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:45:05.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:45:05.721 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:45:05.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:45:05.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:45:05.722 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:45:05.722 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:45:05.722 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:05.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:05.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:05.727 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:45:06.205 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:45:06.250 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:45:06.253 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:45:06.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:45:06.256 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:45:06.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:45:06.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:45:06.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:45:06.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:06.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:45:06.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:45:06.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:45:06.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:45:06.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 05:45:06.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:45:06.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:45:06.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:06.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:06.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:45:06.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 05:45:06.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:06.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:45:06.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:45:06.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:45:06.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:06.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:45:06.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:45:06.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:45:06.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:45:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:45:06.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:45:06.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:45:06.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:45:06.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:45:06.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:45:06.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:45:06.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:06.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:06.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:06.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:06.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:45:06.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:45:06.639 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:45:06.639 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=198 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:06.639 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=198 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:06.639 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=198 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:06.639 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=198 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:06.639 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=198 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:06.639 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=198 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:11.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:45:11.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:45:11.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:11.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:11.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:11.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:11.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:11.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:45:11.654 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:11.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:45:11.654 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:45:11.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:45:11.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:45:11.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:45:11.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:11.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:11.660 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:45:11.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:45:11.661 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:45:11.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:45:11.665 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:45:11.665 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:45:11.665 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:45:11.665 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:11.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:11.665 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:45:11.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:45:11.666 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:45:11.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:45:11.669 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:45:11.669 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:45:11.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:45:11.670 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:11.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:11.670 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:45:11.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:45:11.670 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:45:11.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:45:11.674 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:45:11.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:45:11.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:45:11.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:45:11.674 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:45:11.675 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:45:11.675 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:45:11.675 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:11.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:11.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:11.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:11.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:11.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:11.680 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-04-19 05:45:12.158 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-04-19 05:45:12.201 [DEBUG] fake_trx.py:278 (BTS@172.18.173.20:5700) Recv FAKE_TOA cmd
2026-04-19 05:45:12.202 [DEBUG] fake_trx.py:297 (BTS@172.18.173.20:5700) Recv FAKE_RSSI cmd
2026-04-19 05:45:12.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:45:12.204 [DEBUG] fake_trx.py:322 (BTS@172.18.173.20:5700) Recv FAKE_CI cmd
2026-04-19 05:45:12.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:45:12.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:45:12.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:45:12.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:12.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:45:12.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:45:12.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:45:12.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:45:12.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD HANDOVER
2026-04-19 05:45:12.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:45:12.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:45:12.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:12.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:12.630 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-04-19 05:45:12.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:45:12.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:45:12.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:45:12.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:45:13.101 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-04-19 05:45:13.575 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-04-19 05:45:13.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:45:13.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:45:13.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:45:13.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:45:14.047 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-04-19 05:45:14.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:14.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:45:14.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:45:14.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD ECHO
2026-04-19 05:45:14.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.173.22:6700) Ignore CMD SETSLOT
2026-04-19 05:45:14.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.173.22:6700) Recv RXTUNE cmd
2026-04-19 05:45:14.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.173.22:6700) Recv TXTUNE cmd
2026-04-19 05:45:14.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.173.22:6700) Recv POWERON CMD
2026-04-19 05:45:14.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.173.22:6700) Starting transceiver...
2026-04-19 05:45:14.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD NOHANDOVER
2026-04-19 05:45:14.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.173.22:6700) Recv POWEROFF cmd
2026-04-19 05:45:14.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.173.22:6700) Stopping transceiver...
2026-04-19 05:45:14.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:45:14.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:45:14.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:45:14.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:45:14.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:14.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:45:14.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:45:14.339 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:45:14.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:14.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:14.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:14.339 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=575 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:14.339 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=575 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:14.339 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=575 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:14.339 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=575 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:14.339 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=575 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:14.339 [WARNING] transceiver.py:257 (BTS@172.18.173.20:5700) RX TRXD message (ver=1 fn=575 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-04-19 05:45:19.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:45:19.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:45:19.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:19.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:19.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:19.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:19.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:19.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:45:19.343 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:19.343 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:45:19.343 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:45:19.344 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:45:19.344 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:45:19.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:45:19.344 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:19.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:19.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:45:19.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:45:19.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:45:19.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:45:19.345 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:45:19.345 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:45:19.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:45:19.345 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:19.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:19.345 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:45:19.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:45:19.346 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:45:19.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:45:19.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:45:19.347 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:45:19.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:45:19.347 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:19.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:19.347 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:45:19.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:45:19.347 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:45:19.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:45:19.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:45:19.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:45:19.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:45:19.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:45:19.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:45:19.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:45:19.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:45:19.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:45:19.349 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:45:19.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:19.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:19.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:19.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:19.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:45:19.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:45:19.350 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:45:19.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:19.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:24.354 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:45:24.354 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:45:24.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:24.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:24.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:24.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:24.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:24.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:45:24.358 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.173.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:24.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.173.20:5700) Recv SETFORMAT cmd
2026-04-19 05:45:24.358 [INFO] ctrl_if_trx.py:201 (BTS@172.18.173.20:5700) TRXD header version 1 -> 1
2026-04-19 05:45:24.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.173.20:5700/1) Recv RXTUNE cmd
2026-04-19 05:45:24.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.173.20:5700/1) Recv TXTUNE cmd
2026-04-19 05:45:24.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:45:24.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.173.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:24.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:24.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.173.20:5700/1) Recv NOMTXPOWER cmd
2026-04-19 05:45:24.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.173.20:5700/1) Recv SETFORMAT cmd
2026-04-19 05:45:24.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.173.20:5700/1) TRXD header version 1 -> 1
2026-04-19 05:45:24.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.173.20:5700/1) Recv SETPOWER cmd
2026-04-19 05:45:24.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.173.20:5700/2) Recv RXTUNE cmd
2026-04-19 05:45:24.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.173.20:5700/2) Recv TXTUNE cmd
2026-04-19 05:45:24.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:45:24.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.173.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:24.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.173.20:5700/2) Recv NOMTXPOWER cmd
2026-04-19 05:45:24.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:24.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.173.20:5700/2) Recv SETFORMAT cmd
2026-04-19 05:45:24.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.173.20:5700/2) TRXD header version 1 -> 1
2026-04-19 05:45:24.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.173.20:5700/2) Recv SETPOWER cmd
2026-04-19 05:45:24.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.173.20:5700/3) Recv RXTUNE cmd
2026-04-19 05:45:24.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.173.20:5700/3) Recv TXTUNE cmd
2026-04-19 05:45:24.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:45:24.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.173.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-04-19 05:45:24.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.173.20:5700/3) Recv RFMUTE cmd
2026-04-19 05:45:24.362 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.173.20:5700/3) Recv NOMTXPOWER cmd
2026-04-19 05:45:24.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.173.20:5700/3) Recv SETFORMAT cmd
2026-04-19 05:45:24.362 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.173.20:5700/3) TRXD header version 1 -> 1
2026-04-19 05:45:24.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.173.20:5700/3) Recv SETPOWER cmd
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.173.20:5700) Recv RXTUNE cmd
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETTSC
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETTSC
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETTSC
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.173.20:5700) Recv TXTUNE cmd
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETRXGAIN
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETRXGAIN
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETTSC
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETRXGAIN
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.173.20:5700) Recv NOMTXPOWER cmd
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.173.20:5700) Recv SETPOWER cmd
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.173.20:5700) Recv POWERON CMD
2026-04-19 05:45:24.364 [INFO] ctrl_if_trx.py:109 (BTS@172.18.173.20:5700) Starting transceiver...
2026-04-19 05:45:24.364 [INFO] transceiver.py:243 Starting clock generator
2026-04-19 05:45:24.364 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:24.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETRXGAIN
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.173.20:5700/1) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.173.20:5700/1) Recv RFMUTE cmd
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.173.20:5700) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.173.20:5700/2) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.173.20:5700) Recv RFMUTE cmd
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.173.20:5700) Recv POWEROFF cmd
2026-04-19 05:45:24.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.173.20:5700) Stopping transceiver...
2026-04-19 05:45:24.365 [INFO] transceiver.py:246 Stopping clock generator
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.173.20:5700/2) Recv RFMUTE cmd
2026-04-19 05:45:24.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.173.20:5700/3) Ignore CMD SETSLOT